Even Parity Generator

A B P
C
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1

EVEN PARITY GENERATOR ODD PARITY GENERATOR

ODD PARITY GENERATOR

B C P
A
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0

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Ex:No: Design And Implementation of Parity Generator
Date :_______

AIM:

To design and implement

I. Even parity generator

II. Odd parity generator

COMPONENETS REQUIRED:
S.NO COMPONENETS SPECIFICATION QUANTITY
1. EX-OR GATE IC7486 1
2. NOT GATE IC7404 1
3. IC TRAINER KIT - 1
4. CONNECTING WIRES - REQUIRED

THORY:

1.Parity Bit Calculation:

 Even Parity: The parity bit is set such that the total number of 1s in the
data,including the parity bit,is even.If the number of 1s in the data is already
even,the parity bit is 0;otherwise , it is 1.

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  Odd Parity: The parity bit is set so that the total number of 1s in the data,including
the parity bit,is odd.If the number of 1s in the data is already odd,the parity bit is
0;otherwiaw ,it is 1

PROCEDURE:

1. Connect the circuit as per the logic diagram.

2. Switch on the power supply
3. Vary the input values from 0 and 1.
4. Take the output readings like when the LED glow is 1 and when LED is off is 0.
5. Repeat the step for all the input values.
6. Verify the output values with Truth table.
7. Switch off the power supply.

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EVEN PARITY CHECKER
A B C P PARITY CHECK
(ERROR)
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 1
1 1 1 0 1
1 1 1 1 0

LOGIC DIAGRAM:

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EX:NO: Design and Implementation of Parity Checker
Date:_________

AIM:

To design and implement of

I. Even Parity Checker

II. Odd Parity Checker

COMPONENTS REQUIRED:
S.NO COMPONENETS SPECIFICATION QUANTITY
1. EX-OR GATE IC7486 3
2. IC TRAINER KIT -
-
3. CONNECTING WIRES - REQUIRED

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THEORY:

 Even Parity Checker:

If the number of ‘1’ bits in the data is odd,the parity bit is set to ‘1’ to
make the count of ‘1’ s even.If its a already even,the parity bit is set to ‘0’.

 Odd Parity Checker:

If the number of ‘1’ bits in the data is even,the parity bit is set to ‘1’
to make the total count odd.If its a already odd,the parity bit is set to ‘0’.
PROCEDURE:

1. Connect the circuit as per the logic diagram

2. Switch on the power supply

3. Vary the input values from 0 and 1.

4. Take the output readings like when the LED glow is 1 and when LED is off is 0.

5. Repeat the step for all the input values.

6. Verify the output values with Truth table.

7. Switch off the power supply.

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ODD PARITY CHECKER:

A B C P PARITY
CHECK(ERROR)
0 0 0 0 1
0 0 0 1 0
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
0 1 0 1 1
0 1 1 0 1
0 1 1 1 0
1 0 0 0 0
1 0 0 1 1
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1 0 1 0 1
1 0 1 1 0
1 1 0 0 1
1 1 0 1 0
1 1 1 0 0
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 1 1 1 1 1

LOGIC DIAGRAM:

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