in the typical design of a control system we have these kinds of

specifications and requirements

● first we may have variations in the load current which causes

variations in the output voltage and we would generally like to
maintain regulation of the output voltage regardless of what
the load current does so there will be a limit on the maximum
variations in the output voltage that result from load current
variations and essentially this is limit on the maximum allowable
output impedance of our closed-loop system

● a similar problem is the effect of input voltage variations or VG

hat variations on the output voltage and so again we may have
some maximum amount of input voltage variations that we are
expected to see and this requirement then limits the magnitude
of the transfer function from the input voltage to the output
voltage so

● in previous lectures we've discussed already how to work

out the closed loop transfer functions and we found that we
can construct the closed loop output impedance as the
open loop output impedance divided by 1 plus the loop gain

● and likewise the closed loop transfer function from VG

to the output we can construct as the open loop gbg
divided by 1 plus the loop gain
 these are that then the closed loop
disturbance transfer functions and we want to
design our feedback loop to make each of these
quantities be sufficiently small so that the output
voltage is regulated

the other kinds of requirements that we get relate to the last lecture so
we may have some transient response time requirement which
means that we want to respond to a disturbance in a certain
amount of time

and so this requires a sufficiently high crossover frequency and

bandwidth of the feed

also this transient response may have overshoot and ringing

generally we want to limit that and so we need an adequate phase
margin in order to achieve that requirement

so these two issues were discussed in the last lecture the the problem
of designing a feedback control system then is one of shaping the loop
gain so that we have the adequate phase margin we have an
adequate crossover frequency and we have a large enough
magnitude of the loop gain to make these disturbance transfer
functions be sufficiently small

so what we'll talk about in this lecture then is how to add poles and
zeros and gains to our loop gain to shape it and change it so that we
meet all of these kinds of requirements and this addition of poles and
zeros is done through generally what's called a compensator
Network it's another block that we add to our feedback loop that often
contains things like op-amp circuits in an analog feedback loop and
this is the place than where we can add these poles and zeros to
shape the loop gain and get what we need

Break: Slide 38

so we're going to talk about several of the classic kinds of

compensator networks

the first one is called a lead compensator traditionally or a PD

proportional plus derivative control compensator

and the object of this kind of compensator network is to improve the

phase margin so how can we improve the phase margin of a loop gain
if we don't have enough

Explanation
well we know that zeros add positive phase so naturally we can
think of adding a zero to our loop gain here is then a plot of a loop
gain that has a zero right here and after that frequency we have a gain
that increases so we get this compensator that has a some DC gain
and then it has a zero now one immediate problem or practical
problem with this is that this transfer function by itself with a zero
implies that the gain gets larger and larger as the frequency increases
and in fact as you go to infinite frequency the circuit has infinite gain
this is not at
Solution
all practical all amplifier circuits must roll off at high frequency if you go
to a high enough frequency there's no more gain so there's at least
one pole to flatten out our gain and in fact there's more than that
there's at least one more after that to make the game roll off we'll talk
more about this when we do an example of designing an op-amp
circuit for a practical compensator

so what's shown here is a pole then that makes our compensator

gain flattened out at high frequency and we'll assume that any
further poles are at a high enough frequency that they don't affect
what happens here in the vicinity of our crossover frequency where
we're going to design

the phase asymptotes of this transfer function are constructed below

it the zero will give us phase asymptotes that extend a decade on
either side of the zero frequency

and likewise the pole will give phase asymptotes that look like this
that go down to minus 90 and change over a decade on either side of
the pole frequency so here's F P over 10 + 10 F P phase asymptotes
will have this is that Z over 10 + 10 F Z up here

when you combine those asymptotes the slopes over the range from
this frequency to this frequency will cancel and will flatten out and then
above that frequency will eventually come back to a NetZero degrees
phase shift so the

composite asymptotes are sketched here the

maximum phase happens right at that frequency so if we want to
improve the phase at the crossover frequency we should set the
crossover frequency to be this frequency where phase is maximum so
we'll set that equal to crossover frequency F sub C

this is a log scale in frequency and so halfway between these two

phase break frequencies on the log scale is the geometric mean
which turns out to be at the square root of the zero frequency times
the pole frequency so that's what we should set equal to F sub C then
this phase here we'll call the our theta Max or perhaps just theta on
the next slide so that's the phase lead that we get out of this network
we can work out the exact phase of this transfer function and calculate
what theta is as a function of F Z and F P that's actually done on the

Break: Slide 39

next slide so here is the answer the frequency where the phase is
maximum is at this geometric mean which we will set equal to the
crossover frequency and the value of that phase if you work out the
exact function it turns out to be expressible like this

so here's a plot of the maximum phase lead that we get as a function

of the ratio of the pole frequency to the zero frequency which is on this
axis
so for example if we place the pole at ten times the zero frequency like
this then we'll get this much phase lead out of our network which
looks like it's what about fifty five degrees and so we can actually
figure out what ratio of frequencies of the pole and zero we need to
get a certain amount of phase lead here here is the relationship
between the pole / zero frequency versus this maximum phase
data

Break: Slide 40

so to design a lead compensator then or a PD compensator we want

to set our crossover frequency to be right there

and our pole and zero frequency will be spaced evenly about it
and we will choose that ratio of frequencies to make this maximum
phase give us enough additional phase to get the proper phase
margin in our loop

here then is what we need to do so

FC is the crossover frequency
theta is the amount of additional phase
that we need out of this compensator network and here are the
expressions then that we can solve for the zero and pole
frequencies of our compensator one last little point is that this
compensator also has a

gain that can move our overall loop gain up and down if you don't
want to change the crossover frequency of your loop you need to
make this gain right here be unity gain
so that it doesn't change the gain at the crossover frequency

well that means that this gain at low frequency will be less than unity
here is in fact an expression from the gain which you can derive by
writing the equation of the asymptotes

if we want to change the gain of the loop at the crossover frequency

then we can set this quantity equal to whatever gain we need and
solve for the value of GC zero that it takes then to achieve that gain

so this slide is the bottom line this is these design equations that we
need to design the PD compensator

Break: Slide 40

here's a brief example and we'll do some more involved examples and
upcoming lectures but what I've shown here is an

uncompensated feedback loop that has two poles with a Q factor

and then it

rolls off with a two pole slope after that

it passes through zero DB right there so this is our crossover
frequency and

here are the phase asymptotes for

the uncompensated loop gain T in the

vicinity of the resonance the phase changes very quickly from

0 to minus 180 degrees and

by the time we get up here to this high frequency where we

have a crossover the phase of T is basically minus 180 degrees and
we basically have

no phase margin so what we need to do is add a PD compensator

network to add a zero and pole that will improve our phase margin
here
I've Illustrated one where the zero is below FC and the pole is

above FC as on the previous slide

so that our compensated loop

then does this if we maintain the same crossover frequency

but the zero and pole give us some additional

phase so that we now have some positive phase margin here which
is in fact equal to the amount of phase were adding from our
compensator for this example

one of the things it does is reduce the DC gain and so with this type of
compensator we're not concerned with the the DC gain or the gain of
T at other frequencies all we're really trying to do is improve the
phase margin

Break: Slide 41
here is a second classical type of compensator Network called the lag
compensator or the proportional plus integral controller or PI
controller
the object of this type of compensator is to increase the loop gain at
low frequency so that we can regulate better and have more loop
gain

here is a transfer function of the classic p.i compensator it's I

expressed it here as a an inverted zero so it has a

gain that looks like this this term here is the integrator in the
Laplace domain and integrator is divided by s and then so that's the
eye part of the PI controller and then this is a proportional part or
proportional gain that's P and so we have proportional gain

and we have an integrator in that low frequency that increases the

low frequency gain this kind of compensator does not improve our
phase margin

at all in fact at low frequency it makes the phase more negative so

that's not good generally what we do with a PI compensator is we try
to not disrupt the high frequency phase so the PI compensator has
zero degrees of phase at high frequency and generally we'll want to
have our crossover frequency somewhere up here where the comp
in the PI compensator doesn't sup our phase margin

but what we do is we use the compensator to improve the low-

frequency game and get better regulation so that we reduce the
disturbance transfer functions at low frequency
Break page 43:

here is a brief example of a lag compensator in this case our initial

uncompensated loop gain is this one it has a low value of gain at DC
in fact it has next to no loop gain and then it has a single pole with a
single pole slope at high frequency

the phase of the uncompensated gain then is zero degrees at low

frequency and then the pole gives us a minus 45 degree per
decade slope and we end up at minus 90 degrees at high frequency
our phase margin is not a problem looks like here if we cross over at
this high frequency we'd have 90 degrees of phase margin and that's
not the problem at all instead the problem is that we have next to no
gain at low frequency and our loop doesn't do anything so

we need to boost the gain now the first thing we could do is simply
add more DC gain to our entire loop so we could bring the whole
loop up by maybe that much and just scale the whole curve up so that
we have a a gain like this

but then we can do even better if we add an invert at zero

here and get very large gain at DC the inverted zero might be
chosen to be a decade and frequency below the crossover so that it
doesn't change the phase margin but it simply gives us more low
frequency gain

Break page 44:

here is a plot of the quantity 1 over 1 plus T for the compensated

loop gain so recall that this quantity 1 over 1 plus T reduces
disturbance transfer functions in the converter such as the output
impedance or the line 2 output transfer function GBG as you recall

one over one plus T is found as being essentially equal to one or zero
dB at high frequency and one over T at low frequency so increasing

T with this P I compensator will reduce 1 over 1 plus T and

therefore reduce the disturbance transfer functions and give us
very good rejection of disturbances and very good regulation of the
output voltage at low frequencies

Break page 45:

finally here is a PID compensator or a combination of the previous
lag and lead compensator networks so what we have here is a

PD compensator from those two terms which gives us the

0 and this pole

I've also shown us another pole a second pole at very high

frequency as I mentioned this was present in a practical amplifier and
then finally we have the
 PI compensator which gives us this inverted zero at low
frequency

so this compensator network has all the terms this is often what we
will do if we have a second-order system such as a continuous
conduction mode buck-type converter to compensate the crossover
frequency as in the PD compensator will be chosen to be halfway
between the 0 and the pole

so that our crossover frequency will be here and we'll get some
improvement in phase margin from that and then

we'll have our p i-- compensator inverted 0 yet some

frequency sufficiently less than the crossover frequency and improve
the low frequency gain the way to design one of these is to do these
quantities one at a time so

I would first design the PD compensator part to improve the

phase margin and

after that add on an inverter zero or PI compensator to improve the

low-frequency game
and get a composite transfer function like this in upcoming lectures
we're going to discuss first design of some of this type of compensator
and I'll do a practical design example and we'll also talk about how to
realize op-amp compensator circuits to realize a transfer function such
as this using the ideas that we've discussed in previous lectures

________________________________________________________
____________________

in this lecture I'm going to summarize another example that is similar

in many ways to the example of the last two lectures except it has a
more recent and practical application along with some simulations
to show the actual performance this is a

point of load regulator made with a synchronous buck converter

so we have a synchronous rectifier and our buck converter the

output voltage is 1.8 volts to supply digital chips and the

input voltage is 5 volts our output current can vary anywhere from
0 to 5 amps in this kind of converter it is important that the loop be
able to respond quickly to variations in load current

and in fact the processor may change its load current much much
faster than the bandwidth of the feedback loop and so we invariably
have to put many capacitors around the processor chip in order to
maintain adequate voltage regulation at high frequency and have
a sufficiently low output impedance driving this chip

still the faster we can make our converter the less capacitor we need
and the capacitors that can work in this application can add up and be
fairly expensive so we see a lot of applications such as this nowadays
with buck converters that operate at a low duty cycle and in

fact we may have parallel connected buck converters to supply the full
current these parallel connected

converters are generally phase-shifted so that their ripples the

inductor current ripples will cancel approximately

and so that we can have a faster transient response using small

value inductors

so in this example we're going to model the capacitor is

200 micro farad's of capacitor with an effective equivalent series

resistance of
0.8 milli ohms we'll have a
1 megahertz switching frequency which is a pretty typical number for
this kind of converter nowadays and our inductor for this converter is
1 microhenry which should give us a pretty fast the transient
response in our output current

Break:

here's our equivalent circuit model for the buck converter here I have

dependent sources where the transformer goes

and the equivalent circuit model of the inductor with

its loss resistance

and the capacitor with its ESR this circuit has three resistive elements
so it's a little bit of work to calculate the Q factor I'm not going to go
into it here

but there's another approximation we haven't discussed called the

high Q approximation where when we have both series and series

loading and parallel loaded damping resistors for a series resonant
and parallel resonant circuits if they're both present in this circuit then
the high Q approximation says that the overall Q is approximately
the parallel combination or inverse addition of the two individual Q's
this is a good approximation when the product of the Q's is
substantially greater than one
so we work out our corner frequencies this LC circuit has a corner
frequency of 11 kilohertz

the overall Q with all three resistive elements works out to be no

more than 2.3 or 7.2 DB and the

ESR causes a zero and the transfer function at

the corner frequency of the ESR and capacitor given by 1 over 2 pi
ESR times C or 1 megahertz

Break:

let's work out the uncompensated loop gain then and design a
compensator this goes very similar to the previous example

with no compensator then our overall loop gain will be the control
to alpha transfer function g VD multiplied by the pulse width
modulator gain multiplied by the compensator gain of 1

and in this low voltage output at 1.8 volts output we don't need to
divide the voltage down so we our H is 1

break

here are the bode plot asymptotes then of the uncompensated loop
our
DC gain is 5 is not very high we have our poles at
11 kilohertz and then we have a
40 DB per decade slope after that until we get to the
ESR zero at one megahertz and

here are the phase asymptotes when the 1 megahertz switching

frequency and with the need for wide bandwidth this feedback loop
we're going to attempt to obtain a crossover frequency of 100
kilohertz or 1/10 of the switching frequency this is an aggressive
choice so at that frequency of 100 kilohertz here is our
uncompensated loop gain it's something below minus 20 DB at that
frequency so we will need some extra gain in our compensator to
bring this gain up to zero DB for

Break:

verification here's a MATLAB plot of the exact magnitude and phase

response and you can see indeed that it does follow the theory and
our phase at 100 kilohertz is basically minus 180 degrees and we
have next to no phase margin

break:

we'll proceed in a design just as in the previous example with a

crossover frequency of 100 kilohertz and a

desired phase margin of 53 degrees
we need our lead compensator than to look like this where this is
100 kilohertz and we're going to want 53 degrees of phase lead out
of our compensator so that's we get that phase margin when we plug

in to our compensator formulas from the

earlier lectures we find that we need a zero frequency here at 33
kilohertz and the pole frequency at 300 kilohertz

this gain at this point will need to be 20-something DB and when we

work it out we find that the DC gain of our compensator needs to be
15 dB

at this point so then here's the summary of the compensator gain

another thing I would point out here is that the this lead compensator
works out to need a

high-frequency gain of 49 or 34 DB and

practical implementation then would mean that we have a

high frequency
added high frequency pole at say 10 times the crossover
frequency

or 1 megahertz with a gain of 49 at one megahertz

so we need an op-amp then with a gain bandwidth product of at

least 49 megahertz

in order to realize this compensator this is getting to be a pretty high

frequency and more expensive op-amp it's a non-trivial op-amp and
we're going to need very good layout to get this compensator to work

here then is a plot of the compensated loop gain the

orange asymptotes here are the

compensator phase and when

we add those to the blue asymptotes which was the

uncompensated loop then we get the

green asymptotes which is the compensated loop phase

response and here at 100 kilohertz or the crossover frequency we get
our required phase margin this compensator also increases the loop
gain so that we cross over at 100 kilohertz

once we've done this it's now time to add the PI part of the
compensator the DC gain of 28.7 is not bad but we could do more
by simply adding an inverted zero to get the pi compensation as
well and improve the low frequency regulation
so as before we will add an integrator at low frequency we're going
to choose this corner of our our inverted zero to occur at less than one
tenth of the crossover frequency and here the choice was made to
make it 8 kilohertz

so with that addition of the PI compensator then here is our overall

loop gain response including this 8 kilohertz inverted zero and here is
verification with a MATLAB plot of the overall loop gain nough toot in
Phase MATLAB including variation deviations from the asymptotes
predicts a crossover frequency of 105 kilohertz with a phase margin of
51.6 DB degrees now given that design what I want to discuss now
that is new in this example is to verify the closed loop responses and
plot some transient responses so first we'll talk about

the reference to output transfer function 1 over HT over 1 plus T and

recall for this example H is 1

so here in blue where the asymptotes of the loop gain T and

in green then is the transfer function from reference to output which is
T over 1 plus T so we have a low frequency asymptote of 0 DB the
crossover frequency here at 100 kilohertz

and then we follow T after that here is a

MATLAB plot of that function you can see that it indeed looks as
advertised there's a little bit of peaking in the vicinity of 100 kilohertz
which comes from the phase margin of 51.6 degrees so Q is close to
1 and there's a little bit of resonance there here is a simulated plot of
the step response so what we're doing here is applying a 10 millivolt
step in the reference voltage V ref from 1.79 volts to 1.8 volts and
back so the output voltage steps from 1.79 up to 1.8 and then here it
steps back to 1.79 this is the resulting inductor current variation and
this is the duty cycle variation one thing you can see here is that the
duty cycle must take a jump and there's little spike and duty cycle in
order to get the voltage to change this quickly and in fact we can zoom
in on the response here and what we can say is that the duty cycle
doesn't actually saturate if we applied a larger step change in voltage
the duty cycle would hit the maximum value that the pulse width
modulator can make maximum of D of one or perhaps something less
than that and if it did saturate then our transient response would not
look like we expect but since this step is small enough the duty cycle
doesn't saturate and actually we see a step response with an
overshoot that is commensurate with the cue of one that we get from
our phase margin of fifty one point six degrees so this this overshoot
plus the ripple switching ripple are exactly what our small signal
models would would predict next let's plot the output impedance and
then plot the response to a step change in load current if we set our
independent sources and our converter model to zero then the model
reduces to this equivalent circuit and we can work out the open-loop
output impedance from this basically we have the parallel combination
of the two branches and we can construct the asymptotes for that
parallel impedance here are all the asymptotes the inductor capacitor
the load resistance and the ESR down here so first we find a series
combination of the inductor resistance and the inductor which will
follow this and then we put that in parallel with the ESR and the
capacitor here's the ESR and the capacitor you take the smaller of the
two for the parallel combination and we get the the red asymptotes
with some Q factor there at DC then the output impedance is
dominated by the inductor resistance purrs and at high frequency the
output impedance is dominated by the ESR of the capacitor next let's
construct the closed-loop output in peanuts so here is our T here is 1
over 1 plus T which you recall is one above the crossover frequency
and it follows 1 over T below the crossover frequency then we need to
multiply this 1 over 1 plus T function by the open-loop output
impedance to get the closed-loop output in peanuts here is that
computation so this is our 1 over 1 plus T and this one is our open-
loop output impedance and what we need to do then is multiply the
orange asymptotes by the blue asymptotes they're shown in green so
here we follow the open-loop output impedance above the crossover
frequency and below the crossover frequency this open-loop output
impedance gets multiplied by the 1 over 1 plus T function and we get
asked some totes then let that do this so you can see that the
maximum value of the output impedance happens at the crossover
frequency right there and add some frequencies below that in fact
from working out the asymptotes we're at it works out that we're at 8
milli ohms right there at the crossover frequency which is in fact the
valid value of the capacitor impedance at the crossover frequency it's
just below minus 40 DB ohms and at lower frequencies and higher
frequencies we have lower impedance than that what would you
expect then would be the voltage deviation that would be caused by a
step change in load current well perhaps it's hard to do the inverse
Laplace transform in your head but one thing I can say just as a first-
order approximation the step change in load current has a wide
spectrum of frequency components and the ones at this these
frequencies where the output impedance is maximum will cause have
the most effect on the voltage deviation for verification here is a
MATLAB plot of the closed-loop output impedance and you can see
that it does indeed look like the asymptotes that I constructed on the
last slide with a similar kind of maximum that's just under minus 40 DB
ohms and with a little bit of peaking right here in at the crossover
frequency in the vicinity of 100 kilohertz and here is a MATLAB plot of
the response to a step change in load current so here that we're
making the load current change from two and a half to five amps and
back so it does this in response to that here is the transient that we
get in the output voltage in the inductor current and in the duty cycle
and the the output voltage transient is magnified right here first of all
you can see that the settling time is about 10 microseconds so that's
the time from here to here and that time is commensurate with our
loop bandwidth of 100 kilohertz in addition the magnitude of this the
voltage deviation is about 15 millivolts from 1.8 volts it dips down to
one point seven eight five volts so if we take a 2.5 amp change in
current and multiply that by this maximum output impedance of eight
millionths that works out to be what 20 millivolts so that's this rule of
thumb approximate estimate of how large the voltage variation will be
okay we actually have 15 millivolts instead of 20 according to the
simulation but if we wanted to reduce this step change we would need
a yet higher crossover frequency or we would need more capacitance
on our output one or the other in order to reduce the the maximum
output impedance of our converter so I've Illustrated another example
this is a fairly up-to-date point of load power converter it it is a
challenging design and requires good engineering you need to know
what you're doing as far as working out the closed-loop responses
and closed-loop output impedances in order to meet the kind of
demanding specs that we have nowadays for these kinds of power
systems