Binary Adder

The registers play an important role in performing the micro-operations. The registers hold the digital component and the data which
performs the arithmetic operation. The Binary Adder is a logical circuit which is used to perform the addition operation of two binary
number of any length.
The Binary Adder is formed with the help of the Full-Adder circuit. The Full-Adders are connected in series, and the output carry of
the first Adder will be treated as the input carry of the next Full-Adder.
N-Bit Parallel Adder
The Full Adder is used to sum two single-bit binary numbers with carry input. In digital calculation, we need to add two n-bit binary
numbers rather than only single-bit binary numbers. For this purpose, we need to use n-bit parallel Adder. In order to get N-bit parallel
adder, we cascade the n number of Full Adders. The carry output of the first Adder is treated as the carry input of the second Adder.
4-bit Binary Adder

o The 'A' and 'B' are the augend, and addend bits are defined by the subscript numbers. The subscripts start from right to left,
and the lower-order bit is defined by subscript '0'.
o The C0, C1, C2, and C3 are the carry inputs which are connected together as a chain using Full Adder. The C4 is the carry
output produced by the last Full-Adder.
o The Cout of the first Adder is connected as the Cin of the next Full-Adder.
o The S0, S1, S2, and S3 are the sum outputs that produce the sum of augend and addend bits.
o The inputs for the input variable 'A' and 'B' are fetched from different source registers. For example, the bit for the input
variable 'A' comes from register 'R1', and a bit for the input variable 'B' comes from register 'R2'.
o The outcome produced by adding both input variables is stored into either third register or to one of the source registers.
Parallel Adder and Parallel Subtractor
Parallel Adder –
A single full adder performs the addition of two one bit numbers and an input carry. But a Parallel Adder is a digital circuit
capable of finding the arithmetic sum of two binary numbers that is greater than one bit in length by operating on
corresponding pairs of bits in parallel. It consists of full adders connected in a chain where the output carry from each full
adder is connected to the carry input of the next higher order full adder in the chain. A n bit parallel adder requires n full
adders to perform the operation. So for the two-bit number, two adders are needed while for four bit number, four adders
are needed and so on. Parallel adders normally incorporate carry lookahead logic to ensure that carry propagation between
subsequent stages of addition does not limit addition speed.
Working of parallel Adder –

1. As shown in the figure, firstly the full adder FA1 adds A1 and B1 along with the carry C1 to generate the sum S1 (the
first bit of the output sum) and the carry C2 which is connected to the next adder in chain.
2. Next, the full adder FA2 uses this carry bit C2 to add with the input bits A2 and B2 to generate the sum S2(the second bit
of the output sum) and the carry C3 which is again further connected to the next adder in chain and so on.
3. The process continues till the last full adder FAn uses the carry bit Cn to add with its input An and Bn to generate the last
bit of the output along last carry bit Cout.
Parallel Subtractor –
A Parallel Subtractor is a digital circuit capable of finding the arithmetic difference of two binary numbers that is greater
than one bit in length by operating on corresponding pairs of bits in parallel. The parallel subtractor can be designed in
several ways including combination of half and full subtractors, all full subtractors or all full adders with subtrahend
complement input.
Working of Parallel Subtractor –
1. As shown in the figure, the parallel binary subtractor is formed by combination of all full adders with subtrahend
complement input.
2. This operation considers that the addition of minuend along with the 2’s complement of the subtrahend is equal to their
subtraction.
3. Firstly the 1’s complement of B is obtained by the NOT gate and 1 can be added through the carry to find out the 2’s
complement of B. This is further added to A to carry out the arithmetic subtraction.
4. The process continues till the last full adder FAn uses the carry bit Cn to add with its input An and 2’s complement of Bn
to generate the last bit of the output along last carry bit Cout.
Advantages of parallel Adder/Subtractor –
1. The parallel adder/subtractor performs the addition operation faster as compared to serial adder/subtractor.
2. Time required for addition does not depend on the number of bits.
3. The output is in parallel form i.e all the bits are added/subtracted at the same time.
4. It is less costly.
Disadvantages of parallel Adder/Subtractor –
1. Each adder has to wait for the carry which is to be generated from the previous adder in chain.
2. The propagation delay( delay associated with the travelling of carry bit) is found to increase with the increase in the
number of bits to be added.

5-Bit Parallel Binary Adder

We have completed discussion about 2-bit parallel binary adder; now you must be knowing that if we have
two numbers with 5-bits than what we need. We will definitely use 5-bit parallel binary adder for performing
this task.
Let’s focus on the block diagram of the 5-bit parallel binary adder. It consists of 5-full adders, each of the 5-full
adders have 3-input terminals and 2-output terminals. The 2-input terminals are available for entering two
numbers to be added and one input terminal is used for entering the previous carry.

The carry generated from the addition will be generated from Cout terminal. The sum of the addition will be
generated from the sum bit of the adder. It must be noted here that Cout stands for Carry-out and Cin stands for
Carry-in. The connection will be such that the Cout terminal of a full adder will be connected to the Cin
terminal of next full adder used for higher order column.

For addition of LSBs, we have a choice of either to use half adder or to use full adder. This is because we don’t
have the previous carry so half adder can also be used. If we wish to use full adder, then Cin terminal of the full
adder can be grounded.
 For other full adders connected to higher order column, this will not be a major issue. This is because the Cout
terminal of the previous adder can be connected to the Carry-in of adders connected to higher order columns.
Significance of Parallel Binary Adder
With the help of full adder, we cannot add numbers of more than 1-bit. As the number of bits increases in a number,
the columns of addition also increase. A full adder can add only one column; thus for every column, we need a full
adder. This combined design of all full adder results in a combinational circuit which is called parallel binary adder.

Advantages and Disadvantages of Parallel Binary Adders

The advantage of using Parallel binary adder is its fast processing. It is certainly beneficial for the addition of numbers
with more than 1-bit. Apart from this during the addition process the all the bits are fed to the input terminals of adder
simultaneously.
Now, You can easily compare this process with conventional addition process which we do with pen and paper. But in
that we add one column at a time and in this several columns can be added simultaneously. Now you can estimate the
speed of addition with the help of parallel binary adder; it is extremely fast.
Everything comes with pros and cons. Thus, parallel adders also have its own pros and cons, but the former
outweighs the latter. If parallel connected full adders can increase the speed of operation, then these parallel-connected
adders are also responsible for the increased complexity of the circuit. The higher the number of bits the more will be
the circuit complexity.