Single-Supply 42 V

System
Difference Amplifier
AD8205
FEATURES FUNCTIONAL BLOCK DIAGRAM
V+
Ideal for current shunt applications 6

High common-mode voltage range

8 +IN
−2 V to +65 V operating 5 OUT
1 –IN
−5 V to +68 V survival
Gain = 50
Wide operating temperature range AD8205 7 VREF1

Die: −40°C to +150°C

8-lead SOIC: −40°C to +125°C 3 VREF2
4 NC
Adjustable offset
2
Available in SOIC and die form
GND
NC = NO CONNECT
EXCELLENT AC AND DC PERFORMANCE
15 µV/°C offset drift 30 Figure 1.
ppm/°C gain drift 80 dB
CMRR dc to 20 kHz

APPLICATIONS
High-side current sensing in:
Motor controls
Transmission controls
Diesel injection controls
Engine management
Suspension controls
Vehicle dynamic controls DC-to-dc
converters

GENERAL DESCRIPTION
The AD8205 is a single-supply difference amplifier for Excellent dc performance over temperature keeps errors in the
amplifying small differential voltages in the presence of large measurement loop to a minimum. Offset drift is typically less
commonmode voltages. The operating input common-mode than 15 µV/°C, and gain drift is typically below 30 ppm/°C.
voltage range extends from −2 V to +65 V. The typical single- The output offset can be adjusted from 0.05 V to 4.8 V with a
supply voltage is 5 V. 5 V supply by using the VREF1 and VREF2 pins. With VREF1
The AD8205 is offered in die and packaged form. The attached to the V+ pin, and VREF2 attached to the GND pin, the
operating temperature range for the die is 25°C higher (up to output is set at half scale. Attaching both pins to GND causes
150°C) than the packaged part to enable the user to apply the the output to be unipolar, starting near ground. Attaching both
AD8205 in high temperature applications. pins to V+ causes the output to be unipolar starting near V+.
Other offsets can be obtained by applying an external voltage
to the VREF1 and VREF2 pins.

Rev. 0
 Information furnished by Analog Devices is believed to be accurate and reliable. However,
no responsibility is assumed by Analog Devices for its use, nor for any infringements of
patents or other rights of third parties that may result from its use. Specifications subject
to change without notice. No license is granted by implication or otherwise under any
patent or patent rights of Analog Devices. Trademarks and registered trademarks are the
property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog
Devices, Inc. All rights reserved.
External Reference
TABLE OF CONTENTS Output........................................................ 10
Specifications...............................................................................
...... 3 Splitting the Supply
.................................................................... 10
Absolute Maximum
Ratings............................................................ 4 Splitting an External Reference
................................................ 10
ESD
Caution.................................................................................. 4 Applications..................................................................................
... 11
Pin Configuration and Function Descriptions.............................
5 High-Side Current Sense with a Low-Side Switch.................
11
Typical Performance Characteristics
............................................. 6 High-Side Current Sense with a High-Side Switch ...............
11
Theory of Operation
........................................................................ 8 Outline

Output Offset Dimensions....................................................................... 12

Adjustment............................................................... 9 Ordering Guide
Unidirectional Operation............................................................ .......................................................................... 12
9

Ground Referenced Output ........................................................

9

V+ Referenced Output.................................................................
9

REVISION HISTORY
4/04—Revision 0: Initial Version

Bidirectional
Operation................................................................9
SPECIFICATIONS
TA = Operating Temperature Range, VS = 5 V, unless otherwise noted.
Table 1.
AD8205 SOIC AD8205 DIE
Parameter Conditions Min Typ Max Min Typ Max Unit
GAIN
Initial 50 50 V/V
Accuracy VO ≥ 0.1 V dc, 25°C ±1 ±1 %
Accuracy Over Temperature Specified Temperature Range ±1.2 ±1.3 %
Gain vs. Temperature ±30 ±30 ppm/°C
VOLTAGE OFFSET
Offset Voltage (RTI) 25°C ±2 ±2.5 mV
Over Temperature (RTI) Specified Temperature Range ±4.5 ±6 mV
Offset Drift 15 15 µV/°C
INPUT
Input Impedance kΩ
Differential 400 400
Common Mode 200 200 kΩ
Input Voltage Range Common Mode, Continuous −2 65 −2 65 V
Differential1 100 100 mV
Common-Mode Rejection 25°C, f = DC to 20 kHz2 78 86 78 86 dB
Operating Temperature Range, f 76 80 76 80 dB
= DC to 20 kHz2
OUTPUT
Output Voltage Range RL = 25 kΩ 0.05 4.8 0.05 4.8 V
Output Resistance 200 200 Ω
DYNAMIC RESPONSE
Small Signal −3 dB Bandwidth 50 50 kHz
Slew Rate 0.5 0.5 V/µs
NOISE
0.1 Hz to 10 Hz, RTI 20 20 µV p-p
Spectral Density, 1 kHz, RTI 0.5 0.5 µV/√Hz
OFFSET ADJUSTMENT
Ratiometric Accurancy3 Divider to Supplies 0.497 0.503 0.497 0.503 V/V
Accuracty, RTO Voltage applied to VREF1 and VREF2 in ±2 ±2 mV/V
Parallel

1 Input voltage range = ±50 mV with half-scale offset.

2 Source imbalance < 2 Ω.
3 The offset adjustment is ratiometric to the power supply when V 1 and V 2 are used as a divider between the supplies.
REF REF
 Output Offset Adjustment Range VS = 5 V 0.05 4.8 0.05 4.8 V
VREF Divider Resistor Values 24 32 40 24 32 40 kΩ
POWER SUPPLY Operating
Range 4.5 5.5 4.5 5.5 V
Quiescent Current Over Temperature VO = 0.1 V dc 2 2 mA
Power Supply Rejection Ratio 70 70 dB
Temperature Range
For Specified Performance Operating Temperature Range −40 +125 −40°C +150 °C

ABSOLUTE MAXIMUM RATINGS

Table 2.
Parameter Rating Stresses above those listed under Absolute Maximum Ratings may
Supply Voltage 12.5 V cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions
Continuous Input Voltage −5 V to +68 V
above those indicated in the operational section of this specification is
Reverse Supply Voltage 0.3 V not implied. Exposure to absolute maximum rating conditions for
Operating Temperature Range −40°C to +125°C extended periods may affect device reliability.
Storage Temperature −65 to +150C
Output Short-Circuit Duration Indefinite

ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features proprietary
ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.

Rev. 0 | Page 4 of 12
 AD8205

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

–IN 1 8 +IN

GND 2 AD8205 7 VREF1

TOP VIEW
VREF2 3 (Not to Scale) 6 V+

NC 4 5 OUT

NC = NO CONNECT
Figure 3. Pin Configuration

Table 3. Pin Pin No. Mnemonic X Y

Function 1 −IN −206 508
Descriptions 2 GND −447 57
3 VREF2 −432 −457
4 NC N/A N/A
5 OUT 444 −472
6 V+ 444 −203
7 VREF1 456 434
Figure 2. Metallization Diagram
8 +IN 203 509

Die size is 1170 µm by 1280 µm.

Die thickness is 13 mil.

Minimum passivation opening (minimum bond pad size) is

92 µm × 92 µm.
Passivation type is 8KA USG (Oxide) + 10KA Oxynitride.
Bond pad metal composition is 98.5% Al, 1% Si, and 0.5%
Cu.

Backside potential is V+.

Rev. 0 | Page 5 of 12
 Figure 6. Gain Drift
TYPICAL PERFORMANCE 40

CHARACTERISTICS 35

500
30
400
25
300

200 20

100 15
TYP. V OSI (DIE)
0
10
–100
TYP. V OSI (SOIC) 5
–200

–300 0
10 100 1k 10k 100k 1M
–400 FREQUENCY (Hz)

Figure 7. Typical Small Signal Bandwidth (VOUT = 200 mV p-p)

–500
–40 –20 0 20 40 60 80 100 120 140
TEMPERATURE ( °C)
Figure 4. Typical Offset Drift
50mV/DIV
120

110

100

90

80
70

60
1V/DIV
50
40

30 40µs/DIV
20

10
Figure 8. Rise/Fall Time
0
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz) 100mV/DIV
Figure 5. CMR vs. Frequency

12000

10000
8000

6000 2V/DIV

4000
2000
TYP. IN SOIC
0

–2000
–4000
TYP. DIE
–6000 2µs/DIV
–8000

–10000
Figure 9. Differential Overload Recovery (Falling)
–12000
–40 –20 0 20 40 60 80 100 120 140
TEMPERATURE ( °C)

Rev. 0 | Page 6 of 12
 AD8205

50V/DIV
100mV/DIV

50mV/DIV

2V/DIV

2µs/DIV 1µs/DIV

Figure 10. Differential Overload Recovery (Rising) Figure 12. Common-Mode Response

2V/DIV

0.01%/DIV

40µs/DIV

Figure 11. Settling Time

input offset is less than 6 mV referred to the input over the die
THEORY OF OPERATION operating temperature range.
The AD8205 is a single-supply difference amplifier that uses a
unique architecture to accurately amplify small differential The AD8205 operates with a single supply from 4.5 V to 10 V
current shunt voltages in the presence of rapidly changing (absolute maximum = 12.5 V). The supply current is less than
commonmode voltages. It is offered in both packaged and die 2 mA.
form.
High accuracy trimming of the internal resistors allows the
In typical applications, the AD8205 is used to measure current AD8205 to have a common-mode rejection ratio better than
by amplifying the voltage across a current shunt placed across 78 dB from dc to 20 kHz. The common-mode rejection ratio
the inputs. over the operating temperature is 76 dB for both the die and
packaged part.
The gain of the AD8205 is 50 V/V, with an accuracy of 1.2%.
This accuracy is guaranteed over the operating temperature The output offset can be adjusted from 0.05 V to 4.8 V (V+ =
range of −40°C to +125°C. The die temperature range is −40°C 5 V) for unipolar and bipolar operation.
to +150°C with a guaranteed gain accuracy of 1.3%.
The AD8205 consists of two amplifiers (A1 and A2), a resistor
The input offset is less than 2 mV referred to the input at 25°C, network, small voltage reference, and a bias circuit (not
and 4.5 mV maximum referred to the input over the full shown), see Figure 13.
operating temperature range for the packaged part. The die

Rev. 0 | Page 7 of 12
The set of input attenuators preceding A1 consist of R A, RB, and The gain is 1 V/V from the reference pins to the output when
RC, which reduce the common-mode voltage to match the input the reference pins are used in parallel. The gain is 0.5 V/V
voltage range of A1. The two attenuators form a balanced when they are used to divide the supply.
bridge network. When the bridge is balanced, the differential
voltage created by a common-mode voltage is 0 V at the inputs The ratios of Resistors RA, RB, RC, RD, and RF are trimmed to a
of A1. The input attenuation ratio is 1/16.7. The combined high level of precision to allow the common-mode rejection
series resistance of RA, RB, and RC is approximately 200 kΩ ± ratio to exceed 80 dB. This is accomplished by laser trimming
20%. the resistor ratio matching to better than 0.01%.

By attenuating the voltages at Pin 1 and Pin 8, the A1 amplifier The total gain of 50 is made up of the input attenuation of
inputs are held within the power supply range, even if Pin 1 1/16.7 multiplied by the first stage gain of 26 and the second
and Pin 8 exceed the supply or fall below common (ground). A stage gain of 32.15.
reference voltage of 250 mV biases the attenuator above The output stage is Class A with a PNP pull-up transistor and a
ground. This allows the amplifier to operate in the presence of 300 µA current sink pull-down.
negative common-mode voltages.
–IN +IN

The input network also attenuates normal (differential) mode RA RA

voltages. A1 amplifies the attenuated signal by 26. The input
and output of this amplifier are differential to maximize the ac A1

common-mode rejection. RB RB RF RF RD RD

A2 converts the differential voltage from A1 into a single-

A2 VOUT
ended signal and provides further amplification. The gain of RC RC

this second stage is 32.15. RE RF VREF1

AD8205 RREF
250mV
The reference inputs, VREF1 and VREF2, are tied through
RREF
resistors to the positive input of A2, which allows the output GND VREF2
offset to be adjusted anywhere in the output operating range.

Figure 13. Simplified Schematic

GROUND REFERENCED OUTPUT

OUTPUT OFFSET ADJUSTMENT When using the AD8205 in this mode, both reference inputs
The output of the AD8205 can be adjusted for unidirectional
are tied to ground, which causes the output to sit at the
or bidirectional operation. negative rail when there are zero differential volts at the
input (see Figure 14).
UNIDIRECTIONAL OPERATION
Unidirectional operation allows the AD8205 to measure
V+
currents through a resistive shunt in one direction. The basic +IN
modes for unidirectional operation are ground referenced OUT
–IN
output mode and V+ referenced output mode.

In the case of unidirectional operation, the output could be VREF1

set at the negative rail (near ground) or at the positive rail AD8205
(near V+) when the differential input is 0 V. The output
moves to the opposite rail when a correct polarity
differential input voltage is applied. In this case, full scale is NC VREF2
GND
approximately 100 mV. The required polarity of the
differential input depends on the output voltage setting. If NC = NO CONNECT

the output is set at the positive rail, the input polarity needs
to be negative to move the output down. If the output is set
Figure 14. Ground Referenced Output
at ground, the polarity is positive to move the output up.

Table 4. V+ = 5 V
VIN (Referred to −IN) VO

Rev. 0 | Page 8 of 12
 AD8205

0V 0.05 V Adjusting the output is accomplished by applying voltage(s) to

the reference inputs.
100 mV 4.8 V
VREF1 and VREF2 are tied to internal resistors that connect to an
internal offset node. There is no operational difference between
the pins.

EXTERNAL REFERENCE OUTPUT

Tying both pins together and to a reference produces an output at
the reference voltage when there is no differential input (see
Figure 16). The output moves down from the reference voltage
V+ REFERENCED OUTPUT
when the input is negative relative to the −IN pin and up when
This mode is set when both reference pins are tied to the positive the input is positive relative to the −IN pin.
supply. It is typically used when the diagnostic scheme requires
detection of the amplifier and the wiring before power is applied
V+
to the load (see Figure 15).
+IN
OUT
–IN
V+
+IN
OUT VREF1
–IN AD8205 2.5V VOLTAGE
REFERENCE

VREF1
AD8205
NC VREF2
GND

NC = NO CONNECT
NC VREF2
GND
Figure 16. External Reference Output
NC = NO CONNECT

SPLITTING THE SUPPLY

Figure 15. V+ Referenced Output By tying one reference pin to V+ and the other to the ground pin,
the output is set at half of the supply when there is no differential
Table 5. V+ = 5 V input (see Figure 17). The benefit is that no external reference is
required to offset the output for bidirectional current
VIN (Referred to −IN) VO
measurement. This creates a midscale offset that is ratiometric to
0V 4.8 V the supply, which means that if the supply increases or decreases,
100 mV 0.05 V the output remains at half the supply. For example, if the supply
is 5.0 V, the output is at half scale or 2.5 V. If the supply increases
by 10% (to 5.5 V), the output goes to 2.75 V.
BIDIRECTIONAL OPERATION
Bidirectional operation allows the AD8205 to measure currents
through a resistive shunt in two directions. V+
+IN
OUT
In this case, the output is set anywhere within the output range. –IN
Typically, it is set at half-scale for equal range in both directions.
In some cases, however, it is set at a voltage other than half-scale VREF1
when the bidirectional current is nonsymmetrical. AD8205

Table 6. V+ = 5 V, VO = 2.5 with VIN = 0 V

NC VREF2
VIN (Referred to −IN) VO GND

+40 mV 4.5 V NC = NO CONNECT

−40 mV 0.5 V
Figure 17. Split Supply

Rev. 0 | Page 9 of 12
SPLITTING AN EXTERNAL REFERENCE
In this case, an external reference is divided by 2 with an V+
accuracy of approximately 0.5% by connecting one V REF pin to +IN
OUT
ground and the other VREF pin to the reference (see Figure 18). –IN

VREF1
AD8205 5V VOLTAGE
REFERENCE

NC VREF2
GND

NC = NO CONNECT

Figure 18. Split External Reference

Figure 19. Low-Side Switch

APPLICATIONS
A typical application for the AD8205 is high-side measurement HIGH-SIDE CURRENT SENSE WITH A HIGH-SIDE
of a current through a solenoid for PWM control of the SWITCH
solenoid opening. Typical applications include hydraulic This configuration minimizes the possibility of unexpected
transmission control and diesel injection control. solenoid activation and excessive corrosion (see Figure 20). In
this case, both the switch and the shunt are on the high side.
Two typical circuit configurations are used for this type of
When the switch is off, this removes the battery from the load,
application.
which prevents damage from potential shorts to ground, while
HIGH-SIDE CURRENT SENSE WITH A LOW-SIDE still allowing the recirculating current to be measured and
providing for diagnostics. Removing the power supply from
SWITCH the load for the majority of the time minimizes the corrosive
In this case, the PWM control switch is ground referenced. An effects that could be caused by the differential voltage between
inductive load (solenoid) is tied to a power supply. A resistive the load and ground.
shunt is placed between the switch and the load (see Figure
19). An advantage of placing the shunt on the high side is that
the entire current, including the re-circulation current, can be When using a high-side switch, the battery voltage is
measured since the shunt remains in the loop when the switch connected to the load when the switch is closed, causing the
is off. In addition, diagnostics can be enhanced because shorts commonmode voltage to increase to the battery voltage. In this
to ground can be detected with the shunt on the high side. case, when the switch is opened, the voltage reversal across the
inductive load causes the common-mode voltage to be held
In this circuit configuration, when the switch is closed, the one diode drop below ground by the clamp diode.
common-mode voltage moves down to near the negative rail. 5V

When the switch is opened, the voltage reversal across the

inductive load causes the common-mode voltage to be held SWITCH

one diode drop above the battery by the clamp diode. 42V +IN VREF1 +VS OUT
5V BATTER Y

INDUCTIVE
SHUNT AD8205
CLAMP LOAD –IN GND VREF2 NC
DIODE CLAMP
DIODE
42V +IN VREF1 +VS OUT
BATTER Y INDUCTIVE
LOAD
SHUNT AD8205
–IN GND VREF2 NC NC = NO CONNECT

Figure 20. High-Side Switch

SWITCH
Another typical application for the AD8205 is as part of the
control loop in H-bridge motor control. In this case, the
NC = NO CONNECT

Rev. 0 | Page 10 of 12
 AD8205
AD8205 is placed in the middle of the H-bridge (see Figure
CONTROLLER
21) so that it can accurately measure current in both directions 5V

by using the shunt available at the motor. This is a better

solution than a ground referenced op amp because ground is MOTOR +IN VREF1 +VS OUT
not typically a stable reference voltage in this type of AD8205
SHUNT
application. This instability in the ground reference causes the –IN GND VREF2 NC
5V
measurements that could be made with a simple ground
referenced op amp to be inaccurate.
2.5V

The AD8205 measures current in both directions as the H- NC = NO CONNECT

bridge switches and the motor changes direction. The output of
the AD8205 is configured in an external reference bidirectional Figure 21. Motor Control Application
mode, see the Output Offset Adjustment section.

OUTLINE DIMENSIONS

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

Figure 22. 8-Lead Standard Small Outline Package [SOIC]

Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)

ORDERING GUIDE
Models Temperature Range Package Description Package Option
AD8205YR −40°C to +125°C 8-Lead SOIC R-8
AD8205YR-REEL −40°C to +125°C 8-Lead SOIC, 13” Tape and Reel R-8
AD8205YR-REEL7 −40°C to +125°C 8-Lead SOIC, 7” Tape and Reel R-8
AD8205YCSURF −40°C to +150°C Die Form

Rev. 0 | Page 11 of 12
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered
trademarks are the property of their respective owners.
D04315–0–4/04(0)

Rev. 0 | Page 12 of 12