OPA1632

SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006

High-Performance, Fully-Differential
AUDIO OP AMP
FEATURES DESCRIPTION
D SUPERIOR SOUND QUALITY The OPA1632 is a fully-differential amplifier designed
D ULTRA LOW DISTORTION: 0.000022% for driving high-performance audio analog-to-digital
converters (ADCs). It provides the highest audio quality,
D LOW NOISE: 1.3nV/√Hz
with very low noise and output drive characteristics
D HIGH SPEED: optimized for this application. The OPA1632’s excellent
− Slew Rate: 50V/µs gain bandwidth of 180MHz and very fast slew rate of
− Gain Bandwidth: 180MHz 50V/µs produce exceptionally low distortion. Very low
D FULLY DIFFERENTIAL ARCHITECTURE: input noise of 1.3nV/√Hz further ensures maximum
signal-to-noise ratio and dynamic range.
− Balanced Input and Output Converts
Single-Ended Input to Balanced The flexibility of the fully differential architecture allows
Differential Output for easy implementation of a single-ended to
fully-differential output conversion. Differential output
D WIDE SUPPLY RANGE: ±2.5V to ±16V reduces even-order harmonics and minimizes
D SHUTDOWN TO CONSERVE POWER common-mode noise interference. The OPA1632
provides excellent performance when used to drive
APPLICATIONS high-performance audio ADCs such as the PCM1804.
A shutdown feature also enhances the flexibility of this
D AUDIO ADC DRIVER amplifier.
D BALANCED LINE DRIVER The OPA1632 is available in an SO-8 package and a
D BALANCED RECEIVER thermally-enhanced MSOP-8 PowerPAD package.
D ACTIVE FILTER
RELATED DEVICES
D PREAMPLIFIER
OPAx134 High-Performance Audio Amplifiers
OPA627/637 Precision High-Speed DiFET Amplifiers
OPAx227/x228 Low-Noise Bipolar Amplifiers

THD + NOISE vs FREQUENCY

0.001
Gain = +1
+15V RF = 348Ω
VO = 3Vrms
Digital Differential I/O
THD + Noise (%)

VIN+ VIN− Output

VOCM
VIN− VIN+ 0.0001
VCOM

RL = 600Ω
−15V

RL = 2kΩ
0.00001
10 100 1000 10k 100k
Typical ADC Circuit
Frequency (Hz)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

             
 Copyright  2003−2006, Texas Instruments Incorporated
                  

   !       !   

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PACKAGE/ORDERING INFORMATION(1)
SPECIFIED
PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE-LEAD DRAWING RANGE MARKING NUMBER MEDIA, QUANTITY
OPA1632D Rails, 100
SO-8 D −40°C to +85°C OPA1632
OPA1632DR Tape and Reel, 2500
OPA1632
MSOP-8 OPA1632DGN Rails, 100
DGN −40°C to +85°C 1632
PowerPAD OPA1632DGNR Tape and Reel, 2500
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.

This integrated circuit can be damaged by ESD. Texas

ABSOLUTE MAXIMUM RATINGS(1)(2) Instruments recommends that all integrated circuits be
over operating free-air temperature range unless otherwise noted. handled with appropriate precautions. Failure to observe
Supply Voltage, ±VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±16.5V proper handling and installation procedures can cause damage.
Input Voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS
Output Current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150mA ESD damage can range from subtle performance degradation to
Differential Input Voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3V complete device failure. Precision integrated circuits may be more
Maximum Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C susceptible to damage because very small parametric changes could
Operating Free-Air Temperature Range . . . . . . . . . . . . . . . −40°C to +85°C cause the device not to meet its published specifications.
Storage Temperature Range, TSTG . . . . . . . . . . . . . . . . . −65°C to +150°C
ESD Ratings: Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1kV
Charge Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V PIN CONFIGURATION
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200V

(1) Stresses above these ratings may cause permanent damage. Top View MSOP, SO
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied. OPA1632
(2) The OPA1632 MSOP-8 package version incorporates a
PowerPAD on the underside of the chip. This acts as a heatsink VIN− 1 8 VIN+
and must be connected to a thermally dissipative plane for proper
power dissipation. Failure to do so may result in exceeding the VOCM 2 7 Enable
maximum junction temperature, which can permanently damage
V+ 3 6 V−
the device. See TI technical brief SLMA002 for more information
about using the PowerPAD thermally enhanced package. VOUT+ 4 5 VOUT−

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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006

ELECTRICAL CHARACTERISTICS: VS = ±15V

VS = ±15V: RF = 390Ω, RL = 800Ω, and G = +1, unless otherwise noted.

OPA1632
PARAMETER CONDITIONS MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage ±0.5 ±3 mV
vs Temperature dVos/dT ±5 µV/_C
vs Power Supply, DC PSRR 316 13 µV/V
INPUT BIAS CURRENT
Input Bias Current IB 2 6 µA
Input Offset Current IOS ±100 ±500 nA
NOISE
Input Voltage Noise f = 10 kHz 1.3 nV/√Hz
Input Current Noise f = 10 kHz 0.4 pA/√Hz
INPUT VOLTAGE
Common-Mode Input Range (V−) + 1.5 (V+) − 1 V
Common-Mode Rejection Ratio, DC 74 90 dB
INPUT IMPEDANCE
Input Impedance (each input pin) 34 || 4 MΩ || pF
OPEN-LOOP GAIN
Open-Loop Gain , DC 66 78 dB
FREQUENCY RESPONSE
Small-Signal Bandwidth G = +1, RF= 348Ω 180 MHz
(VO = 100mVPP, Peaking < 0.5 dB) G = +2, RF = 602Ω 90 MHz
G = +5, RF = 1.5kΩ 36 MHz
G = +10, RF = 3.01kΩ 18 MHz
Bandwidth for 0.1dB Flatness G = +1, VO = 100mVPP 40 MHz
Peaking at a Gain of 1 VO = 100mVPP 0.5 dB
Large-Signal Bandwidth G = +2, VO = 20VPP 800 kHz
Slew Rate (25% to 75% ) G = +1 50 V/µs
Rise and Fall Time G = +1, VO = 5V Step 100 ns
Settling Time to 0.1% G = +1, VO = 2V Step 75 ns
0.01% G = +1, VO = 2V Step 200 ns
Total Harmonic Distortion + Noise G = +1, f = 1kHz, VO = 3Vrms
Differential Input/Output RL = 600Ω 0.0003 %
Differential Input/Output RL = 2kΩ 0.000022 %
Single-Ended In/Differential Out RL = 600Ω 0.000059 %
Single-Ended In/Differential Out RL = 2kΩ 0.000043 %
Intermodulation Distortion G = +1, SMPTE/DIN, VO = 2VPP
Differential Input/Output RL = 600Ω 0.00008 %
Differential Input/Output RL = 2kΩ 0.00005 %
Single-Ended In/Differential Out RL = 600Ω 0.0001 %
Single-Ended In/Differential Out RL = 2kΩ 0.0007 %
Headroom THD < 0.01%, RL = 2kΩ 20.0 VPP
OUTPUT
Voltage Output Swing RL = 2kΩ (V+) − 1.9 (V−) + 1.9 V
RL = 800Ω (V+) − 4.5 (V−) + 4.5 V
Short-Circuit Current ISC Sourcing/Sinking +50/−60 85 mA
Closed-Loop Output Impedance G = +1, f = 100kHz 0.3 Ω
POWER-DOWN(1)
Enable Voltage Threshold (V−) + 2 V
Disable Voltage Threshold (V−) + 0.8 V
Shutdown Current VENABLE = −15V 0.85 1.5 mA
Turn-On Delay Time for IQ to Reach 50% 2 µs
Turn-Off Delay Time for IQ to Reach 50% 2 µs
POWER SUPPLY
Specified Operating Voltage ±15 ±16 V
Operating Voltage ±2.5 V
Quiescent Current IQ Per Channel 14 17.1 mA
TEMPERATURE RANGE
Specified Range −40 +85 _C
Operating Range −40 +125 _C
Storage Range −65 +150 _C
Thermal Resistance qJA 200 _C/W
(1) Amplifier has internal 50kΩ pull-up resistor to VCC+ pin. This enables the amplifier with no connection to shutdown pin.

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TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.

THD + NOISE vs FREQUENCY THD + NOISE vs FREQUENCY

0.001 0.001
Gain = +1 Gain = +1
RF = 348Ω RF = 348Ω
VO = 3Vrms VO = 3Vrms
Differential I/O Single−Ended Input
THD + Noise (%)

THD + Noise (%)

Differential Output

0.0001 0.0001
RL = 600Ω

RL = 600Ω
RL = 2kΩ

RL = 2kΩ
0.00001 0.00001
10 100 1k 10k 100k 10 100 1k 10k 100k
Frequency (Hz) Frequency (Hz)

THD + NOISE vs OUTPUT VOLTAGE THD + NOISE vs OUTPUT VOLTAGE

0.1 0.01
Gain = +1
RF = 348Ω
f = 1kHz
0.01 Differential I/O
THD + Noise (%)

THD + Noise (%)

0.001
RL = 600Ω RL = 600Ω
0.001

RL = 2kΩ 0.0001 Gain = +1 RL = 2kΩ

0.0001 RF = 348Ω
f = 1kHz
Single−Ended Input
Differential Output
0.00001 0.00001
0.01 0.1 1 10 100 0.01 0.1 1 10 100
Differential Output Voltage (Vrms) Differential Output Voltage (Vrms)

INTERMODULATION DISTORTION INTERMODULATION DISTORTION

vs OUTPUT VOLTAGE vs OUTPUT VOLTAGE
0.1 0.1

0.01 0.01
IMD (%)

IMD (%)

RL = 600Ω RL = 600Ω
0.001 0.001
Gain = +1
Gain = +1 RF = 348Ω RL = 2kΩ
0.0001 RF = 348Ω 0.0001 Single−Ended Input
Differential I/O Differential Output
SMPTE 4:1; 60Hz, 7kHz R L = 2kΩ SMPTE 4:1; 60Hz, 7kHz
DIN 4:1; 250Hz, 8kHz DIN 4:1; 250Hz, 8kHz
0.00001 0.00001
0.01 0.1 1 10 100 0.01 0.1 1 10 100
Differential Output Voltage (VPP ) Differential Output Voltage (VPP )

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TYPICAL CHARACTERISTICS (Cont.)

At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.

VOLTAGE NOISE vs FREQUENCY CURRENT NOISE vs FREQUENCY

10 10
Vn (nV/√Hz)

In (pA/√Hz)
1

1 0.1
10 100 1k 10k 100k 10 100 1k 10k 100k
Frequency (Hz) Frequency (Hz)

OUTPUT VOLTAGE OUTPUT IMPEDANCE

vs DIFFERENTIAL LOAD RESISTANCE vs FREQUENCY
15 100
RF = 1kΩ VCC = ±5V
VCC = ±15V
G = +2
10
Output Impedance (Ω)

VCC = ±5V
5 10
VO (V)

0
VCC = ±5V
−5 1

−10
VCC = ±15V
−15 0.1
100 1k 10k 100k 100k 1M 10M 100M 1G
RL (Ω) Frequency (Hz)

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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006

APPLICATIONS INFORMATION changing the values of R1 and R2. The feedback resistor
values (R3 and R4) should be kept relatively low, as
Figure 1 shows the OPA1632 used as a differential-output
indicated, for best noise performance.
driver for the PCM1804 high-performance audio ADC.
R5, R6, and C3 provide an input filter and charge glitch
Supply voltages of ±15V are commonly used for the
reservoir for the ADC. The values shown are generally
OPA1632. The relatively low input voltage swing required
satisfactory. Some adjustment of the values may help
by the ADC allows use of lower power-supply voltage, if
optimize performance with different ADCs.
desired. Power supplies as low as ±8V can be used in this
application with excellent performance. This reduces It is important to maintain accurate resistor matching on
power dissipation and heat rise. Power supplies should be R1/R2 and R3/R4 to achieve good differential signal
bypassed with 10µF tantalum capacitors in parallel with balance. Use 1% resistors for highest performance. When
0.1µF ceramic capacitors to avoid possible oscillations connected for single-ended inputs (inverting input
and instability. grounded, as shown in Figure 1), the source impedance
must be low. Differential input sources must have
The VCOM reference voltage output on the PCM1804 ADC
well-balanced or low source impedance.
provides the proper input common-mode reference
voltage (2.5V). This VCOM voltage is buffered with op amp Capacitors C1, C2, and C3 should be chosen carefully for
A2 and drives the output common-mode voltage pin of the good distortion performance. Polystyrene, polypropylene,
OPA1632. This biases the average output voltage of the NPO ceramic, and mica types are generally excellent.
OPA1632 to 2.5V. Polyester and high-K ceramic types such as Z5U can
create distortion.
The signal gain of the circuit is generally set to
approximately 0.25 to be compatible with commonly-used
audio line levels. Gain can be adjusted, if necessary, by

V+
+8V to +16V
10µF
+

0.1µF

R3
270Ω

C1
1nF
R1
R5
1kΩ 3 40Ω
8 5
Balanced or + VOCM C3 1/2
R2 2 OPA1632
Single−Ended 2.7nF PCM1804
Input − 1kΩ
1
4
6 R6
C2 VCOM
7 40Ω
1nF (2.5V)

R4
270Ω

Enable(1)

OPA134 1kΩ
0.1µF
NOTE: (1) Leave open to enable. 0.1µF
Logic signals referenced to V− supply.
See the Shutdown Function section. 10µF
+

−8V to −16V
V−

Figure 1. ADC Driver for Professional Audio

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FULLY-DIFFERENTIAL AMPLIFIERS Quiescent current is reduced to approximately 0.85mA

Differential signal processing offers a number of when the amplifier is disabled. When disabled, the
performance advantages in high-speed analog signal output stage is not in a high-impedance state. Thus, the
processing systems, including immunity to external shutdown function cannot be used to create a
common-mode noise, suppression of even-order multiplexed switching function in series with multiple
nonlinearities, and increased dynamic range. Fully-dif- amplifiers.
ferential amplifiers not only serve as the primary means
of providing gain to a differential signal chain, but also OUTPUT COMMON-MODE VOLTAGE
provide a monolithic solution for converting single-en- The output common-mode voltage pin sets the DC
ded signals into differential signals allowing for easy, output voltage of the OPA1632. A voltage applied to the
high-performance processing. VOCM pin from a low-impedance source can be used to
directly set the output common-mode voltage. For a
A standard configuration for the device is shown in
VOCM voltage at mid-supply, make no connection to the
Figure 2. The functionality of a fully differential amplifier
VOCM pin.
can be imagined as two inverting amplifiers that share
a common noninverting terminal (though the voltage is Depending on the intended application, a decoupling
not necessarily fixed). For more information on the capacitor is recommended on the VOCM node to filter
basic theory of operation for fully differential amplifiers, any high-frequency noise that could couple into the
refer to the Texas Instruments application note signal path through the VOCM circuitry. A 0.1µF or 1µF
SLOA054, Fully Differential Amplifiers, available for capacitor is generally adequate.
download from the TI web site (www.ti.com). Output common-mode voltage causes additional
current to flow in the feedback resistor network. Since
this current is supplied by the output stage of the
amplifier, this creates additional power dissipation. For
commonly-used feedback resistance values, this
+15V
current is easily supplied by the amplifier. The additional
Digital
internal power dissipation created by this current may
VIN+ AIN be significant in some applications and may dictate use
Output
VOCM of the MSOP PowerPAD package to effectively control
VIN− AIN
VREF self-heating.

−15V
PowerPAD DESIGN CONSIDERATIONS
The OPA1632 is available in a thermally-enhanced
PowerPAD family of packages. These packages are
constructed using a downset leadframe upon which the
die is mounted (see Figure 3[a] and Figure 3[b]). This
Figure 2. Typical ADC Circuit
arrangement results in the lead frame being exposed as
a thermal pad on the underside of the package (see
SHUTDOWN FUNCTION Figure 3[c]). Because this thermal pad has direct
thermal contact with the die, excellent thermal
The shutdown (enable) function of the OPA1632 is
performance can be achieved by providing a good
referenced to the negative supply of the operational
thermal path away from the thermal pad.
amplifier. A valid logic low (< 0.8V above negative
supply) applied to the enable pin (pin 7) disables the
amplifier output. Voltages applied to pin 7 that are
DIE
greater than 2V above the negative supply place the
amplifier output in an active state, and the device is (a) Side View Thermal
enabled. If pin 7 is left disconnected, an internal pull-up Pad
resistor enables the device. Turn-on and turn-off times DIE

are approximately 2µs each.

(b) End View (c) Bottom View

Figure 3. Views of the Thermally-Enhanced Package.

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The PowerPAD package allows for both assembly and These vias help dissipate the heat generated by the
thermal management in one manufacturing operation. OPA1632 IC, and may be larger than the 13mil
During the surface-mount solder operation (when the diameter vias directly under the thermal pad. They
leads are being soldered), the thermal pad must be can be larger because they are not in the thermal
soldered to a copper area underneath the package. pad area to be soldered so that wicking is not a
Through the use of thermal paths within this copper problem.
area, heat can be conducted away from the package
5. Connect all holes to the internal power plane that is
into either a ground plane or other heat-dissipating
at the same voltage potential as V−.
device. Soldering the PowerPAD to the printed circuit
board (PCB) is always required, even with applications 6. When connecting these holes to the plane, do not
that have low power dissipation. It provides the use the typical web or spoke via connection
necessary thermal and mechanical connection methodology. Web connections have a high
between the lead frame die pad and the PCB. thermal resistance connection that is useful for
slowing the heat transfer during soldering
operations. This makes the soldering of vias that
PowerPAD PCB LAYOUT CONSIDERATIONS have plane connections easier. In this application,
however, low thermal resistance is desired for the
1. The thermal pad must be connected to the most
most efficient heat transfer. Therefore, the holes
negative supply voltage on the device, V−. under the OPA1632 PowerPAD package should
2. Prepare the PCB with a top-side etch pattern, as make their connection to the internal plane with a
shown in Figure 4. There should be etch for the complete connection around the entire
leads as well as etch for the thermal pad. circumference of the plated-through hole.
7. The top-side solder mask should leave the terminals

ÓÓÓ
ÓÓÓÓÓÓ
ÓÓÓ
Single or Dual of the package and the thermal pad area with its five

ÓÓÓ
ÓÓÓ
holes exposed. The bottom-side solder mask should
cover the five holes of the thermal pad area. This

ÓÓÓÓÓÓ
ÓÓÓ
68mils x 70mils prevents solder from being pulled away from the

ÓÓÓÓÓÓ
ÓÓÓ
(via diameter = 13mils)
thermal pad area during the reflow process.
8. Apply solder paste to the exposed thermal-pad
area and all of the IC terminals.
Figure 4. PowerPAD PCB Etch and Via Pattern.
9. With these preparatory steps in place, the IC is
3. Place five holes in the area of the thermal pad. simply placed in position and runs through the
These holes should be 13mils in diameter. Keep solder reflow operation as any standard
them small so that solder wicking through the holes surface-mount component. This results in a part
is not a problem during reflow. that is properly installed.

4. Additional vias may be placed anywhere along the

thermal plane outside of the thermal pad area.

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POWER DISSIPATION AND THERMAL For systems where heat dissipation is more critical, the
CONSIDERATIONS OPA1632 is offered in an MSOP-8 with PowerPAD.
The OPA1632 does not have thermal shutdown The thermal coefficient for the MSOP PowerPAD
protection. Take care to assure that the maximum (DGN) package is substantially improved over the
junction temperature is not exceeded. Excessive traditional SO package. Maximum power dissipation
junction temperature can degrade performance or levels are depicted in Figure 5 for the two packages.
cause permanent damage. For best performance and The data for the DGN package assumes a board layout
reliability, assure that the junction temperature does not that follows the PowerPAD layout guidelines.
exceed +125°C.
The thermal characteristics of the device are dictated MAXIMUM POWER DISSIPATION
by the package and the circuit board. Maximum power vs AMBIENT TEMPERATURE
3.5
dissipation for a given package can be calculated using θ JA = 170 _ C/W for SO−8 (D)
the following formula: θ JA = 58.4 _ C/W for MSOP−8 (DGN)

Maximum Power Dissipation (W)

3.0
TJ = 150_ C
No Airflow
T max * T A 2.5
P Dmax + MSOP−8 (DGN) Package
q JA (1) 2.0
Where:
1.5
PDmax is the maximum power dissipation in the
1.0
amplifier (W).
SO−8 (D) Package
Tmax is the absolute maximum junction 0.5

temperature (_C). 0
TA is the ambient temperature (_C). −40 −15 10 35 60 85
Ambient Temperature (_ C)
qJA = qJC + qCA.
qJC is the thermal coefficient from the silicon
junctions to the case (_C/W). Figure 5. Maximum Power Dissipation vs Ambient
Temperature
qCA is the thermal coefficient from the case to
ambient air (_C/W).

9
 PACKAGE OPTION ADDENDUM
www.ti.com 12-Sep-2006

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
OPA1632D ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
OPA1632DG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
OPA1632DGN ACTIVE MSOP- DGN 8 80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Power no Sb/Br)
PAD
OPA1632DGNG4 ACTIVE MSOP- DGN 8 80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Power no Sb/Br)
PAD
OPA1632DGNR ACTIVE MSOP- DGN 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Power no Sb/Br)
PAD
OPA1632DGNRG4 ACTIVE MSOP- DGN 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Power no Sb/Br)
PAD
OPA1632DR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
OPA1632DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 1
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Following are URLs where you can obtain information on other Texas Instruments products and application
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Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
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DSP dsp.ti.com Broadband www.ti.com/broadband
Interface interface.ti.com Digital Control www.ti.com/digitalcontrol
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Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
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