Implementation of 8 Bit Full Adder using

Memristor
Ashik N1, Sehba Sultana Raza2,Vikas K 3, Visal Vyasan 4, Sajeena A5,Kala6,Anu Assis7,Vishnu D8
1,2,3,4,5,7,8 Department of ECE, T.K.M College Of Engineering,Kollam;

6 Indian Institute of Information and Technology,Trivandrum

Abstract— Memristors, also known as memory resistors, are for various applications, such as resistive memories, soft
passive electronic components that regulate current flow computing, and neurocomputing.
based on voltage inputs. Their defining feature lies in their By incorporating memristors into circuit theory and
capacity to modify resistance in response to applied voltage, electronic engineering, researchers are poised to unlock
effectively storing and utilizing previous charge. This unique new possibilities in circuit design, computational
memory capability renders them ideal for non-volatile
memory storage, neuromorphic computing, and advanced
efficiency, and memory storage. This exploration of
electronic systems. Memristors offer a distinct avenue memristor technology underscores its transformative
towards realizing neuromorphic computing by replicating potential in reshaping the landscape of electronic systems
essential neural components like synapses and ion pumps. and advancing the frontiers of innovation.
This endeavor involves the creation of fundamental elements
for neuromorphic computers, including NOT, AND, XOR
gates, and Full Adders, which form the foundation of the II. PROPOSED TOPOLOGY
MAC layer for intricate computations such as pattern and
The intended topology as shown in Fig.1.consists of 3 bit
image recognition. The development and simulation of these
models are conducted using LTSPICE. full adders for adding two bits so to add two 8 bit numbers
Keywords—Neuromorphic Computing we need seven full adder based on memristors and a half
adder based on memristor for adding the first two bits of
I. INTRODUCTION the 8 bit numbers as there is no carry element in the first
addition. The parallel structure of traditional full adders
In the realm of circuit theory, the foundational trio of can be used to construct an 8-bit full adder with
resistor, inductor, and capacitor traditionally governs the memristors. XOR, AND, and OR gates as well as the
connections between key circuit parameters like current, addition of memristors are the main components. In the
voltage, charge, and magnetic flux. However, until 1971, AND and XOR gates, swap out conventional resistors for
there was a notable absence: a circuit element that memristors. Memristors provide for programmable and
precisely defined the relationship between charge and adaptable behavior by providing varying resistance
magnetic flux. It was then that Chua introduced the dependent on the voltage supplied in the past. Apply
memristor (a blend of "memory" and "resistor"), offering bitwise addition, computing carries with AND gates and
a mathematical formulation for this fourth fundamental sums using XOR gates. The total 8-bit sum and carry-out
element. Fast forward to 2008, when researchers at HP are influenced by the outputs of these gates.
laboratories achieved a breakthrough by physically Make use of memristors' adaptive qualities to serve as
fabricating memristors, signaling a significant dynamic weights. Using the history of inputs and
advancement in electronic component technology. calculations, modify the resistance state of each memristor
to enable precise contributions to the final outcome. The
Equations (1) through (6) encapsulate the distinctive 8-bit full adder has independent bit processing capabilities
characteristics of the memristor, including its nonvolatile that allow for simultaneous computation and possible
memory effect, passivity, and pinched hysteresis loop: speed improvements. Eight cascaded examples of the
v(t) = M(q(t)) * i(t) (1) basic memristor-based full adder, with the carry-out of
one stage connected to the carry-in of the subsequent one,
M(q) = dφ(q) / dq (2) can be used to build an 8-bit full adder. This makes it
possible to add multi-byte numbers.
i(t) = W(φ(t)) * v(t) (3) To regulate the programming and modification of
memristor states, integrate control circuits. With the help
W(φ) = dq(φ) / dφ (4) of these circuits, memristor behavior during addition
operations is precisely controlled. To guarantee consistent
and predictable behavior under various operating
v(t) = M(∫−∞ti(t)dt) * i(t) (5)
situations, implement calibrating procedures. It's crucial to
remember that the description given above just offers a
i(t) = W(∫−∞tv(t)dt) * v(t) (6) high-level overview; practical implementation would
require careful consideration of the particular features of
These equations elucidate the intricate relationship the memristor technology selected for the design.
between voltage, current, charge, and magnetic flux in Furthermore, research on memristor-based circuits is
memristors, providing a foundation for further theoretical ongoing, and developments are made on a regular basis.
analysis and practical application.
The memristor's ability to remember its resistance state
and its unique I-V behavior make it a promising candidate
 Fig 3: Second Input Wave

Fig 1. Block Diagram

IV. SIMULATION MODEL

III. DESIGN OF 8 BIT FULL ADDER The potential of memristors to transform computer design,
particularly by improving power efficiency and reducing
A full adder, a fundamental digital circuit, plays a pivotal size, has sparked significant interest. However, fully
role in computing the sum (S) and carry-out (Cout) of realizing this potential requires further exploration,
three input bits: A, B, and a carry-in (Cin). It serves as a especially concerning their integration with current
building block for arithmetic operations in digital systems, CMOS technology for logic and memory applications.
particularly in scenarios where the addition of multiple
bits is required, such as adding two binary numbers. The Joglekar Resistance Switch mathematical model,
which is employed in constructing memristors in LTSpice,
In the process of binary addition, the full adder operates serves as the foundational framework for utilizing
iteratively from the least significant bit (LSB) to the most memristors in various applications. Initially, to understand
significant bit (MSB). At each bit position, an XOR gate the switching mechanism of memristors, fundamental
combines the individual bits from A, B, and the carry-in logic gates such as AND, OR, NAND, NOR, and XOR
(Cin), determining the sum bit (S) for that position. are examined. Building upon this understanding, the
Additionally, the full adder includes AND and OR gates development of a Full Adder Circuit using CMOS
to manage carry propagation, ensuring accurate Memristor logic is pursued.
computation of the carry-out (Cout).
The proposed Full Adder Circuit integrates previously
Mathematically, the XOR gate computes the sum (S) developed AND, OR, and XOR circuits alongside NMOS
according to the expression S = A ⊕ B ⊕ Cin, where ⊕ and PMOS transistors. Notably, this design streamlines
denotes the XOR operation. The AND gate determines the components compared to alternative structures, resulting
carry-out (Cout) based on the logical AND operations in reduced delay, power consumption, and area usage.
between input bits, expressed as Cout = AB + BCin + Through thorough comparisons with other memristor
ACin. logic approaches like CRS, MRL, and MAGIC, a high-
performance Full Adder Circuit is proposed.
By cascading multiple full adder circuits, larger multi-bit
adders such as an 8-bit full adder can be constructed. Each The investigation into the design of logic gates with a
bit position operates independently, performing binary hybrid Memristor-CMOS structure delves into utilizing
addition while considering the carry from the preceding two memristors to create two-input AND and OR gates,
bit. This modular approach facilitates the efficient along with two CMOS transistors for NAND and NOR
computation of arithmetic operations in digital systems, operations. Additionally, a simple XOR logic gate using
making the full adder a fundamental component in digital two CMOS transistors and four memristors is suggested.
design. Furthermore, a complete adder circuit is presented,
incorporating seven CMOS transistors and four
memristors to achieve optimal area usage and minimal
delay.

Regarding simulation modeling, explaining memristor

behavior involves detailing how their resistance evolves in
response to applied voltages and currents within the
designed circuits. Detailed simulations effectively
showcase the performance characteristics of the proposed
designs and validate their efficacy in practical
applications.
Fig 2: First Input Wave
 Applications in neuromorphic computing and signal
processing. Neuromorphic computer systems, which
imitate the architecture and operations of the human brain,
can be created with memristors. This can lead to the
creation of extremely clever and productive computer
systems that are great at things like pattern and picture
recognition.

Fig.4 : LTspice simulation model

I. RESULT AND DISCUSSION

In this section the result obtained by simulating the
LTspice simulation model as described in Fig.3 is ACKNOWLEDGEMENT
discussed. Fig 5. shows the output waveform obtained We express our gratitude to IEEE CASS, Kerala Section
from the sum output of the memristor based full adder, the and IEEE CASS TKMCE SB for technically supporting
waveform obtained is the sum of the eight bits given as a the work.
input in each individual full adder circuit .

REFERENCES
[1] United States Patent Simon et al . Patent No . : US 10 , 363 , 419
B2 ( 45 ) ,Date of Patent : * Jul . 30 , 2019
[2] A. Khalifa et al., "The Microbead: A Highly Miniaturized
Wirelessly Powered Implantable Neural Stimulating System," in
IEEE Transactions on Biomedical Circuits and Systems, vol. 12,
June 2018.
[3] X. Li et al., "System Design of a Closed-Loop Vagus Nerve
Stimulator Comprising a Wearable EEG Recorder and an
Implantable Pulse Generator," in IEEE Circuits and Systems
Magazine, vol. 22, no. 3, pp. 22-40, 2022
[4] Ratil H. Ashique 1, “An Analysis and Modeling of the Class-E
Inverter for ZVS/ZVDS at Any Duty Ratio with High Input Ripple
Current”, Electronics,30 May 2021, 10(11), 1312;
https://doi.org/10.3390/electronics10111312K.
[5] Krystian Rybicki∗ , Rafa l M. Wojciechowski∗∗, “Analysis and
design of a class E current-driven rectifier for 1 MHz wireless
power transfer system", Journal of Electrical Engineering,Vol 70
Fig.5: Sum output of 8 bit Full Adder. (2019), No1, 58–63
[6] Brigitte Hauke., “Basic Calculation of a Buck Converter's Power
Stage,” Texas Instruments–December 2011–Revised August 2015
Fig 6. Shows the output waveform generated at the carry
[7] M. Kiani, "Wireless Power Transfer and Management for Medical
end of the eight bit memristor based full adder circuit if Applications," in IEEE Solid-State Circuits Magazine, vol. 14, no.
there is a carry element which will be the ninth bit of the 3, pp. 41-52, Summer 2022, doi: 10.1109/MSSC.2022.3178671.
result of addition . [8] Q. Wang, W. Che, M. Mongiardo and G. Monti, "Wireless Power
Transfer System With High Misalignment Tolerance for Bio-
Medical Implants," in IEEE Transactions on Circuits and Systems
II: Express Briefs, vol. 67, no. 12, pp. 3023-3027, Dec. 2020,
doi:10.1109/TCSII.2020.2985056.
[9] Brocker DT, Grill WM,"Principles of electrical stimulation of
neural tissue, " in Handbook of Clinical Neurology,
Elsevier,Volume 116,pp.3-18,2013, doi: 10.1016/B978-0-444-
53497-2.00001-2. PMID: 24112880.
[10] M. Gupta and S. P. Phulambrikar, “Design and Analysis of Buck
Converter”, in International Journal of Engineering Research &
Technology (IJERT) IJERT ISSN: 2278-0181 IJERTV3IS031844,
Vol. 3 Issue 3, pp. 2345-2348, March - 2014

Fig.6: Carry output of 8 bit Full Adder.