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Department of Electronics and Communication Engineering
Subject: VLSI DESIGN
Subject code: KEC-072
Session: 2022-23 Semester: 7
Course Coverage Plan
Actual No. of Date of Text/Reference S.No. Topics to be covered Planed Date Lectures lecture book taken
UNIT- Introduction 1. Introduction to VLSI 1 06.09.2022 06.09.2022 T2 2. VLSI Design flow 1 07.09.2022 07.09.2022 T2 3. General design methodologies 1 08.09.2022 08.09.2022 T2 4. Critical path, Integration density and Moore's 1 19.09.2022 19.09.2022 T2 law 5. Overview of design hierarchy, Layers of 1 20.09.2022 20.09.2022 T2 abstraction 6. VLSI design styles, CMOS Logic 1 20.09.2022 20.09.2022 T2 7. Propagation Delay definitions, Sheet 1 21.09.2022 21.09.2022 T2 resistance. UNIT- II Interconnect Parameters 8. Resistance, Inductance, and Capacitance 1 22.09.2022 22.09.2022 T2 9. Skin effect and its influence 1 26.09.2022 26.09.2022 T2 10. Lumped RC Model, Distributed RC Model 1 27.09.2022 27.09.2022 T2 11. Transient Response, RC delay model 1 27.09.2022 27.09.2022 T2 12. Linear Delay Model 1 28.09.2022 28.09.2022 T2 13. Logical Effort of Paths 1 29.09.2022 29.09.2022 T2 14. Scaling 1 06.10.2022 06.10.2022 T2 UNIT- III Dynamic CMOS design 15. Steady-state behavior of dynamic gate circuits 1 13.10.2022 13.10.2022 T2 16. Noise considerations in dynamic design 1 17.10.2022 17.10.2022 T2 17. Charge sharing, cascading dynamic gates 1 18.10.2022 18.10.2022 T2 18. Domino logic 1 18.10.2022 18.10.2022 T2 19. np-CMOS logic 1 19.10.2022 19.10.2022 T2 20. Problems in single-phase clocking 1 20.10.2022 20.10.2022 T2 21. Two phase non-overlapping clocking 1 27.10.2022 27.10.2022 T2 scheme 22. Sequential CMOS Logic Circuits, 1 31.10.2022 31.10.2022 T2 23. Layout design. 1 31.10.2022 31.10.2022 T2 UNIT -IV Semiconductor Memories 24. Dynamic Random Access Memories (DRAM) 1 01.11.2022 01.11.2022 T2 25. Static RAM 1 02.11.2022 02.11.2022 T2 26. Non-volatile memories, flash memories 1 02.11.2022 03.11.2022 T2 27. Pipeline Architecture 1 03.11.2022 04.11.2022 T2 28. Low – Power CMOS Logic Circuits: 1 07/11/22 07/11/22 T2 Introduction 29. Overview of Power Consumption 1 09/11/22 09/11/22 T2 30. Low – Power Design through voltage scaling 1 14/11/22 14/11/22 T2 UNIT- V Introduction to Testing 31. Faults in digital circuits 1 15/11/22 15/11/22 T2 32. Modeling of faults 1 15/11/22 15/11/22 T2 33. Functional Modeling at the Logic Level 1 16/11/22 16/11/22 T2 34. Functional Modeling at the Register 1 17/11/22 17/11/22 T2 35. Structural Model 1 18/11/22 18/11/22 T2 36. Level of Modeling, 1 21/11/22 21/11/22 T2 37. Design for Testability 1 22/11/22 22/11/22 T2 38. Ad Hoc Design for Testability Techniques 1 22/11/22 22/11/22 T2 39. Controllability and Observability 1 23/11/22 23/11/22 T2 40. Introduction to Built-in-self-test (BIST) 1 23/11/22 23/11/22 T2 Concept. Total Lectures planned 40
Course coverage beyond the Syllabus
Text Books 1. Sung-Mo Kang & Yosuf Leblebici, “CMOS Digital Integrated Circuits: Analysis & Design”, Mcgraw Hill, 4th Edition. 2. Neil H.E.Weste, David Money Harris, “CMOS VLSI Design – A circuits and Systems Perspective” Pearson, 4th Edition. 3. D. A. Pucknell and K. Eshraghian, “Basic VLSI Design: Systems and Circuits”, PHI, 3rd Ed., 1994. References: 1. R. J. Baker, H. W. Li, and D. E. Boyce," CMOS circuit design, layout, and simulation", Wiley-IEEE Press,2007. 2. M. Abramovici, M.A. Breuer and A.D. Friedman, "Digital Systems and Testable Design", Jaico Publishing House.
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