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Spring 2024 - CS302P - 2

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Ali Saab
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48 views2 pages

Spring 2024 - CS302P - 2

Uploaded by

Ali Saab
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Digital Logic Design Practical (CS302P) Total marks = 20

Assignment # 02 Deadline
th
24 of June 2024
Spring 2024

Please carefully read the following instructions before attempting the assignment.

RULES FOR MARKING


It should be clear that your assignment would not get any credit if:
 The assignment is submitted after the due date.
 The submitted assignment does not open, or the file is corrupted.
 Strict action will be taken if the submitted solution is copied from any other student or the
internet.

You should consult the recommended books to clarify your concepts, as handouts are insufficient.
You are supposed to submit your assignment in Doc or Docx format.
Any other formats like scanned images, PDF, ZIP, RAR, PPT, BMP, etc. will not be accepted.

Topic Covered:
The objective of this assignment is to assess the understanding of students about:
 Lab Work - Week # 09 - Building Logic Circuits using Multiplexers
 Lab Work - Week # 10 - Building Digital Logic Circuits using Decoders

Topic Covered
Lab Experiment # 09 to Lab Experiment # 10

NOTE

No assignment will be accepted via email after the due date (whether it is due to load shedding, internet
malfunctioning, etc.). Hence, refrain from uploading assignments within the last hour of the deadline. It is
recommended that the solution be uploaded at least two days before its closing date.

If you find any mistakes or confusion in the assignment (Question statement), please consult your instructor
before the deadline. After the deadline, no queries will be entertained in this regard.

For any query, feel free to email me at:


[email protected]
Question No 01 Marks (20)
You are required to design a demultiplexer circuit using 74LS154 IC considering the truth table given below.

Note: You have to attach the screenshot of the circuit diagram from the Electronics WorkBench with your
VU Student ID labeled at the output F.

Inputs Outpu
t
A B C D F
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0

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