A1315

Linear Hall-Effect Sensor IC with Analog Output

Available in a Miniature, Low-Profile Surface-Mount Package

FEATURES AND BENEFITS DESCRIPTION

• 3.3 V supply operation New applications for linear output Hall-effect sensors, such
• QVO temperature coefficient programmed at Allegro™ for as displacement and angular position, require higher accuracy
improved accuracy and smaller package sizes. The Allegro A1315 linear Hall-
• Miniature package options effect sensor IC has been designed specifically to meet both
• High-bandwidth, low-noise analog output requirements. These temperature-stable devices are available
• High-speed chopping scheme minimizes QVO drift across in both surface-mount and through-hole packages.
operating temperature range
The accuracy of each device is enhanced via end-of-line
• Temperature-stable quiescent voltage output and sensitivity
optimization. Each device features non-volatile memory to
• Precise recoverability after temperature cycling
optimize device sensitivity and the quiescent voltage output
• Output voltage clamps provide short-circuit diagnostic
(QVO: output in the absence of a magnetic field) for a given
capabilities
application or circuit. This A1315 optimized performance
• Undervoltage lockout (UVLO)
is sustained across the full operating temperature range by
• Wide ambient temperature range: –40°C to 150°C
programming the temperature coefficient for both sensitivity
• Immune to mechanical stress
and QVO at Allegro end-of-line test.
• Enhanced EMC performance for stringent automotive
applications These ratiometric Hall-effect sensor ICs provide a voltage output
that is proportional to the applied magnetic field. The quiescent
PACKAGES: voltage output is adjusted around 50% of the supply voltage.
3-pin SOT23-W 3-pin ultramini SIP,
2 mm × 3 mm × 1 mm 1.5 mm × 4 mm × 3 mm The features of these linear devices make them ideal for
(suffix LH) (suffix UA) use in automotive and industrial applications requiring high
accuracy, and operate across an extended temperature range,
–40°C to 150°C.
Each BiCMOS monolithic circuit integrates a Hall element,
temperature-compensating circuitry to reduce the intrinsic
sensitivity drift of the Hall element, a small-signal high-gain
Not to scale amplifier, a clamped low-impedance output stage, and a
proprietary dynamic offset cancellation technique.
Continued on the next page…

Functional Block Diagram

V+
VCC
Dynamic Offset

Tuned Filter
Cancellation

VOUT

CBYPASS Sensitivity and Offset and

Sensitivity TC Offset TC

GND

A1315-DS, Rev. 2 January 6, 2020

MCO-0000527
 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

DESCRIPTION (CONTINUED)
The A1315 sensor IC is offered in two package styles. The LH is a
SOT-23W style, miniature, low-profile package for surface-mount
applications. The UA is a 3-pin, ultramini, single inline package
(SIP) for through-hole mounting. Both packages are lead (Pb) free,
with 100% matte-tin leadframe plating.

SELECTION GUIDE
Output Sensitivity
Part Number Packing* Package
Polarity (typ) (mV/G)
A1315LLHLX-1-T Forward 1.35 10,000 pieces per reel 3-pin SOT-23W surface mount
A1315LLHLX-2-T Forward 2.5 10,000 pieces per reel 3-pin SOT-23W surface mount
A1315LLHLX-5-T Forward 5 10,000 pieces per reel 3-pin SOT-23W surface mount
A1315LUA-2-T Forward 2.5 500 pieces per bag 3-pin SIP through hole
A1315LUA-5-T Forward 5 500 pieces per bag 3-pin SIP through hole
*Contact Allegro™ for additional packing options

ABSOLUTE MAXIMUM RATINGS

Characteristic Symbol Notes Rating Unit
Forward Supply Voltage VCC 8 V
Reverse Supply Voltage VRCC –0.1 V
Forward Output Voltage VOUT 7 V
Reverse Output Voltage VROUT –0.1 V
Output Source Current IOUT(SOURCE) VOUT to GND 2 mA
Output Sink Current IOUT(SINK) VCC to VOUT 10 mA
Operating Ambient Temperature TA Range L –40 to 150 °C
Maximum Junction Temperature TJ(max) 165 °C
Storage Temperature Tstg –65 to 170 °C

THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information
Characteristic Symbol Test Conditions Value Units
Package LH, 1-layer PCB with copper limited to solder pads 228 °C/W

Package Thermal Resistance RθJA Package LH, 2-layer PCB with 0.463 in.2 of copper area each side con-
110 °C/W
nected by thermal vias
Package UA, 1-layer PCB with copper limited to solder pads 165 °C/W

2
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

PINOUT DIAGRAMS AND TERMINAL LIST TABLE

LH Package UA Package Terminal List Table

Pinout Pinout
Number
Name Description
3 LH UA
Input power supply; tie to GND
VCC 1 1
with bypass capacitor
VOUT 2 3 Output signal
1 2 GND 3 2 Ground

1 2 3

3
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
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 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

OPERATING CHARACTERISTICS: Valid over TA , CBYPASS = 0.1 µF, VCC = 3.3 V, unless otherwise noted
Characteristic Symbol Test Conditions Min. Typ. Max. Unit [1]
ELECTRICAL CHARACTERISTICS
Supply Voltage VCC 3 3.3 3.63 V
Tested at TA = 25°C and TA = 150°C (device
VUVLOHI – – 3 V
powers on)
Undervoltage Threshold [2]
Tested at TA = 25°C and TA = 150°C (device
VUVLOLO 2.5 – – V
powers off)
Supply Current ICC No load on VOUT – 7.7 10 mA
Power-On Time [3][4] tPO TA = 25°C, CL(PROBE) = 10 pF – 50 – µs
VCC Ramp Time [3][4] tVCC TA = 25°C 0.005 – 100 ms
VCC Off Level [3][4] VCCOFF TA = 25°C 0 – 0.33 V
Delay to Clamp [3][4] tCLP TA = 25°C, CL = 10 nF – 30 – µs
Supply Zener Clamp Voltage VZ TA = 25°C, ICC = 13 mA 6 7.3 – V
Internal Bandwidth [4] BWi Small signal –3 dB – 20 – kHz
Chopping Frequency [5] fC TA = 25°C – 400 – kHz
OUTPUT CHARACTERISTICS
VCC = 3.3 V, TA = 25°C, CBYPASS = open,
Output Referred Noise [4] VN – 13 – mV(p-p)
Sens = 5 mV/G, no load on VOUT
VCC = 3.3 V, TA = 25°C, CBYPASS = open,
Input Referred RMS Noise Density [4] VNRMS Sens = 5 mV/G, no load on VOUT, – 2.3 – mG/√Hz
fmeasured << BWi
DC Output Resistance [4] ROUT – 3 – Ω
Output Load Resistance [4] RL VOUT to GND 4.7 – – kΩ
Output Load Capacitance [4] CL VOUT to GND – – 10 nF
VCLPHIGH TA = 25°C, B = +400 G, RL = 10 kΩ (VOUT to GND) 2.842 2.97 3.069 V
Output Voltage Clamp [6]
VCLPLOW TA = 25°C, B = –400 G, RL = 10 kΩ (VOUT to VCC) 0.264 0.33 0.462 V
A1315LLHLX-1-T 1.289 1.350 1.411 mV/G
A1315LLHLX-2-T 2.388 2.500 2.613 mV/G
Sensitivity [7] Sens A1315LLHLX-5-T TA = 25°C 4.850 5.000 5.150 mV/G
A1315LUA-2-T 2.388 2.5 2.613 mV/G
A1315LUA-5-T 4.85 5 5.15 mV/G
A1315LLHLX-1-T 1.638 1.650 1.662 V
A1315LLHLX-2-T 1.638 1.650 1.662 V
Quiescent Voltage Output (QVO) VOUT(Q) A1315LLHLX-5-T TA = 25°C 1.635 1.650 1.665 V
A1315LUA-2-T 1.638 1.65 1.662 V
A1315LUA-5-T 1.635 1.65 1.665 V
A1315LLHLX-1-T 0.08 0.12 0.16 %/°C
A1315LLHLX-2-T 0.08 0.12 0.16 %/°C
Programmed at TA
Sensitivity Temperature Coefficient TCSens A1315LLHLX-5-T = 150°C, calculated 0.08 0.12 0.16 %/°C
relative to Sens at 25°C
A1315LUA-2-T 0.08 0.12 0.16 %/°C
A1315LUA-5-T 0.08 0.12 0.16 %/°C

Continued on the next page…

4
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

OPERATING CHARACTERISTICS (continued): Valid over TA , CBYPASS = 0.1 µF, VCC = 3.3 V, unless otherwise noted
Characteristic Symbol Test Conditions Min. Typ. Max. Unit [1]
ERROR COMPONENTS
Linearity Sensitivity Error LinERR – ±1.5 – %
Symmetry Sensitivity Error SymERR – ±1.5 – %
Ratiometry Quiescent Voltage Across supply voltage range (relative to VCC =
RatVOUT(Q) – ±1.5 – %
Output Error [8] 3.3 V)
Across supply voltage range (relative to VCC =
Ratiometry Sensitivity Error [8] RatSens – ±1.5 – %
3.3 V)
TA = 25°C, across supply voltage range (relative
Ratiometry Clamp Error [9] RatVOUTCLP – ±1.5 – %
to VCC = 3.3 V)
DRIFT CHARACTERISTICS
A1315LLHLX-1-T –15 – 5 mV
A1315LLHLX-2-T –18 0 8 mV
Typical Quiescent Voltage Output Drift TA = 150°C,
∆VOUT(Q) A1315LLHLX-5-T –20 0 20 mV
Across Temperature Range relative to TA = 25°C
A1315LUA-2-T –13 – 13 mV
A1315LUA-5-T –15 – 15 mV
Sensitivity Drift Due to
∆SensPKG TA = 25°C, after temperature cycling – ±2 – %
Package Hysteresis

[1] 1 G (gauss) = 0.1 mT (millitesla),

[2] On power-up, the output of the device is held low until VCC exceeds VUVLOHI. After the device is powered, the output remains valid until VCC drops
below VUVLOLO , when the output is pulled low.
[3] See the Characteristic Definitions section.
[4] Determined by design and characterization, not evaluated at final test.
[5] f varies as much as approximately ±20% across the full operating ambient temperature range and process.
C
[6] V
CLPLOW and VCLPHIGH scale with VCC due to ratiometry.
[7] Sensitivity drift through the life of the part, ΔSens
LIFE , can have a typical error value ±3% in addition to package hysteresis effects.
[8] Percent change from actual value at V
CC = 3.3 V, for a given temperature.
[9] Percent change from actual value at V
CC = 3.3 V, TA = 25°C.

5
Allegro MicroSystems
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www.allegromicro.com
 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

CHARACTERISTIC DEFINITIONS
Power-On Time. When the supply is ramped to its operating Quiescent Voltage Output. In the quiescent state (no signifi-
voltage, the device output requires a finite time to react to an cant magnetic field: B = 0 G), the output, VOUT(Q), is at a con-
input magnetic field. Power-On Time, tPO , is defined as the time stant ratio to the supply voltage, VCC, across the entire operating
it takes for the output voltage to begin responding to an applied ranges of VCC and Operating Ambient Temperature, TA.
magnetic field after the power supply has reached its minimum Quiescent Voltage Output Drift Across Temperature
specified operating voltage, VCC(min), as shown in figure 1. Range. Due to internal component tolerances and thermal
Delay to Clamp. A large magnetic input step may cause the considerations, the Quiescent Voltage Output, VOUT(Q), may
clamp to overshoot its steady state value. The Delay to Clamp, drift due to temperature changes within the Operating Ambient
tCLP , is defined as the time it takes for the output voltage to settle Temperature, TA. For purposes of specification, the Quiescent
within 1% of its steady state value, after initially passing through Voltage Output Drift Across Temperature Range, ∆VOUT(Q) (mV),
is defined as:
its steady state voltage, as shown in figure 2.
∆VOUT(Q) = VOUT(Q)(TA) –VOUT(Q)(25°C) (1)
V
VCC Sensitivity. The amount of the output voltage change is propor-
VCC(typ)
VOUT tional to the magnitude and polarity of the magnetic field applied.
90% VOUT
This proportionality is specified as the magnetic sensitivity,
Sens (mV/G), of the device and is defined as:
VOUT(B+) – VOUT(B–)
VCC(min) Sens = (2)
(B+) – (B–)
tPO
t1 t2 where B+ is the magnetic flux density in a positive field (south
polarity) and B– is the magnetic flux density in a negative field
t1= time at which power supply reaches (north polarity).
minimum specified operating voltage
t2= time at which output voltage settles Sensitivity Temperature Coefficient. The device sensitiv-
within ±10% of its steady state value ity changes as temperature changes, with respect to its Sensitiv-
under an applied magnetic field
ity Temperature Coefficient, TCSENS. TCSENS is programmed at
150°C, and calculated relative to the baseline sensitivity program-
0
+t ming temperature of 25°C. TCSENS is defined as:
Figure 1. Definition of Power On Time, tPO SensT2 – SensT1  1 
TCSens =  × 100    (%/°C) (3)
 SensT1  T2–T1
Magnetic Input Signal
where T1 is the baseline Sens programming temperature of 25°C,
VCLPHIGH and T2 is the TCSENS programming temperature of 150°C.
VOUT
Magnetic Input Signal
Device Output, VOUT (V)

tCLP The ideal value of Sens across the full ambient temperature
range, SensIDEAL(TA), is defined as:
t1 t2

t1= time at which output voltage initially SensIDEAL(TA) = SensT1 × [100 (%) + TCSENS (TA –T1)] (4)
reaches steady state clamp voltage
t2= time at which output voltage settles to Sensitivity Drift Across Temperature Range. Second order
within 1% of steady state clamp voltage sensitivity temperature coefficient effects cause the magnetic
sensitivity, Sens, to drift from its ideal value across the operating
time (µs)
ambient temperature range, TA. For purposes of specification,
Figure 2. Definition of Delay to Clamp, tCLP

6
Allegro MicroSystems
955 Perimeter Road
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www.allegromicro.com
 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

the Sensitivity Drift Across Temperature Range, ∆SensTC, is operating magnetic range of the applied field in which the device
defined as: provides a linear output. The maximum positive and negative
SensTA – SensIDEAL(TA) applied magnetic fields in the operating range can be calculated:
∆SensTC =
SensIDEAL(TA)
× 100 (%) (5)
VCLPHIGH – VOUT(Q)
BMAX(+)  = (10)
Sensitivity Drift Due to Package Hysteresis. Package Sens
stress and relaxation can cause the device sensitivity at TA = 25°C VOUT(Q) – VCLPLOW
to change during and after temperature cycling. This change in BMAX(–)  =
sensitivity follows a hysteresis curve. For purposes of specifica- Sens
tion, the Sensitivity Drift Due to Package Hysteresis, ∆SensPKG,
is defined as: Symmetry Sensitivity Error. The magnetic sensitivity of the
device is constant for any two applied magnetic fields of equal
Sens(25°C)(2) – Sens(25°C)(1)
∆SensPKG = × 100 (%) (6) magnitude and opposite polarities. Symmetry error, SymERR (%),
Sens(25°C)(1) is measured and defined as:
where Sens(25°C)(1) is the programmed value of sensitivity  Sens(B+) 
at TA = 25°C, and Sens(25°C)(2) is the value of sensitivity at SymERR = 1–  × 100 (%) (11)
TA = 25°C after temperature cycling TA up to 150°C, down to  Sens(B–) 
–40°C, and back to up 25°C. where SensBx is as defined in equation 10, and B+ and B– are
positive and negative magnetic fields such that |B+| = |B–|.
Linearity Sensitivity Error. The A1315 is designed to provide
linear output in response to a ramping applied magnetic field. Ratiometry Error. The A1315 provides ratiometric output. This
Consider two magnetic fields, B1 and B2. Ideally, the sensitivity means that the Quiescent Voltage Output, VOUT(Q) , magnetic
of a device is the same for both fields, for a given supply voltage sensitivity, Sens, and clamp voltages, VCLPHIGH and VCLPLOW ,
and temperature. Linearity error is present when there is a differ- are proportional to the supply voltage, VCC. In other words, when
ence between the sensitivities measured at B1 and B2. the supply voltage increases or decreases by a certain percent-
age, each characteristic also increases or decreases by the same
Linearity Sensitivity Error, LINERR , is calculated separately for
positive (LinERR+) and negative (LinERR– ) applied magnetic percentage. Error is the difference between the measured change
fields. LINERR (%) is measured and defined as: in the supply voltage relative to 3.3 V, and the measured change
in each characteristic.
 Sens(B+)(2) 
LinERR+ = 1–  × 100 (%) (7) The ratiometric error in quiescent voltage output, RatVOUT(Q) (%),
 Sens(B+)(1)  for a given supply voltage, VCC, is defined as:
 Sens(B–)(2)
LinERR– = 1–  × 100 (%)  VOUT(Q)(VCC) / VOUT(Q)(3.3V) 
RatVOUT(Q) = 1–  × 100 (12)
 Sens(B–)(1)
(%)
 VCC / 3.3 (V) 
where:
The ratiometric error in magnetic sensitivity, RatSens (%), for a
|VOUT(Bx) – VOUT(Q)| given supply voltage, VCC, is defined as:
SensBx = (8)
Bx
 Sens(VCC) / Sens(3.3V)
and Bx are positive and negative magnetic fields, with respect to RatSens = 1–  × 100 (%) (13)
 VCC / 3.3 (V) 
the quiescent voltage output, such that
|B(+)(2)| > |B(+)(1)| and |B(–)(2)| > |B(–)(1)| The ratiometric error in the clamp voltages, RatVOUTCLP (%), for
a given supply voltage, VCC, is defined as:
The effective linearity error is:
 VCLP(VCC) / VCLP(3.3V)
LinERR = max(|LinERR+| , |LinERR– |) RatVOUTCLP = 1–  × 100 (%) (14)
(9)  VCC / 3.3 (V) 

The output voltage clamps, VCLPHIGH and VCLPLOW , limit the where VCLP is either VCLPHIGH or VCLPLOW .

7
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

Undervoltage Lockout. The A1315 provides an undervoltage

lockout feature which ensures that the device outputs a VOUT VCC
signal only when VCC is above certain thresholds . The undervolt- VUVLOHI
age lockout feature provides a hysteresis of operation to eliminate
VUVLOLOW
indeterminate output states.
The output of the A1315 is held low (GND) until VCC exceeds
VUVLOHI . After VCC exceeds VUVLOHI , the device VOUT output
is enabled, providing a ratiometric output voltage that is pro- VOUT
portional to the input magnetic signal and VCC . If VCC should
drop back down below VUVLOLO after the device is powered up,
the output would be pulled low (see figure 3) until VUVLOHI is
reached again and VOUT would be reenabled.
Figure 3. Definition of Undervoltage Lockout
VCC Ramp Time. The time taken for VCC to ramp from 0 V to
VCC(typ), 3.3 V (see figure 4).
tVCC
VCC Off Level. For applications in which the VCC pin of the VCC(typ)
A1315 is being power-cycled (for example using a multiplexer
Supply Voltage, VCC (V)

to toggle the part on and off), the specification of VCC Off Level,
VCCOFF , determines how high a VCC off voltage can be tolerated
while still ensuring proper operation and startup of the device
(see figure 4).
VCCOFF

time

Figure 4. Definition of VCC Ramp Time, tVCC

8
Allegro MicroSystems
955 Perimeter Road
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 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

APPLICATION INFORMATION

A1315

VCC VOUT

RL 4.7 nF
3.3 V 0.1 µF GND

Figure 5. Typical Application Circuit

CHOPPER STABILIZATION TECHNIQUE high-frequency signal. The magnetic-sourced signal then can pass
When using Hall-effect technology, a limiting factor for switch through a low-pass filter, while the modulated DC offset is sup-
point accuracy is the small signal voltage developed across the pressed. In addition to the removal of the thermal and mechanical
Hall element. This voltage is disproportionally small relative to stress related offset, this novel technique also reduces the amount
the offset that can be produced at the output of the Hall sensor IC. of thermal noise in the Hall sensor IC while completely removing
This makes it difficult to process the signal while maintaining an the modulated residue resulting from the chopper operation. The
accurate, reliable output over the specified operating temperature chopper stabilization technique uses a high frequency sampling
and voltage ranges. Chopper stabilization is a unique approach clock. For demodulation process, a sample and hold technique is
used to minimize Hall offset on the chip. Allegro employs a used. This high-frequency operation allows a greater sampling
technique to remove key sources of the output drift induced by rate, which results in higher accuracy and faster signal-processing
thermal and mechanical stresses. This offset reduction technique capability. This approach desensitizes the chip to the effects
is based on a signal modulation-demodulation process. The of thermal and mechanical stresses, and produces devices that
undesired offset signal is separated from the magnetic field- have extremely stable quiescent Hall output voltages and precise
induced signal in the frequency domain, through modulation. The recoverability after temperature cycling. This technique is made
subsequent demodulation acts as a modulation process for the possible through the use of a BiCMOS process, which allows the
offset, causing the magnetic field-induced signal to recover its use of low-offset, low-noise amplifiers in combination with high-
original spectrum at base band, while the DC offset becomes a density logic integration and sample-and-hold circuits.

Regulator

Clock/Logic

Hall Element

Amp

Anti-aliasing Tuned
LP Filter Filter

Figure 6. Chopper Stabilization Technique

9
Allegro MicroSystems
955 Perimeter Road
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 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

PACKAGE OUTLINE DRAWINGS

Package LH, 3-Pin (SOT-23W)

+0.12
2.98 –0.08

1.49 D
4°±4°
3 A
+0.020
0.180–0.053

0.96 D

+0.10 +0.19 2.40

2.90 –0.20 1.91 –0.06
0.70
D
0.25 MIN

1.00

1 2

0.55 REF 0.25 BSC 0.95

Seating Plane
Gauge Plane B PCB Layout Reference View

8X 10° REF Branded Face

1.00 ±0.13
NNN

+0.10 1
0.05 –0.05
0.95 BSC C Standard Branding Reference View
0.40 ±0.10
N = Last three digits of device part number
For Reference Only; not for tooling use (reference DWG-2840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Active Area Depth, 0.28 mm REF
B Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C Branding scale and appearance at supplier discretion

D Hall element, not to scale

10
Allegro MicroSystems
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 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

Package UA, 3-Pin SIP, Matrix Style

For Reference Only – Not for Tooling Use

(Reference DWG-0000404, Rev. 1)
NOT TO SCALE
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown

+0.08
4.09 –0.05

45°
B
C
E
2.04
1.52 ±0.05

10°
1.44 E E Mold Ejector
+0.08 Pin Indent
3.02 –0.05

Branded 45°
Face
0.79 REF D Standard Branding Reference View
A
1.02
MAX
NNN

1
1 2 3
= Supplier emblem
N = Last three digits of device part number

14.99 ±0.25 +0.03

0.41 –0.06

+0.05
0.43 –0.07
A Dambar removal protrusion (6×)
B Gate and tie bar burr area
C Active Area Depth, 0.50 mm ±0.08
D Branding scale and appearance at supplier discretion

E Hall element, not to scale

1.27 NOM

11
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
 Linear Hall-Effect Sensor IC with Analog Output
A1315 Available in a Miniature, Low-Profile Surface-Mount Package

Revision History
Number Date Description
– March 31, 2017 Initial release
1 November 27, 2018 Added UA package option
2 January 6, 2020 Minor editorial updates

Copyright 2020, Allegro MicroSystems.

Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit
improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor
for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.

For the latest version of this document, visit our website:

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Allegro MicroSystems
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