4th Sem End Semester Question Papers
4th Sem End Semester Question Papers
SECTION-A
1. Answer the following questions: [lx 10]
(a) Find the output / error for the below code with brief explanation.
class Test{
public static void main(String[]args) {
for(int i= 0; 1; it+) {
System.out.printIn("Hello");
break;
}}}
(b) Find the output / error for the below code with brief
explanation.
class Point {
protected int x, y;
public Point(int_x, int y)
X= X;
y=y;
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Semester: 4fh
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Branch: CSE
SECTION-A
1. Answer the following questions: [lx 10]
(a) Which of the following topics is most likely to be
written about in a technical style?
A sunset/ the cuisine of a country/ electronic circuitry/ a
dentist's office/ a classroom environment
(b) Nominalize both verbs in the following sentence:
Can you please evaluate what the student demonstrated?
(c) Should a shopping list be written as a numbered list or a
bulleted list? Give one reason for your answer.
(d) Identify two transition elements in the following sentence:
Contrary to homepages and other web pages, a landing
page is a standalone page. It is disconnected from the
website's navigation, focused on the sole purpose of
convincing avisitor to sign up for a free trial or buy a
product.
(e) What does a cover page of a thesis contain?
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SECTION-A
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II. Find if the system is in a safe state by SPRING END SEMESTER EXAMINATION-2024
demonstrating an order in which the processes may 4h Semester B.Tech
complete. OPERATING SYSTEMS
If a request from process P4 arrives for (0,4.2,0) can the CM20002 /CS20002 / CS 2002 / IT20002/ CC20002
request be granted immediately?
(For 2022 & Previous Admitted Batches)
(b) Explain the deadlock recovery mechanism. [3)
Full Marks: 50
Time: 2 Hours 30 Minutes
Answer any FIVE questions.
(a) A disk has 200 cylinders numbered from 0 to 199. The (6] Question paper consists of two SECTIONS Le. A and B.
drive is currently serving a request at cylinder 53 and Section A is compusory.
Attempt any Four question from Sections B.
the previous request was at cylinder 25. The pending The figures in the margin indicate full marks.
request queue is 98, 183, 37, 122, 14, 124, 65, 67. Candidates are required to give their answers in their own words as far us practicable
Starting from the current head position, the total and all parts of a question should be answered ut one place oniy.
distance the disk arm moves to satisfy all the pending
requests for SSTF Disk Scheduling Algorithm is X SECTION-A
cylinders. Similarly, the total distance the disk arm [lx 10]
moves to satisfy all the pending requests for C-SCAN 1. Answer the following questions:
Disk Scheduling Algorithm is Y cylinders, find X+ Y. (a) Differentiate between Serial Processing OS and Batch
14] Processing OS.
(b) Explain the steps along with the data structures required
to be referred fora close( ) system call to close a file. (b) If time slice size is of 3 units of time and only one
process with 14 burst time is there in the ready queue,
and RR CPU scheduling algorithm is applied., then
6. (a) What is the role of an inode? Describe the structure of [6] what will be the number of context switches?
inode in UNIX.
(c) A process executes the following segment of code:
compare [4) for(i=1; i<5; it+) fork();
(b) Explain any two file allocation methods and
them in terms of space and time. How many child processes will be created?
(d) CPU generates a logical address as Ox00f3 whose
sk****
physical address is Oxfr15. Find out the starting
segment address of the segment and offset, if 8bits are
used for the offset.
(e) At present, the value of a counting semaphore is 7. If
20 P() operations and X number of V)operations are
performed leading to a final value of 5 for the counting
semaphore. Find the value X.
(h) Justify whether it is possible to have a deadlock with v3. (a) In the memory, four partitions are of sizes 4KB, 8KB, [71
20KB and 2KB (in order) respectively. Total 7
one process only.
processes arrive at time 0 with memory request size (in
(i) Compare between Device controllers and Device Bytes) and usage time (in ms) as given in the following
drivers. table:
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(8) Draw the circuit schematic of DRAM cell and explain (b) Ahardwired CPU uses 10control signals S1 to S10 at
the cause of leakage. various time steps Tlto T5, to implement 4 instructions
Ilto 14 as shown below:
(n) Differentiate between micro program counter and
TI T2 T3 T4
program counter. TS
(i) What is the hit ratio of the cache S1,S3,SS S2,S4,S6 SI, S7 S10 S3.S8
memory if cache
memory access time is 50ns, main memory access time 12 SI,S3,S5 S8,S9,S10 Ss,S6, S7 S6 S10
Is 25ns and average access time is 62ns?
13 SI,S3,S5 S7, S8.S10 S2,S6, S9 S1O S1,S3
0) Differentiate between Memory mapped /0 and VO 14 SI,S3,S5 S2,S6. S7 S5, S10 S6.S9 S10
mapped IO.
Draw the logic circuit for generating control signals Ss
SECTION-B and S10 respectively? Why constant 4 in MUX is still
Z. (a) Discuss the factors that affect the present in three bus architecture, though incrementer is
performance of the present?
computer. If a 8GHz computer takes 7 clock cycles for
ALU instructions. 11 clock cycles for branch
instructions and 6 clock cycles for data transfer
Instructions. Find the total time taken by the computer (a) Explain about the different types of locality of
references.
to execute the program that consists of 10 ALU
instructions, 5 branch instructions and 5 data transfer A cache consists of a total of 256 blocks. The main
instructions. memory contains 16384 blocks, each consisting of 64
(b) Explain the Relative Auto Increment and Decrement words. How many bits are there in each of the TAG.
addressing modes. The content of the top of memory BLOCK and WORD field in case of direct mapping?
stack is 2452. The content of SP is 1258.A two byte How many bits are there in each of the TAG, SET, and
call subroutine instruction is located in memory address WORD field in case of 4-way set-associative mapping?
1456 followed by address field of 5490 at location (b) Difference between SRAM and DRAM. Organize a
1457. What are the content of PC, SP and top of stack; 2MX32 memory module using 512KX8 static memory
1. After call instruction execution chip.
ii. After return from subroutine
V5. (a) Write the loating point presentation in memory
according to IEEE standard with diagram. Divide the
for the
3. (a) Write the sequence of control steps required
bus CPU
tollowing using Non-restoring division algorithm 14+5.
instructions given below in single
(b) Write the steps for multiplication according to Booth
organization: algorithm with the example to multiply 9with -4.
Branch<0LI
Il: MOV R2, (R3) and I2: