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Homework 5

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6 views

Homework 5

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shaoyue1997
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Homework 5

Google Doc Link:


https://docs.google.com/document/d/1jQ-3q6juQOc-aOfNg8-0w6mIr0H8M-se4hEbwVuTgH8/edi
t?usp=sharing

Instructions
● Complete the following questions to the best of your ability
● Answers should be clear, concise, and justified with work
● Check the schedule and assignment overview for due dates and times

Collaboration
● Professor/TAs
○ You ​may​ discuss any content with any professor or TA.
● Students
○ You ​may​ discuss high-level concepts, techniques, jargon, keywords, related
problems, or course content that is relevant to the material.
○ You ​may not​ discuss particular solutions to any of the questions.
○ If you have substantial conversations with any students, please note their name
and, if you feel it necessary, the extent of your collaboration.
● Outside Sources (Internet, books)
○ You ​may​ use external references for any course content.
○ You ​may​ use an external tool to verify your solutions where appropriate, but not
to generate solutions to any questions.
○ List any outside sources that you use. Formal citations are not necessary; links
are fine.
Question 1 (50 points)
Virtual memory uses a page table to track the mapping of virtual addresses to physical
addresses. This exercise shows how this table must be updated as addresses are accessed.
The following data constitutes a stream of virtual addresses as seen on a system. Assume 4KB
page size, a 4-entry fully associative TLB, and true LRU replacement. Assume initial LRU way is
the one with tag 11. If a page must be brought in from disk, assume the page number is current
largest page number plus 1.
Address stream(in decimal)​: 573, 13920, 6323, 34587, 32776, 20800

TLB: Page Table:


Valid Tag Physical Page Valid Physical Page Number
Number
1 5
1 11 12
0 Disk
1 7 4
0 Disk
1 3 6
1 6
0 4 9
1 9

1 11

0 Disk

1 4

0 Disk

0 Disk

1 3

1 4

(a) Given the address stream shown, and the initial TLB and page table states provided
above, show the final state of the system. Also list for each reference if it is a hit in the
TLB, a hit in the page table or a page fault.

(b) Repeat (a), but this time use 8KB pages instead of 4KB pages. What would be some
of the advantages of having a larger page size? What are some of the disadvantages?
(c)​ Show the final contents of the TLB if it is 2-way set associative. Also show the
contents of the TLB if it is direct mapped. Discuss the importance of having a TLB to
high performance. How would virtual memory accesses be handled if there were no
TLB? You can assume your initial LRU way.

Question 2 (30 points)


There are several parameters that impact the overall size of the page table. Listed
below are key page table parameters.
Virtual Address Size Page Size Page Table Entry Size

32 bits 4 KB 4 bytes

(a) Given the parameters shown above, calculate the total page table size for a system
running 5 applications that utilize half of the memory available.

(b) Given the parameters shown above, calculate the total page table size for a system
running 5 applications that utilize half of the memory available, given a two-level page
table approach. Assume each entry of the main page table is 6 bytes. Calculate the
minimum and maximum amount of memory required.

(c) A cache designer wants to increase the size of a 4KB virtually indexed, physically
tagged cache. Given the page size shown above, is it possible to make a 16KB
direct-mapped cache, assuming 2 words per block? How would the designer increase
the data size of the cache?
Question 3 (15 points)
For each question, circle the best answer. If none of the selections are appropriate, then
choose “e. None of the above”.

1. Which of the following is an advantage of interrupts over polling?


a. Interrupts are a simpler mechanism for both the hardware and software.
b. Interrupts allow for more efficient CPU utilization.
c. Interrupts are compatible with virtual memory, while polling is not.
d. Polling causes bad hit rates in the L1 instruction cache.
e. None of the above

2. What three operations (in the correct order) are required to read data from the hard
disk?
a. jal, sw, jr
b. Wait for rotation, seek, read data as it spins under
c. Interrupt, seek, read data as it spins under
d. Seek, wait for rotation, read data as it spins under
e. None of the above

3. Which of the following would not cause an exception?


a. Division by zero.
b. A branch is mis-predicted.
c. Attempting to execute a privileged instruction in a normal application.
d. A load or store does not have a valid virtual to physical translation.
e. None of the above (all cause exceptions).

Question 4 (5 points)
Briefly explain the differences between Exceptions and Interrupts using one or two
sentences at most.

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