NCP1396A, NCP1396B

High Performance Resonant

Mode Controller featuring
High-- Voltage Drivers
The NCP1396 A/B offers everything needed to build a reliable and
rugged resonant mode power supply. Its unique architecture includes http://onsemi.com
a 500 kHz Voltage Controlled Oscillator whose control mode brings
flexibility when an ORing function is a necessity, e.g. in multiple MARKING
feedback paths implementations. Thanks to its proprietary DIAGRAMS
high-- voltage technology, the controller welcomes a bootstrapped 16 16
MOSFET driver for half-- bridge applications accepting bulk voltages
up to 600 V. Protections featuring various reaction times, e.g. NCP1396xG
1 AWLYWW
immediate shutdown or timer-- based event, brown-- out, broken SO-- 16, LESS PIN 13
opto-- coupler detection etc., contribute to a safer converter design, D SUFFIX 1
without engendering additional circuitry complexity. An adjustable CASE 751AM
deadtime also helps lowering the shoot-- through current contribution
as the switching frequency increases.
Features x = A or B
 High-- frequency Operation from 50 kHz up to 500 kHz A = Assembly Location
WL = Wafer Lot
 600 V High-- Voltage Floating Driver Y = Year
 Selectable Minimum Switching Frequency with 3% Accuracy WW = Work Week
G = Pb--Free Package
 Adjustable Deadtime from 100 ns to 2 ms.
 Startup Sequence via an Adjustable Soft-- start
 Brown-- out Protection for a Simpler PFC Association
PIN CONNECTIONS
 Latched Input for Severe Fault Conditions, e.g. Over Temperature
or OVP CSS 1 16 Vboot
 Timer-- based Input with Auto-- recovery Operation for Delayed Fmax 2 15 Mupper
Event Reaction
Ctimer 3 14 HB
 Enable Input for Immediate Event Reaction or Simple ON/OFF
Rt 4
Control
BO 5 12 VCC
 VCC Operation up to 20 V
FB 6 11 Mlower
 Low Startup Current of 300 mA
DT 7 10 GND
 1 A / 0.5 A Peak Current Sink / Source Drive Capability
Fast Fault 8 9 Slow Fault
 Common Collector Optocoupler Connection for Easier ORing
 Internal Temperature Shutdown (Top View)
 B Version features 10 V VCC Startup Threshold
 These are Pb-- Free Devices

Typical Applications ORDERING INFORMATION

See detailed ordering and shipping information in the package
 Flat Panel Display Power Converters dimensions section on page 24 of this data sheet.
 High Power AC/DC Adapters for Notebooks
 Industrial and Medical Power Sources
 Offline Battery Chargers

 Semiconductor Components Industries, LLC, 2010 1 Publication Order Number:

November, 2010 - Rev. 7 NCP1396/D
 NCP1396A, NCP1396B

HV
R17 R8
FB OVP R24 R23 D4

R20 M1 +
U2A
U5 C6
U3A 1 16
R10
2 15
C12 L1 Vout
3 14
4 D1 R4 R12
D8 +
Rt 5 12
11
R21 M2
6 C2
R5 R1
7 10
R7 R11 FB OVP
8 9
Slow Input C13 T1 D2
Fast
Input U2B C4 U3B
Fmax D9

D7 D6
C9 C8 C10 D3 C11 +
C7 C1 R3 C3
C14
U1
R19 R9 R14 R18 R13 R6 R22 R16 R2

Soft-- Timer Skip BO DT

start Selection
Figure 1. Typical Application Example

PIN FUNCTION DESCRIPTION

Pin No. Pin Name Function Pin Description
1 CSS Soft--start Select the soft--start duration
2 Fmax Frequency clamp A resistor sets the maximum frequency excursion
3 Ctimer Timer duration Sets the timer duration in presence of a fault
4 Rt Timing resistor Connecting a resistor to this pin, sets the minimum oscillator frequency
reached for VFB = 1 V

5 BO Brown--Out Detects low input voltage conditions. When brought above Vlatch, it fully
latches off the controller.

6 FB Feedback Injecting current in this pin increases the oscillation frequency up to Fmax.
7 DT Dead--time A simple resistor adjusts the dead--time width
8 Fast Fault Quick fault detection Fast shut--down pin. Upon release, a clean startup sequence occurs. Can be
used for skip cycle purposes.

9 Slow Fault Slow fault detection When asserted, the timer starts to countdown and shuts down the controller
at the end of its time duration.

10 GND Analog ground --

11 Mlower Low side output Drives the lower side MOSFET
12 VCC Supplies the controller The controller accepts up to 20 V
13 -- -- --
14 HB Half--bridge connection Connects to the half--bridge output
15 Mupper High side output Drives the higher side MOSFET
16 Vboot Bootstrap pin The floating VCC supply for the upper stage

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 NCP1396A, NCP1396B

Vdd

Temperature
Shutdown

S VBOOT
Imin
Vfb  Vfb_off D Q
Vref + Vref
Clk Q
--
Rt
+ R
IDT
C FF

Management
DT Adj. 50% DC Mupper

VCC
I = Imax for Vfb = 5.3 V
I = 0 for Vfb < Vfb_min
BO
Reset
Vdd

PON
Reset
Imax UVLO
Vfb = 5 SS
Fault
Vdd Fast
Timeout
Fault
Fault HB
Vref

Itimer
Fmax

If FAULT Itimer else 0

Level
Timer + Shifter NC
-- Timeout
Fault

+
Vref

PON
Reset
Vdd Fault
VCC

ISS Fault

SS

Mlower
FB +
G=1
-- > 0 only Vdd
V = V(FB) -- Vfb_min
RFB +
-- GND
+ +
Vfb_fault
Vfb_min
Fast
--
Fault
+ 20 ns Noise
Vref
Filter
Deadtime +
IDT
DT Adjustment Vref Fault
Vdd

20 ms Noise
IBO Filter

Q Q
BO + +
S R PON Reset
-- -- 20 ms Noise
+ +
VBO Vlatch Filter

+
Slow -
Fault +
Vref Fault

Figure 2. Internal Circuit Architecture

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 NCP1396A, NCP1396B

MAXIMUM RATINGS
Rating Symbol Value Unit
High Voltage bridge pin, pin 14 VBRIDGE --1 to 600 V
Floating supply voltage VBOOT-- 0 to 20 V
VBRIDGE

High side output voltage VDRV_HI VBRIDGE--0.3 to V

VBOOT+0.3

Low side output voltage VDRV_LO --0.3 to VCC + 0.3 V

Allowable output slew rate dVBRIDGE/dt 50 V/ns
Power Supply voltage, pin 12 VCC 20 V
Maximum voltage, all pins (except pin 11 and 10) -- --0.3 to 10 V
Thermal Resistance -- Junction--to--Air, SOIC version RθJA 130 C/W
Operating Junction Temperature Range TJ --40 to +125 C
Maximum Junction Temperature TJMAX +150 C
Storage Temperature Range TSTG --60 to +150 C
ESD Capability, Human Body Model (All pins except HV Pins) -- 2 kV
ESD Capability, Machine Model -- 200 V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000V per JESD22--A114--B
Machine Model Method 200V per JESD22--A115--A.
2. This device meets latch--up tests defined by JEDEC Standard JESD78.

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 NCP1396A, NCP1396B

ELECTRICAL CHARACTERISTICS
(For typical values TJ = 25C, for min/max values TJ = --40C to +125C, Max TJ = 150C, VCC = 12 V, unless otherwise noted.)
Characteristic Pin Symbol Min Typ Max Unit

SUPPLY SECTION
Turn--on threshold level, VCC going up – A version 12 VCCON 12.3 13.4 14.3 V
Turn--on threshold level, VCC going up – B version 12 VCCON 9.5 10.5 11.5 V
Minimum operating voltage after turn--on 12 VCC(min) 8.5 9.5 10.5 V
Startup voltage on the floating section 16--14 VbootON 8 9 10 V
Cutoff voltage on the floating section 16--14 Vboot(min) 7.4 8.4 9.4 V
Startup current, VCC < VCCON 0C < TJ < +125C 12 Istartup -- -- 300 mA
--40C < TJ < +125C -- -- 350

VCC level at which the internal logic gets reset 12 VCCreset -- 6.5 -- V
Internal IC consumption, no output load on pin 15/14 – 11/10, Fsw = 12 ICC1 -- 4 -- mA
300 kHz

Internal IC consumption, 1 nF output load on pin 15/14 – 11/10, Fsw = 12 ICC2 -- 11 -- mA

300 kHz

Consumption in fault mode (All drivers disabled, VCC > VCC(min) ) 12 ICC3 -- 1.2 -- mA

VOLTAGE CONTROL OSCILLATOR (VCO)

Characteristic Pin Symbol Min Typ Max Unit
Minimum switching frequency, Rt = 18 kΩ on pin 4, Vpin 6 = 0.8 V, DT = 4 Fsw min 58.2 60 61.8 kHz
300 ns

Maximum switching frequency, Rfmax = 1.3 kΩ on pin 2, Vpin 6 > 5.3 V, 2 Fsw max 425 500 575 kHz
Rt = 18 kΩ, DT = 300 ns

Feedback pin swing above which Δf = 0 6 FBSW -- 5.3 -- V

Operating duty--cycle symmetry 11--15 DC 48 50 52 %
Delay before any driver re--start in fault mode -- Tdel -- 20 -- ms

FEEDBACK SECTION
Characteristic Pin Symbol Min Typ Max Unit
Internal pull--down resistor 6 Rfb -- 20 -- kΩ
Voltage on pin 6 below which the FB level has no VCO action 6 Vfb_min -- 1.2 -- V
Voltage on pin 6 below which the controller considers a fault 6 Vfb_off -- 0.6 -- V

DRIVE OUTPUT
Characteristic Pin Symbol Min Typ Max Unit
Output voltage rise--time @ CL = 1 nF, 10--90% of output signal 15--14/1 Tr -- 40 -- ns
1--10

Output voltage fall--time @ CL = 1 nF, 10--90% of output signal 15--14/1 Tf -- 20 -- ns

1--10

Source resistance 15--14/1 ROH -- 13 -- Ω

1--10

Sink resistance 15--14/1 ROL -- 5.5 -- Ω

1--10

Dead time with RDT = 10 kΩ from pin 7 to GND 7 T_dead 250 300 340 ns
Maximum dead--time with RDT = 82 kΩ from pin 7 to GND 7 T_dead--max -- 2 -- ms
Minimum dead--time, RDT = 3 kΩ from pin 7 to GND 7 T_dead--min -- 100 -- ns
Leakage current on high voltage pins to GND 14, IHV_LEAK -- -- 5 mA
15,16

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 NCP1396A, NCP1396B

ELECTRICAL CHARACTERISTICS
(For typical values TJ = 25C, for min/max values TJ = --40C to +125C, Max TJ = 150C, VCC = 12 V, unless otherwise noted.)

TIMERS
Characteristic Pin Symbol Min Typ Max Unit
Timer charge current 3 Itimer -- 160 -- mA
Timer duration with a 1 mF capacitor and a 1 MΩ resistor 3 T--timer -- 25 -- ms
Timer recurrence in permanent fault, same values as above 3 T--timerR -- 1.4 -- s
Voltage at which pin 3 stops output pulses 3 VtimerON 3.5 4 4.4 V
Voltage at which pin 3 re--starts output pulses 3 VtimerOFF 0.9 1 1.1 V
Soft--start ending voltage 1 VSS -- 2 -- V
Soft--start charge current 0C < TJ < +125C 1 ISS 80 110 125 mA
--40C < TJ < +125C 75 110 130

Soft--start duration with a 100 nF capacitor (Note 3) 1 T--SS -- 1.8 -- ms

PROTECTION
Characteristic Pin Symbol Min Typ Max Unit
Reference voltage for fast input (Note 4) 8--9 VrefFaultF 1.00 1.05 1.10 V
Hysteresis for fast input (Note 4) 8--9 HysteFaultF -- 80 -- mV
Reference voltage for slow input 0C < TJ < +125C 8--9 VrefFaultS 0.95 1.00 1.05 V
--40C < TJ < +125C 0.92 1.00 1.05

Hysteresis for slow input 8--9 HysteFaultS -- 60 -- mV

Propagation delay for fast fault input drive shutdown 8 TpFault -- 55 90 ns
Brown--Out input bias current 5 IBObias -- 0.02 -- mA
Brown--Out level (Note 4) 5 VBO 0.99 1.04 1.09 V
Hysteresis current, Vpin5 > VBO – A version 0C < TJ < +125C 5 IBO_A 21.5 26.5 31.5 mA
--40C < TJ < +125C 19 26.5 33

Hysteresis current, Vpin5 > VBO – B version 0C < TJ < +125C 5 IBO_B 86 106 126 mA
--40C < TJ < +125C 80 106 132

Latching voltage 5 Vlatch 3.6 4 4.4 V

Temperature shutdown -- TSD 140 -- -- C
Hysteresis -- TSDhyste -- 30 -- C
3. The A version does not activate soft--start (unless the feedback pin voltage is below 0.6 V) when the fast--fault is released, this is for skip cycle
implementation. The B version does activate the soft--start upon release of the fast--fault input for any feedback conditions.
4. Guaranteed by design

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 NCP1396A, NCP1396B

TYPICAL CHARACTERISTICS -- A VERSION

13.55 9.60

13.5 9.58
9.56
13.45
9.54
13.4 9.52

VCC(min) (V)
VCC(on) (V)

13.35 9.50
13.3 9.48
9.46
13.25
9.44
13.2
9.42
13.15 9.40
13.1 9.38
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 3. VCC(on) Figure 4. VCC(min)

60.2 501

60.1 500

60.0 499
FREQUENCY (kHz)

FREQUENCY (kHz)

59.9 498

59.8 497

59.7 496

59.6 495

59.5 494
59.4 493
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 5. Fsw min Figure 6. Fsw max

29 1.060

27 1.055

1.050
25
VrefFaultFF (V)

1.045
RFB (kΩ)

23
1.040
21
1.035
19
1.030
17 1.025
15 1.020
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 7. Pulldown Resistor (RFB) Figure 8. Fast Fault (VrefFaultF)

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 NCP1396A, NCP1396B

TYPICAL CHARACTERISTICS -- A VERSION

20 8.0

19 7.5
18 7.0

17 6.5
ROH (Ω)

ROL (Ω)
16 6.0

15 5.5

14 5.0

13 4.5

12 4.0
11 3.5
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 9. Source Resistance (ROH) Figure 10. Sink Resistance (ROL)

109 296
108 295
107 294
106 293
DT_nom (ns)
DT_min (ns)

105 292
104 291
103 290
102 289
101 288
100 287
99 286
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 11. T_dead_min Figure 12. T_dead_nom

1.970 3.960
3.955
1.968
3.950
3.945
1.966
DT_max (ms)

3.940
Vlatch (V)

1.964 3.935
3.930
1.962
3.925
3.920
1.960
3.915
1.958 3.910
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 13. T_dead_max Figure 14. Latch Level (Vlatch)

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 NCP1396A, NCP1396B

TYPICAL CHARACTERISTICS -- A VERSION

1.045 26.8

26.6
1.040 26.4
26.2
1.035

IBO (mA)
VBO (V)

26.0

25.8
1.030
25.6

1.025 25.4

25.2
1.020 25.0
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 15. Brown--Out Reference (VBO) Figure 16. Brown--Out Hysteresis Current (IBO)

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 NCP1396A, NCP1396B

TYPICAL CHARACTERISTICS -- B VERSION

10.65 9.56
9.54
10.60
9.52

10.55 9.50

VCC(min) (V)
9.48
VCC(on) (V)

10.50 9.46
9.44
10.45
9.42
9.40
10.40
9.38
10.35 9.36
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 17. VCC(on) Figure 18. VCC(min)

60.1 502

60.0 501
59.9
FREQUENCY (kHz)

FREQUENCY (kHz)

500
59.8
499
59.7
498
59.6
497
59.5

59.4 496

59.3 495
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 19. Fsw min Figure 20. Fsw max

29 1.060

27 1.055

25 1.050
VrefFaultFF (V)
RFB (kΩ)

23 1.045

21 1.040

19 1.035

17 1.030

15 1.025
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 21. Pulldown Resistor (RFB) Figure 22. Fast Fault (VrefFaultF)

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 NCP1396A, NCP1396B

TYPICAL CHARACTERISTICS -- B VERSION

19 8.0

18 7.5
17 7.0
16 6.5
ROH (Ω)

ROL (Ω)
15 6.0

14 5.5

13 5.0

12 4.5
11 4.0
10 3.5
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 23. Source Resistance (ROH) Figure 24. Sink Resistance (ROL)

108 294
107 293
106 292
105 291
DT_nom (ns)
DT_min (ns)

104 290
103 289
102 288
101 287
100 286
99 285
98 284
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 25. T_dead_min Figure 26. T_dead_nom

1.970 3.980
3.975
1.968
3.970
3.965
1.966
DT_max (ms)

3.960
Vlatch (V)

1.964 3.955
3.950
1.962
3.945
3.940
1.960
3.935
1.958 3.930
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 27. T_dead_max Figure 28. Latch Level (Vlatch)

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 NCP1396A, NCP1396B

TYPICAL CHARACTERISTICS -- B VERSION

1.050 107

106
1.045
105

104
1.040

IBO (mA)
VBO (V)

103
1.035 102

101
1.030
100

1.025 99
--40 --25 --10 5 20 35 50 65 80 95 110 125 --40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C) TEMPERATURE (C)

Figure 29. Brown--Out Reference (VBO) Figure 30. Brown--Out Hysteresis Current (IBO)

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 NCP1396A, NCP1396B

Application Information

The NCP1396 A/B includes all necessary features to help B version slightly increases this current to 100 mA in
building a rugged and safe switch-- mode power supply order to improve the noise immunity.
featuring an extremely low standby power. The below  Adjustable fault timer duration: When a fault is
bullets detail the benefits brought by implementing the detected on the slow fault input or when the FB path is
NCP1396 controller: broken, a timer starts to charge an external capacitor.
 Wide frequency range: A high-- speed Voltage If the fault is removed, the timer opens the charging
Control Oscillator allows an output frequency path and nothing happens. When the timer reaches its
excursion from 50 kHz up to 500 kHz on Mlower and selected duration (via a capacitor on pin 3), all pulses
Mupper outputs. are stopped. The controller now waits for the
 Adjustable dead-- time: Thanks to a single resistor discharge via an external resistor of pin 3 capacitor to
wired to ground, the user has the ability to include issue a new clean startup sequence with soft-- start.
some dead-- time, helping to fight cross-- conduction  Cumulative fault events: In the NCP1396A/B, the
between the upper and the lower transistor. timer capacitor is not reset when the fault disappears.
 Adjustable soft-- start: Every time the controller starts It actually integrates the information and cumulates
to operate (power on), the switching frequency is the occurrences. A resistor placed in parallel with the
pushed to the programmed maximum value and slowly capacitor will offer a simple way to adjust the
moves down toward the minimum frequency, until the discharge rate and thus the auto-- recovery retry rate.
feedback loop closes. The soft-- start sequence is  Fast and slow fault detection: In some application,
activated in the following cases: a) normal startup subject to heavy load transients, it is interesting to
b) back to operation from an off state: during hiccup give a certain time to the fault circuit, before
faulty mode, brown-- out or temperature shutdown activating the protection. On the other hands, some
(TSD). In the NCP1396A, the soft-- start is not critical faults cannot accept any delay before a
activated back to operation from the fast fault input, corrective action is taken. For this reason, the
unless the feedback pin voltage is below 0.6 V. To the NCP1396A/B includes a fast fault and a slow fault
opposite, in the B version, the soft-- start is always input. Upon assertion, the fast fault immediately stops
activated back from the fast fault input whatever the all pulses and stays in the position as long as the
feedback level is. driving signal is high. When released low (the fault
 Adjustable minimum and maximum frequency has gone), the controller has several choices: in the A
excursion: In resonant applications, it is important to version, pulses are back to a level imposed by the
stay away from the resonating peak to keep operating feedback pin without soft-- start, but in the B version,
the converter in the right region. Thanks to a single pulses are back through a regular soft-- start sequence.
external resistor, the designer can program its lowest  Skip cycle possibility: The absence of soft-- start on
frequency point, obtained in lack of feedback voltage the NCP1396A fast fault input offers an easy way to
(during the startup sequence or in short-- circuit implement skip cycle when power saving features are
conditions). Internally trimmed capacitors offer a 3% necessary. A simple resistive connection from the
precision on the selection of the minimum switching feedback pin to the fast fault input, and skip can be
frequency. The adjustable upper stop being less implemented.
precise to 15%.  Broken feedback loop detection: Upon start-- up or
 Low startup current: When directly powered from any time during operation, if the FB signal is missing,
the high-- voltage DC rail, the device only requires the timer starts to charge a capacitor. If the loop is
300 mA to start-- up. In case of an auxiliary supply, the really broken, the FB level does not grow-- up before
B version offers a lower start-- up threshold to cope the timer ends counting. The controller then stops all
with a 12 V dc rail. pulses and waits that the timer pin voltage collapses to
 Brown-- Out detection: To avoid operation from a low 1 V typically before a new attempt to re-- start, via the
input voltage, it is interesting to prevent the controller soft-- start. If the optocoupler is permanently broken, a
from switching if the high-- voltage rail is not within hiccup takes place.
the right boundaries. Also, when teamed with a PFC  Finally, two circuit versions, A and B: The A and B
front-- end circuitry, the brown-- out detection can versions differ because of the following changes:
ensure a clean start-- up sequence with soft-- start, 1. The startup thresholds are different, the A starts
ensuring that the PFC is stabilized before energizing to pulse for VCC = 13.3 V whereas the B pulses
the resonant tank. The A version features a 26.5 mA for VCC = 10.5 V. The turn off levels are the same
hysteresis current for the lowest consumption and the however. The A is recommended for consumer

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 NCP1396A, NCP1396B

products where the designer can use an external Voltage--Controlled Oscillator

startup resistor, whereas the B is more The VCO section features a high-- speed circuitry
recommended for industrial / medical allowing operation from 100 kHz up to 1 MHz. However,
applications where a 12 V auxiliary supply as a division by two internally creates the two Q and Q
directly powers the chip. outputs, the final effective signal on output Mlower and
2. The A version does not activate the soft-- start Mupper switches between 50 kHz and 500 kHz. The VCO
upon release of the fast fault input. This is to let is configured in such a way that if the feedback pin goes up,
the designer implement skip cycle. To the the switching frequency also goes up. Figure 31 shows the
opposite, the B version goes back to operation architecture of this oscillator.
upon the fast fault pin release via a soft-- start
sequence.
FBinternal
Vdd

max
+ Fsw
-

max
Imin
0 to I_Fmax S
Vref
D Q
Rt +
- Clk Q
Rt sets Cint
Fmin for V(FB) = 0 + R

Vdd

IDT

Vref Imin
A B
DT
Rdt sets
the dead--time
Vdd
VCC
Fmax

Fmax sets
the maximum Fsw

FB
+ Vfb < Vb_off
Rfb - Start fault timer
20 k +
Vb_off

Figure 31. The Simplified VCO Architecture

The designer needs to program the maximum switching wiring a resistor from pin 2 to GND will set the maximum
frequency and the minimum switching frequency. In LLC frequency excursion. To improve the circuit protection
configurations, for circuits working above the resonant features, we have purposely created a dead zone, where the
frequency, a high precision is required on the minimum feedback loop has no action. This is typically below 1.2 V.
frequency, hence the 3% specification. This minimum Figure 32 details the arrangement where the internal
switching frequency is actually reached when no feedback voltage (that drives the VCO) varies between 0 and 2.3 V.
closes the loop. It can happen during the startup sequence, However, to create this swing, the feedback pin (to which
a strong output transient loading or in a short-- circuit the optocoupler emitter connects), will need to swing
condition. By installing a resistor from pin 4 to GND, the typically between 1.2 V and 5.3 V.
minimum frequency is set. Using the same philosophy,

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 NCP1396A, NCP1396B

VCC
F Mu&Lu

No variations

Fmax 450 kHz

FB
+
R1 --
11.3 k ΔFsw = 300 kHz
+
R3 D1
100 k Vref Fmin 150 kHz
2.3 V
0.5 V Fmax
R2
VFB
8.7 k
Rfmax Fault 1.2 V ΔVFB = 4.1 V 5.3 V
area
0.6 V
Figure 34. Here a different minimum frequency was
Figure 32. The OPAMP Arrangement Limits the
programmed as well as a maximum frequency
VCO Modulation Signal between 0.5 and 2.3 V
excursion
This techniques allows us to detect a fault on the
converter in case the FB pin cannot rise above 0.6 V (to Please note that the previous small-- signal VCO slope has
actually close the loop) in less than a duration imposed by now been reduced to 300 k / 4.1 = 73 kHz / V on Mupper
the programmable timer. Please refer to the fault section for and Mlower outputs. This offers a mean to magnify the
detailed operation of this mode. feedback excursion on systems where the load range does
As shown on Figure 32, the internal dynamics of the not generate a wide switching frequency excursion. Thanks
VCO control voltage will be constrained between 0.5 V to this option, we will see how it becomes possible to
and 2.3 V, whereas the feedback loop will drive pin 6 (FB) observe the feedback level and implement skip cycle at
between 1.2 V and 5.3 V. If we take the default FB pin light loads. It is important to note that the frequency
excursion numbers, 1.2 V = 50 kHz, 5.3 V = 500 kHz, then evolution does not have a real linear relationship with the
the VCO maximum slope will be: feedback voltage. This is due to the deadtime presence
500 k − 50 k which stays constant as the switching period changes.
= 109.7 kHz∕V The selection of the three setting resistors (Fmax, Fmin
4.1
Figures 33 and 34 portray the frequency evolution deadtime) requires the usage of the selection charts
depending on the feedback pin voltage level in a different displayed below:
frequency clamp combination.
650

F Mu&Lu VCC = 12 V
550 FB = 6.5 V
DT = 300 ns
No variations

Fmax 500 kHz 450

Fmax (kHz)

350
ΔFsw = 450 kHz Fmin = 200 kHz
250

Fmin 50 kHz 150 Fmin = 50 kHz

VFB
50
Fault 1.5 3.5 5.5 7.5 9.5 11.5 13.5 15.5 17.5
1.2 V ΔVFB = 4.1 V 5.3 V
area RFmax (kΩ)
0.6 V
Figure 35. Maximum Switching Frequency Resistor
Figure 33. Maximal Default Excursion, Rt = Selection Depending on the Adopted Minimum
22 kΩ on pin 4 and Rfmax = 1.3 kΩ on pin 2 Switching Frequency

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 NCP1396A, NCP1396B

500 ORing Capability

450 VCC = 12 V
If for any particular reason, there is a need for a
FB = 1 V frequency variation linked to an event appearance (instead
400 DT = 300 ns of abruptly stopping pulses), then the FB pin lends itself
very well to the addition of other sweeping loops. Several
350
diodes can easily be used perform the job in case of reaction
Fmin (kHz)

300 to a fault event or to regulate on the output current (CC

250
operation). Figure 39 shows how to do it.

200 VCC

150

100
1 3 5 7 9 11
RFmin (kΩ) In1 FB VCO
Figure 36. Minimum Switching Frequency Resistor
Selection (Fmin = 100 kHz to 500 kHz) In2
20 k

100

90 VCC = 12 V Figure 39. Thanks to the FB Configuration, Loop

FB = 1 V
80
ORing is Easy to Implement
DT = 300 ns

70 Dead--time Control
Dead-- time control is an absolute necessity when the
Fmin (kHz)

60
half-- bridge configuration comes to play. The dead-- time
50 technique consists in inserting a period during which both
high and low side switches are off. Of course, the
40
dead-- time amount differs depending on the switching
30 frequency, hence the ability to adjust it on this controller.
The option ranges between 100 ns and 2 ms. The dead-- time
20
10 15 20 25 30 35 40 45 50 55 is actually made by controlling the oscillator discharge
RFmin (kΩ) current. Figure 40 portrays a simplified VCO circuit based
Figure 37. Minimum Switching Frequency Resistor on Figure 31.
Selection (Fmin = 20 kHz to 100 kHz)

2000
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
DT (ns)

800
700
600
500
400
300
200 Vcc = 12 V
100
3.5 13.5 23.5 33.5 43.5 53.5 63.5 73.5 83.5
Rdt (kΩ)
Figure 38. Dead--Time Resistor Selection

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 NCP1396A, NCP1396B

Vdd

Icharge:
Fsw min + Fsw max
S
D Q
+
Clk Q
--
Idis R

Ct + 3 V--1 V

Vref

DT

RDT
A B

Figure 40. Dead--time Generation

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 NCP1396A, NCP1396B

During the discharge time, the clock comparator is high over the VCO lead as soon as the output voltage has reached
and un-- validates the AND gates: both outputs are low. the target. If not, then the minimum switching frequency is
When the comparator goes back to the low level, during the reached and a fault is detected on the feedback pin
timing capacitor Ct recharge time, A and B outputs are (typically below 600 mV). Figure 41 depicts a typical
validated. By connecting a resistor RDT to ground, it frequency evolution with soft-- start.
creates a current whose image serves to discharge the Ct
capacitor: we control the dead-- time. The typical range Fsw
evolves between 100 ns (RDT = 3.5 kΩ) and 2 ms (RDT = Fmax
83.5 kΩ). Figure 43 shows the typical waveforms.
Soft--start Sequence
In resonant controllers, a soft-- start is needed to avoid If no FB
suddenly applying the full current into the resonating Action
circuit. In this controller, a soft-- start capacitor connects to
pin 1 and offers a smooth frequency variation upon
Fmin
start-- up: when the circuit starts to pulse, the VCO is pushed
Vss
to the maximum switching frequency imposed by pin 2.
Then, it linearly decreases its frequency toward the Soft--start Duration
minimum frequency selected by a resistor on pin 4. Of
course, practically, the feedback loop is suppose to take Figure 41. Soft--start Behavior

20.0
Ires1 in Amperes

10.0
Plot1

0 Ires
--10.0 SS
--20.0 Action

177
Target is Vout
175
Vout in Volts

Reached
Plot2

173

171

169
200 m 600 m 1.00 m 1.40 m 1.80 m
time in seconds
Figure 42. A Typical Start--up Sequence on a LLC Converter

Please note that the soft-- start will be activated in the no soft-- start occurs to offer the best skip cycle behavior.
following conditions: However, it is very possible to combine skip cycle and true
- A startup sequence fast fault input, e.g. via ORing diodes driving pin 6. In that
- During auto-- recovery burst mode case, if a signal maintains the fast fault input high long
- A brown-- out recovery enough to bring the feedback level down (that is to say
- A temperature shutdown recovery below 0.6 V) since the output voltage starts to fall down,
The fast fault input undergoes a special treatment. Since then the soft-- start is activated after the release of the pin.
we want to implement skip cycle through the fast fault In the B version tailored to operate from an auxiliary 12 V
input on the NCP1396A, we cannot activate the soft-- start power supply, the soft-- start is always activated upon the
every time the feedback pin stops the operations in low fast fault input release, whatever the feedback condition is.
power mode. Therefore, when the fast fault pin is released,

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 NCP1396A, NCP1396B

4.00

3.00
Vct in Volts
Plot1

2.00

1.00
Ct Voltage
0

16.0
Clock Pulses
DT
Clock in Volts

12.0
Plot2

8.00

4.00

8.00 DT
DT
Difference in Volts

4.00
Plot3

--4.00
A -- B
--8.00

56.2 m 65.9 m 75.7 m 85.4 m 95.1 m

time in seconds
Figure 43. Typical Oscillator Waveforms

Brown--Out Protection Vbulk Vdd

The Brown-- Out circuitry (BO) offers a way to protect the
ON/OFF
resonant converter from low DC input voltages. Below a Rupper IBO
given level, the controller blocks the output pulses, above
it, it authorizes them. The internal circuitry, depicted by BO +
Figure 44, offers a way to observe the high-- voltage (HV) BO
--
rail. A resistive divider made of Rupper and Rlower, brings
Rlower
a portion of the HV rail on pin 5. Below the turn-- on level, +
the 26.5 mA current source IBO is off. Therefore, the VBO
turn-- on level solely depends on the division ratio brought
by the resistive divider.

Figure 44. The Internal Brown--out Configuration with

an Offset Current Source

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 NCP1396A, NCP1396B

450 16.0 351 Volts

350 12.0 250 Volts

Plot1 Vin in Volts

Vcmp in Volts
Vin
250 8.0

150 4.0

50 0
BO

20 m 60 m 100 m 140 m 180 m

time in seconds
Figure 45. Simulation Results for 350 / 250 ON / OFF Levels

To the contrary, when the internal BO signal is high If we decide to turn-- on our converter for Vbulk1 equals
(Mlower and Mupper pulse), the IBO source is activated 350 V and turn it off for Vbulk2 equals 250 V, then for A
and creates a hysteresis. As a result, it becomes possible to version (IBO_A = 26.5 mA, VBO = 1.04 V) we obtain:
select the turn-- on and turn-- off levels via a few lines of Rupper = 3.77 MΩ
algebra:
Rlower = 11.25 kΩ
IBO is off
The bridge power dissipation is 4002 / 3.781 MΩ = 42 mW
R lower
V(+) = V bulk1 × (eq. 1) when front-- end PFC stage delivers 400 V.
R lower + R upper
Figure 45 simulation result confirms our calculations.
IBO is on
(eq. 2) Latch--off Protection
V(+) = V bulk2 ×
R lower + R upper
R lower
+ IBO × 
R lower × R upper
R lower + R upper
 There are some situations where the converter shall be
fully turned-- off and stay latched. This can happen in
presence of an over-- voltage (the feedback loop is drifting)
We can now extract Rlower from equation 1 and plug it into or when an over temperature is detected. Thanks to the
equation 2, then solve for Rupper: addition of a comparator on the BO pin, a simple external
V bulk1 − VBO circuit can lift up this pin above VLATCH (4 V typical) and
R upper = R lower × (eq. 3)
VBO permanently disable pulses. The VCC needs to be cycled
V bulk1 − V bulk2 down below 6.5 V typically to reset the controller.
R lower = VBO × (eq. 4)
IBO × (V bulk1 − VBO)

VCC Vbulk
20 ms
+ RC To permanent
Q1 -- latch
Vout +
Vlatch
Rupper
IBO
Vdd

BO +
BO
--
NTC +
Rlower
VBO

Figure 46. Adding a comparator on the BO pin offers a way to latch--off the controller

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20
 NCP1396A, NCP1396B

On Figure 46, Q1 is blocked and does not bother the BO pulses are immediately stopped. When the input is
measurement as long as the NTC and the optocoupler are released, the controller performs a clean startup
not activated. As soon as the secondary optocoupler senses sequence including a soft-- start period.
an OVP condition, or the NTC reacts to a high ambient - Slow events input: this input serves as a delayed
temperature, Q1 base is brought to ground and the BO pin shutdown, where an event like a transient overload
goes up, permanently latching off the controller. does not immediately stopped pulses but start a timer.
If the event duration lasts longer than what the timer
Protection Circuitry
imposes, then all pulses are disabled. The voltage on
This resonant controller differs from competitors thanks
the timer capacitor (pin 3) starts to decrease until it
to its protection features. The device can react to various
reaches 1 V. The decrease rate is actually depending
inputs like:
on the resistor the user will put in parallel with the
- Fast events input: like an over-- current condition, a
capacitor, giving another flexibility during design.
need to shut down (sleep mode) or a way to force a
controlled burst mode (skip cycle at low output Figure 47 depicts the architecture of the fault circuitry.
power): as soon as the input level exceeds 1 V typical,

Vdd

Itimer
Ctimer Ctimer

UVLO Reset 1 = fault Average

0 = ok Rtimer Input
Current
ON/OFF +
+ - Slow Fault To Primary
Current Sensing
+ Circuitry
+ -
Vref Fault

VtimerON 1 = ok VCC
VtimerOFF 0 = fault
-
+

+ FB
Vref Fault
FB

1 = ok
0 = fault

Reset Fast Fault Skip

DRIVING SS
LOGIC

A A

B B

Figure 47. This circuit combines a slow and fast input for improved protection features

Slow Input
On this circuit, the slow input goes to a comparator. Itimer turns on, charging the external capacitor Ctimer. If
When this input exceeds 1 V typical, the current source the fault duration is long enough, when Ctimer voltage

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 NCP1396A, NCP1396B

reaches the VtimerON level (4 V typical), then all pulses / Itimer otherwise the voltage on Ctimer will not reach the
are stopped. If the fault input signal is still present, then the turn-- off voltage of 4 V.
controller permanently stays off and the voltage on the In both cases, when the fault is validated, both outputs
timer capacitor does not move (Itimer is on and the voltage Mlower and Mupper are internally pulled down to ground.
is clamped to 5 V). If the fault input signal is removed On Figure 46 example, a voltage proportional to primary
(because pulses are off for instance), Itimer turns off and current, once averaged, gives an image of the input power
the capacitor slowly discharges to ground via a resistor in case Vin is kept constant via a PFC circuit. If the output
installed in parallel with it. As a result, the designer can loading increases above a certain level, the voltage on this
easily determine the time during which the power supply pin will pass the 1 V threshold and start the timer. If the
stays locked by playing on Rtimer. Now, when the timer overload stays there, after a few tens of milli-- seconds,
capacitor voltage reaches 1 V typical (VtimerOFF), the switching pulses will disappear and a protective
comparator instructs the internal logic to issues pulses as on auto-- recovery cycle will take place. Adjusting the resistor
a clean soft-- start sequence (soft-- start is activated). Please R in parallel with the timer capacitor will give the
note that the discharge resistor can not be lower than 4 V flexibility to adjust the fault burst mode.

SMPS Stops

4V

Fault is Gone
SMPS Re--starts

1V

Reset at Re--start

Figure 48. A resistor can easily program the capacitor discharge time

VCC can be designed to lose regulation in light load conditions,

forcing the FB level to increase. When it reaches the
programmed level, it triggers the fast fault input and stops
pulses. Then Vout slowly drops, the loop reacts by
decreasing the feedback level which, in turn, unlocks the
FB pulses, Vout goes up again and so on: we are in skip cycle
mode.

Fast Fault Startup Behavior

When the VCC voltage grows-- up, the internal current
consumption is kept to Istrup, allowing to crank-- up the
converter via a resistor connected to the bulk capacitor.
When VCC reaches the VCC(on) level, output Mlower goes
Figure 49. Skip cycle can be implemented via two high first and then output Mupper. This sequence will
resistors on the FB pin to the Fast fault input always be the same whatever triggers the pulse delivery:
fault, OFF to ON etc Pulsing the output Mlower high first
Fast Input gives an immediate charge of the bootstrap capacitor.
The fast input is not affected by a delayed action. As soon Then, the rest of pulses follow, delivered at the highest
as its voltage exceeds 1 V typical, all pulses are off and switching value, set by the resistor on pin 2. The soft-- start
maintained off as long as the fault is present. When the pin capacitor ensures a smooth frequency decrease to either the
is released, pulses come back and the soft-- start is activated. programmed minimum value (in case of fault) or to a value
Thanks to the low activation level of 1 V, this pin can corresponding to the operating point if the feedback loop
observe the feedback pin via a resistive divided and thus closes first. Figure 50 shows typical signals evolution at
implement skip cycle operation. The resonant converter power on.

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 NCP1396A, NCP1396B

VCC(on)
VCC(min)
Vcc from an auxiliary supply

SS

FB TSS Fault! TSS

0.6 V

A&B
A B A B

Timer
4V

Slopes are similar

1V

Figure 50. At power on, output A is first activated and the frequency slowly decreases via the soft--start capacitor

Figure 50 depicts an auto-- recovery situation, where the say, when VCC falls below 10 V typical. At this time, the
timer has triggered the end of output pulses. In that case, the VCC pin still receives its bias current from the startup
VCC level was given by an auxiliary power supply, hence resistor and heads toward VCC(on) via the VCC capacitor.
its stability during the hiccup. A similar situation can arise When the voltage reaches VCC(on), a standard sequence
if the user selects a more traditional startup method, with takes place, involving a soft-- start. Figure 51 portrays this
an auxiliary winding. In that case, the VCC(min) comparator behavior.
stops the output pulses whenever it is activated, that is to

VCC(on)
VCC(min)
VCC from a
Startup Resistor Fault is
Fault! Released
SS

FB
TSS TSS

0.6 V

A&B
A B A B

Timer
4V

1V

Figure 51. When the VCC is too low, all pulses are stopped until VCC goes back to the startup voltage

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 NCP1396A, NCP1396B

As described in the data-- sheet, two startup levels for the direct a connection from a 12 V source. Thanks to
VCC(on) are available, via two circuit versions. The this NCP1396B, simple ON/OFF operation is therefore
NCP1396 features sufficient hysteresis (3 V typically) to feasible.
allow a classical startup method with a resistor connected
to the bulk capacitor. Then, at the end of the startup The High--voltage Driver
sequence, an auxiliary winding is supposed to take over the The driver features a traditional bootstrap circuitry,
controller supply voltage. To the opposite, for applications requiring an external high-- voltage diode for the capacitor
where the resonant controller is powered from a standby refueling path. Figure 52 shows the internal architecture of
power supply, the startup level is 10 V typically and allows the high-- voltage section.

HV
Vboot
B Pulse Level
Trigger Shifter S cboot
Q Mupper
Q
R
HB

UVLO dboot
VCC aux
VCC
Fault
Mlower
A Delay
+
GND

Figure 52. The Internal High--voltage Section of the NCP1396

The device incorporates an upper UVLO circuitry that As stated in the maximum rating section, the floating
makes sure enough Vgs is available for the upper side portion can go up to 600 VDC and makes the IC perfectly
MOSFET. The B and A outputs are delivered by the suitable for offline applications featuring a 400 V PFC
internal logic, as Figure 47 testifies. A delay is inserted in front-- end stage.
the lower rail to ensure good matching between these
propagating signals.

ORDERING INFORMATION
Device Package Shipping†
NCP1396ADR2G SOIC--16, Less Pin 13 2500 / Tape & Reel
(Pb--Free)
NCP1396BDR2G SOIC--16, Less Pin 13 2500 / Tape & Reel
(Pb--Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.

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 NCP1396A, NCP1396B

PACKAGE DIMENSIONS

SOIC--16 NB, LESS PIN 13

CASE 751AM--01
ISSUE O

D A B NOTES:
16 9 1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL BE
0.13 TOTAL IN EXCESS OF THE b DIMENSION AT
H E MAXIMUM MATERIAL CONDITION.
C 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

MILLIMETERS
0.25 M B M 1 8 L
e b 15X DIM MIN MAX
15X A 1.35 1.75
0.25 M T A S B S A1 0.10 0.25
b 0.35 0.49
C 0.19 0.25
D 9.80 10.00
SEATING A1 h x 45 _
C PLANE
E 3.80 4.00
e 1.27 BSC
A H 5.80 6.20
h 0.25 0.50
L 0.40 1.25
M M 0_ 7_

SOLDERING FOOTPRINT*
6.40
15X 1.12
1 16

15X
0.58

1.27
PITCH

8 9

DIMENSIONS: MILLIMETERS

*For additional information on our Pb--Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

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Email: [email protected] Phone: 81--3--5773--3850 Sales Representative

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25