Microprocessor and Microcontroller

Addressing Mode
Program
A set of instructions written to solvea
problem.

Instruction
Directions which a microprocessor follows
to execute a task or part of a task.

Computer language

High Level Low Level

Machine Language Assembly Language

Binary bits
■ English Alphabets
■ ‘Mnemonics’
■ Assembler Mnemonics
Machine Language
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 Addressing
Microprocessor and Microcontroller

Mode
➢ Program is a set of instructions written to solve a problem. Instructions are the
directions which a microprocessor follows to execute a task or part of a task.
Broadly, computer language can be divided into two parts as high-level language
and low level language. Low level language are machine specific. Low level
language can be further divided into machine language and assembly language.

➢ Machine language is the only language which a machine can understand.

Instructions in this language are written in binary bits as a specific bit pattern. The
computer interprets this bit pattern as an instruction to perform a particular task.
The entire program is a sequence of binary numbers. This is a machine-friendly
language but not user friendly. Debugging is another problem associated with
machine language.

➢ To overcome these problems, programmers develop another way in which

instructions are written in English alphabets. This new language is known as
Assembly language. The instructions in this language are termed mnemonics. As
microprocessor can only understand the machine language so mnemonics are
translated into machine language either manually or by a program known as
assembler.

➢ Efficient software development for the microprocessor requires a complete

familiarity with the instruction set, their format and addressing modes.

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 Microprocessor and Microcontroller

➢ Every instruction of a program has to operate on a data.

Addressing Mode ➢ The different ways in which a source operand is denoted in an
instruction are known as addressing modes.

1. Register Addressing
Group I : Addressing modes for register
2. Immediate Addressing and immediate data

3. Direct Addressing

4. Register Indirect Addressing

5. Based Addressing
Group II : Addressing modes for memory
6. Indexed Addressing
data
7. Based Index Addressing

8. String Addressing

9. Direct I/O port Addressing

Group III : Addressing modes for I/O
10. Indirect I/O port Addressing ports

11. Relative Addressing Group IV : Relative Addressing mode

12. Implied Addressing Group V : Implied Addressing mode

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 Microprocessor and Microcontroller

Addressing Mode

1. Register Addressing The instruction will specify the name of the register which
holds the data to be operated by the instruction.
2. Immediate Addressing
Example:
3. Direct Addressing
MOV CL, DH
4. Register Indirect Addressing

5. Based Addressing The content of 8-bit register DH is moved to another 8-bit

register CL
6. Indexed Addressing
(CL) (DH)
7. Based Index Addressing

8. String Addressing

9. Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing

12. Implied Addressing

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In immediate addressing mode, an 8-bit or 16-bit data is

Addressing Mode specified as part of the instruction

1. Register Addressing Example:

2. Immediate Addressing MOV DL, 08H

3. Direct Addressing The 8-bit data (08H) given in the instruction is moved to DL
4. Register Indirect Addressing
(DL) 08H
5. Based Addressing

6. Indexed Addressing MOV AX, 0A9FH

7. Based Index Addressing The 16-bit data (0A9FH) given in the instruction is moved to
AX register
8. String Addressing
(AX) 0A9FH
9. Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing

12. Implied Addressing

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 Microprocessor and Microcontroller

Addressing Mode –Memory Access

Offset Value (16 bits)

Segment Register (16 bits) 00 00

Adder

Physical Address (20 Bits)

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 Microprocessor and Microcontroller

Addressing Mode –Memory Access

➢ 20 Address lines
➢ 8086 can address up to 220 = 1M bytes of memory
➢ However, the largest register is only 16 bits
➢ Physical Address will have to be calculated
Physical Address : Actual address of a byte in
memory. i.e. the value which goes out onto the address
bus.
➢ Memory Address represented in the form – Seg : Offset
(Eg - 89AB:F012)
➢ Each time the processor wants to access memory, it
takes the contents of a segment register, shifts it one
hexadecimal place to the left (same as multiplying by
1610), then add the required offset to form the 20- bit 16 bytes of contiguous
address memory

89AB : F012 89AB 89AB0 (Paragraph to byte 89AB x 10 = 89AB0)

F012 0F012 (Offset is already in byte unit)
+ -------
98AC2 (The absolute address)

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 Microprocessor and Microcontroller

Addressing Mode –Memory Access

➢ To access memory we use these four registers: BX, SI, DI,
BP
➢ Combining these registers inside [ ] symbols, we can
get different memory locations (Effective Address,
EA)
➢ Supported combinations:

[SI]
[BX + SI] [BX + SI + d8]
[DI]
[BX + DI] [BX + DI + d8]
d16 (variable offset only)
[BP + SI] [BP + SI + d8]
[BX]
[BP + DI] [BP + DI + d8]

[SI + d8] [BX + SI + d16] [SI + d16]

[DI + d8] [BX + DI + d16] [DI + d16]
[BP + d8] [BP + SI + d16] [BP + d16]
[BX + d8] [BP + DI + d16] [BX + d16]

BX SI
+ disp
BP DI

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Addressing Mode Here, the effective address of the memory location at which
the data operand is stored is given in the instruction.

1. Register Addressing The effective address is just a 16-bit number written directly
in the instruction.
2. Immediate Addressing
Example:
3. Direct Addressing
MOV BX, [1354H]
4. Register Indirect Addressing
MOV BL, [0400H]
5. Based Addressing
The square brackets around the 1354 H denotes the contents
6. Indexed Addressing of the memory location. When executed, this instruction will
copy the contents of the memory location into BX register.
7. Based Index Addressing
This addressing mode is called direct because the
8. String Addressing displacement of the operand from the segment base is
specified directly in the instruction.
9. Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing

12. Implied Addressing

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Addressing Mode In Register indirect addressing, name of the register which

holds the effective address (EA) will be specified in the
instruction.
1. Register Addressing
Registers used to hold EA are any of the following registers:
2. Immediate Addressing
BX, BP, DI and SI.
3. Direct Addressing
Content of the DS register is used for base address calculation.
4. Register Indirect Addressing

5. Based Addressing Example:

6. Indexed Addressing MOV CX, [BX]

7. Based Index Addressing Operations: Note : Register/ memory

enclosed in brackets refer to
8. String Addressing EA = (BX) content of register/ memory
BA = (DS) x 1610
9. Direct I/O port Addressing MA = BA + EA
10. Indirect I/O port Addressing (CX)  (MA) or,
11. Relative Addressing
(CL)  (MA)
12. Implied Addressing
(CH)  (MA +1)

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Addressing Mode
In Based Addressing, BX or BP is used to hold the base value
for effective address and a signed 8-bit or unsigned 16-bit
1. Register Addressing displacement will be specified in the instruction.

2. Immediate Addressing In case of 8-bit displacement, it is sign extended to 16-bit

before adding to the base value.
3. Direct Addressing
When BX holds the base value of EA, 20-bit physical address is
4. Register Indirect Addressing
calculated from BX and DS.
5. Based Addressing
When BP holds the base value of EA, BP and SS is used.
6. Indexed Addressing
Example:
7. Based Index Addressing
MOV AX, [BX + 08H]
8. String Addressing
Operations:
9. Direct I/O port Addressing
0008H  08H (Sign extended)
10. Indirect I/O port Addressing
EA = (BX) + 0008H
11. Relative Addressing BA = (DS) x 1610
MA = BA + EA
12. Implied Addressing
(AX)  (MA) or,
(AL)  (MA)
(AH)  (MA + 1)
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 Microprocessor and Microcontroller

Addressing Mode
SI or DI register is used to hold an index value for memory
1. Register Addressing data and a signed 8-bit or unsigned 16-bit displacement will
be specified in the instruction.
2. Immediate Addressing
Displacement is added to the index value in SI or DI register to
3. Direct Addressing obtain the EA.

4. Register Indirect Addressing In case of 8-bit displacement, it is sign extended to 16-bit

before adding to the base value.
5. Based Addressing

6. Indexed Addressing
Example:
7. Based Index Addressing
MOV CX, [SI + 0A2H]
8. String Addressing
Operations:
9. Direct I/O port Addressing
FFA2 H  A2 H (Sign extended)
10. Indirect I/O port Addressing
EA = (SI) + FFA2H BA = (DS) x 1610
11. Relative Addressing MA = BA + EA

12. Implied Addressing

(CX)  (MA) or,

(CL)  (MA)
(CH)  (MA + 1)

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 Microprocessor and Microcontroller

Addressing Mode
In Based Index Addressing, the effective address is computed
1. Register Addressing from the sum of a base register (BX or BP), an index register
(SI or DI) and a displacement.
2. Immediate Addressing
Example:
3. Direct Addressing
MOV DX, [BX + SI + 0AH]
4. Register Indirect Addressing

5. Based Addressing
Operations:

6. Indexed Addressing 000AH  0AH (Sign extended)

7. Based Index Addressing EA = (BX) + (SI) + 000AH BA = (DS) x 1610

MA = BA + EA
8. String Addressing

9. Direct I/O port Addressing (DX)  (MA) or,

10. Indirect I/O port Addressing (DL)  (MA)
(DH)  (MA + 1)
11. Relative Addressing

12. Implied Addressing

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 Microprocessor and Microcontroller

Addressing Mode
Employed in string operations to operate on string data.
1. Register Addressing
The effective address (EA) of source data is stored in SI
2. Immediate Addressing register and the EA of destination is stored in DI register.

3. Direct Addressing Segment register for calculating base address of

source data is DS and that of the destination data is ES
4. Register Indirect Addressing

5. Based Addressing
Example: MOVS BYTE
6. Indexed Addressing
Operations:
7. Based Index Addressing
Calculation of source memory location:
8. String Addressing EA = (SI) BA = (DS) x 1610 MA = BA + EA

9. Direct I/O port Addressing Calculation of destination memory location:

EAE = (DI) BAE = (ES) x 1610 MAE = BAE + EAE
10. Indirect I/O port Addressing

11. Relative Addressing (MAE) (MA)

12. Implied Addressing
If DF = 1, then (SI) (SI) –1 and (DI) = (DI) - 1
Note : Effective address of the If DF = 0, then (SI) (SI) +1 and (DI) = (DI) + 1
Extra segment register

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 Microprocessor and Microcontroller

Addressing Mode
These addressing modes are used to access data from
1. Register Addressing standard I/O mapped devices or ports.

2. Immediate Addressing In direct port addressing mode, an 8-bit port address is

directly specified in the instruction.
3. Direct Addressing
Example: IN AL, [09H]
4. Register Indirect Addressing
Operations: PORTaddr = 09H
5. Based Addressing
(AL)  (PORT)
6. Indexed Addressing
Content of port with address 09H is moved to AL register
7. Based Index Addressing
In indirect port addressing mode, the instruction will specify
8. String Addressing the name of the register which holds the port address. In
8086, the 16-bit port address is stored in the DX register.
9. Direct I/O port Addressing
Example: OUT [DX], AX
10. Indirect I/O port Addressing
Operations: PORTaddr = (DX)
11. Relative Addressing (PORT)  (AX)

12. Implied Addressing Content of AX is moved to port whose address is specified by DX

register.

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Addressing Mode
1. Register Addressing In this addressing mode, the effective address of a program
instruction is specified relative to Instruction Pointer (IP) by
2. Immediate Addressing an 8-bit signed displacement.

3. Direct Addressing Example: JZ 0AH

4. Register Indirect Addressing Operations:

5. Based Addressing 000AH  0AH (sign extend)

6. Indexed Addressing If ZF = 1, then
7. Based Index Addressing
EA = (IP) + 000AH
8. String Addressing BA = (CS) x 1610
MA = BA + EA
9. Direct I/O port Addressing
If ZF = 1, then the program control jumps to new
10. Indirect I/O port Addressing address calculated above.

11. Relative Addressing If ZF = 0, then next instruction of the program is

executed.
12. Implied Addressing

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 Microprocessor and Microcontroller

Addressing Mode
1. Register Addressing

2. Immediate Addressing

3. Direct Addressing
Instructions using this mode have no operands. The
4. Register Indirect Addressing instruction itself will specify the data to be operated by the
instruction.
5. Based Addressing
Example: CLC
6. Indexed Addressing
This clears the carry flag to zero.

7. Based Index Addressing

8. String Addressing

9. Direct I/O port Addressing

12. Implied Addressing
10. Indirect I/O port Addressing

11. Relative Addressing

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Instruction Set

8086 supports 6 types of instructions.

1. Data Transfer Instructions

2. Arithmetic Instructions

3. Logical Instructions

4. String manipulation Instructions

5. Process Control Instructions

6. Control Transfer Instructions

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Instruction Set - Data Transfer Instructions

Instructions that are used to transfer data/ address in to registers,

memory locations and I/O ports.

➢ Generally involve two operands: Source operand and Destination

operand of the same size.

➢ Source : Register or a memory location or an immediate data

➢ Destination : Register or a memory location.

➢ The size should be a either a byte or a word.

➢ A 8-bit data can only be moved to 8-bit register/ memory and a 16-
bit data can be moved to 16-bit register/ memory.

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Instruction Set - Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

MOV reg2/ mem, reg1/ mem

MOV reg2, reg1 (reg2)  (reg1)

MOV mem, reg1 (mem)  (reg1)
MOV reg2, mem (reg2)  (mem)

MOV reg/ mem, data

MOV reg, data (reg)  data

MOV mem, data (mem)  data

XCHG reg2/ mem, reg1

XCHG reg2, reg1 (reg2)  (reg1)

XCHG mem, reg1 (mem)  (reg1)

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Instruction Set - Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

PUSH reg16/ mem

PUSH reg16 (SP)  (SP) – 2

MA S = (SS) x 1610 + SP (MA
S ; MA S + 1)  (reg16)

PUSH mem (SP)  (SP) – 2

MA S = (SS) x 1610 + SP
(MA S ; MA S + 1)  (mem)

POP reg16/ mem

POP reg16 MA S = (SS) x 1610 +SP

(reg16)  (MA S ; MA S + 1)
(SP)  (SP) + 2

POP mem MA S = (SS) x 1610 +SP

(mem)  (MA S ; MA S + 1)
(SP)  (SP) + 2

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Instruction Set - Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

IN A, [DX] OUT [DX], A

IN AL, [DX] PORTaddr = (DX) OUT [DX], AL PORTaddr = (DX)

(AL)  (PORT) (PORT)  (AL)

IN AX, [DX] PORTaddr = (DX) OUT [DX], AX PORTaddr = (DX)

(AX)  (PORT) (PORT)  (AX)

IN A, addr8 OUT addr8, A

IN AL, addr8 (AL)  (addr8) OUT addr8, AL (addr8)  (AL)

IN AX, addr8 OUT addr8, AX
(AX)  (addr8) (addr8)  (AX)

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Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

ADD reg2/ mem, reg1/mem

ADC reg2, reg1 (reg2)  (reg1) + (reg2)

ADC reg2, mem (reg2)  (reg2) + (mem)
ADC mem, reg1 (mem)  (mem)+(reg1)

ADD reg/mem, data

ADD reg, data (reg)  (reg)+ data

ADD mem, data (mem)  (mem)+data

ADD A, data

ADD AL, data8 (AL)  (AL) + data8

ADD AX, data16 (AX)  (AX) +data16

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Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

ADC reg2/ mem, reg1/mem

ADC reg2, reg1 (reg2)  (reg1) + (reg2)+CF

ADC reg2, mem (reg2)  (reg2) + (mem)+CF
ADC mem, reg1 (mem)  (mem)+(reg1)+CF

ADC reg/mem, data

ADC reg, data (reg)  (reg)+ data+CF

ADC mem, data (mem)  (mem)+data+CF

ADDC A, data

ADD AL, data8 (AL)  (AL) + data8+CF

ADD AX, data16 (AX)  (AX)+data16+CF

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Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

SUB reg2/ mem, reg1/mem

SUB reg2, reg1 (reg2)  (reg1) - (reg2)

SUB reg2, mem (reg2)  (reg2) - (mem)
SUB mem, reg1 (mem)  (mem) - (reg1)

SUB reg/mem, data

SUB reg, data (reg)  (reg) - data

SUB mem, data (mem)  (mem) - data

SUB A, data

SUB AL, data8 (AL)  (AL) - data8

SUB AX, data16 (AX)  (AX) - data16

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 Microprocessor and Microcontroller

Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

SBB reg2/ mem, reg1/mem

SBB reg2, reg1 (reg2)  (reg1) - (reg2) - CF

SBB reg2, mem (reg2)  (reg2) - (mem)-CF
SBB mem, reg1 (mem)  (mem) - (reg1) –CF

SBB reg/mem, data

SBB reg, data (reg)  (reg) – data - CF

SBB mem, data (mem)  (mem) - data - CF

SBB A, data

SBB AL, data8 (AL)  (AL) - data8 - CF

SBB AX, data16 (AX)  (AX) - data16 - CF

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Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

INC reg/ mem

INC reg8 (reg8)  (reg8) + 1

INC reg16 (reg16)  (reg16) + 1

INC mem (mem)  (mem) + 1

DEC reg/ mem

DEC reg8 (reg8)  (reg8) - 1

DEC reg16 (reg16)  (reg16) - 1

DEC mem (mem)  (mem) - 1

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 Microprocessor and Microcontroller

Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

MUL reg/ mem

MUL reg For byte : (AX)  (AL) x (reg8)

For word : (DX)(AX)  (AX) x (reg16)

MUL mem For byte : (AX)  (AL) x (mem8)

For word : (DX)(AX)  (AX) x (mem16)

IMUL reg/ mem

IMUL reg For byte : (AX)  (AL) x (reg8)

For word : (DX)(AX)  (AX) x (reg16)

IMUL mem For byte : (AX)  (AX) x (mem8)

For word : (DX)(AX)  (AX) x (mem16)

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 Microprocessor and Microcontroller

Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

DIV reg/ mem

DIV reg For 16-bit :- 8-bit :

(AL)  (AX) :- (reg8) Quotient (AH)
 (AX) MOD(reg8) Remainder

For 32-bit :- 16-bit :

(AX)  (DX)(AX) :- (reg16) Quotient (DX)
 (DX)(AX) MOD(reg16) Remainder

DIV mem For 16-bit :- 8-bit :

(AL)  (AX) :- (mem8) Quotient (AH)
 (AX) MOD(mem8) Remainder

For 32-bit :- 16-bit :

(AX)  (DX)(AX) :- (mem16) Quotient (DX)
 (DX)(AX) MOD(mem16) Remainder

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 Microprocessor and Microcontroller

Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

IDIV reg/ mem

IDIV reg For 16-bit :- 8-bit :

(AL)  (AX) :- (reg8) Quotient (AH)
 (AX) MOD(reg8) Remainder

For 32-bit :- 16-bit :

(AX)  (DX)(AX) :- (reg16) Quotient (DX)
 (DX)(AX) MOD(reg16) Remainder

IDIV mem For 16-bit :- 8-bit :

(AL)  (AX) :- (mem8) Quotient (AH)
 (AX) MOD(mem8) Remainder

For 32-bit :- 16-bit :

(AX)  (DX)(AX) :- (mem16) Quotient (DX)
 (DX)(AX) MOD(mem16) Remainder

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Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

CMP reg2/mem, reg1/ mem

CMP reg2, reg1 Modify flags  (reg2) – (reg1)

If (reg2) > (reg1) then CF=0, ZF=0, SF=0

If (reg2) < (reg1) then CF=1, ZF=0, SF=1
If (reg2) = (reg1) then CF=0, ZF=1, SF=0

CMP reg2, mem Modify flags  (reg2) – (mem)

If (reg2) > (mem) then CF=0, ZF=0, SF=0

If (reg2) < (mem) then CF=1, ZF=0, SF=1
If (reg2) = (mem) then CF=0, ZF=1, SF=0

CMP mem, reg1 Modify flags  (mem) – (reg1)

If (mem) > (reg1) then CF=0, ZF=0, SF=0

If (mem) < (reg1) then CF=1, ZF=0, SF=1
If (mem) = (reg1) then CF=0, ZF=1, SF=0

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Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

CMP reg/mem, data

CMP reg, data Modify flags  (reg) – (data)

If (reg) > data then CF=0, ZF=0, SF=0

If (reg) < data then CF=1, ZF=0, SF=1
If (reg) = data then CF=0, ZF=1, SF=0

CMP mem, data Modify flags  (mem) – (mem)

If (mem) > data then CF=0, ZF=0, SF=0

If (mem) < data then CF=1, ZF=0, SF=1
If (mem) = data then CF=0, ZF=1, SF=0

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 Microprocessor and Microcontroller

Instruction Set - Arithmetic Instructions

Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

CMP A, data

CMP AL, data8 Modify flags  (AL) –data8

If (AL) > data8 then CF=0, ZF=0, SF=0

If (AL) < data8 then CF=1, ZF=0, SF=1
If (AL) = data8 then CF=0, ZF=1, SF=0

CMP AX, data16 Modify flags  (AX) – data16

If (AX) > data16 then CF=0, ZF=0, SF=0

If (mem) < data16 then CF=1, ZF=0, SF=1
If (mem) = data16 then CF=0, ZF=1, SF=0

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Microprocessor and Microcontroller

Instruction Set - Logical Instructions

Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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Microprocessor and Microcontroller

Instruction Set - Logical Instructions

Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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Microprocessor and Microcontroller

Instruction Set - Logical Instructions

Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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Microprocessor and Microcontroller

Instruction Set - Logical Instructions

Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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 Microprocessor and Microcontroller

Instruction Set - Logical Instructions

Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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Microprocessor and Microcontroller

Instruction Set - Logical Instructions

Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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Microprocessor and Microcontroller

Instruction Set - Logical Instructions

Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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Microprocessor and Microcontroller

Instruction Set - Logical Instructions

Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …

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 Microprocessor and Microcontroller

Instruction Set – String Manipulation Instructions

❑ String : Sequence of bytes or words

❑ 8086 instruction set includes instruction for string movement, comparison, scan, load and store.

❑ REP instruction prefix : used to repeat execution of string instructions

❑ String instructions end with S or SB or SW.

S represents string, SB string byte and SW string word.

❑ Offset or effective address of the source operand is stored in SI register and that of the
destination operand is stored in DI register.

❑ Depending on the status of DF, SI and DI registers are automatically updated.

❑ DF = 0  SI and DI are incremented by 1 for byte and 2 for word.

❑ DF = 1  SI and DI are decremented by 1 for byte and 2 for word.

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Instruction Set – String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS

REP

REPZ/ REPE While CX  0 and ZF = 1, repeat execution of stringinstruction

and
(Repeat CMPS or SCAS until ZF = 0) (CX)  (CX) – 1

REPNZ/ REPNE
While CX  0 and ZF = 0, repeat execution of stringinstruction
(Repeat CMPS or SCAS until ZF = 1) and
(CX)  (CX) - 1

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 Microprocessor and Microcontroller

Instruction Set – String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS

MOVS

MOVSB MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)

(MAE)  (MA)

If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1

If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) -1

MOVSW MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)

(MAE ; MAE + 1)  (MA; MA + 1)

If DF = 0, then (DI)  (DI) + 2; (SI)  (SI) + 2

If DF = 1, then (DI)  (DI) - 2; (SI)  (SI) - 2

_
 Microprocessor and Microcontroller

Instruction Set – String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS

Compare two string byte or string word

CMPS

CMPSB MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)

Modify flags  (MA) - (MAE)

If (MA) > (MAE), then CF = 0; ZF = 0; SF = 0

If (MA) < (MAE), then CF = 1; ZF = 0; SF = 1
CMPSW If (MA) = (MAE), then CF = 0; ZF = 1; SF =0

For byte operation

If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1
If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) - 1

For word operation

If DF = 0, then (DI)  (DI) + 2; (SI)  (SI) + 2
If DF = 1, then (DI)  (DI) - 2; (SI)  (SI) - 2

_
 Microprocessor and Microcontroller

Instruction Set –String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
Scan (compare) a string byte or word with accumulator
SCAS

SCASB MAE = (ES) x 1610 + (DI)

Modify flags  (AL) - (MAE)

If (AL) > (MAE), then CF = 0; ZF = 0; SF = 0

If (AL) < (MAE), then CF = 1; ZF = 0; SF = 1
If (AL) = (MAE), then CF = 0; ZF = 1; SF =0

If DF = 0, then (DI)  (DI) + 1

If DF = 1, then (DI)  (DI) –1

SCASW MAE = (ES) x 1610 + (DI)

Modify flags  (AL) - (MAE)

If (AX) > (MAE ; MAE + 1), then CF = 0; ZF = 0; SF = 0

If (AX) < (MAE ; MAE + 1), then CF = 1; ZF = 0; SF = 1
If (AX) = (MAE ; MAE + 1), then CF = 0; ZF = 1; SF = 0

If DF = 0, then (DI)  (DI) + 2

If DF = 1, then (DI)  (DI) –2
_
 Microprocessor and Microcontroller

Instruction Set – String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS

Load string byte in to AL or string word in to AX

LODS

LODSB MA = (DS) x 1610 + (SI)

(AL)  (MA)

If DF = 0, then (SI)  (SI) + 1

If DF = 1, then (SI)  (SI) –1

LODSW MA = (DS) x 1610 + (SI)

(AX)  (MA ; MA + 1)

If DF = 0, then (SI)  (SI) + 2

If DF = 1, then (SI)  (SI) –2

_
 Microprocessor and Microcontroller

Instruction Set –String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS

Store byte from AL or word from AX in to string

STOS

STOSB MAE = (ES) x 1610 + (DI)

(MAE)  (AL)

If DF = 0, then (DI)  (DI) + 1

If DF = 1, then (DI)  (DI) –1

STOSW MAE = (ES) x 1610 + (DI)

(MAE ; MAE + 1 )  (AX)

If DF = 0, then (DI)  (DI) + 2

If DF = 1, then (DI)  (DI) –2

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 Microprocessor and Microcontroller

Instruction Set – Processor Control Instructions

Mnemonics Explanation
STC Set CF  1

CLC Clear CF  0

CMC Complement carry CF  CF/

STD Set direction flag DF  1

CLD Clear direction flag DF  0

STI Set interrupt enable flag IF  1

CLI Clear interrupt enable flag IF  0

NOP No operation

HLT Halt after interrupt is set

WAIT Wait for TEST pin active

ESC opcode mem/ reg Used to pass instruction to a coprocessor which shares the
address and data bus with the 8086

LOCK Lock bus during next instruction

_
 Microprocessor and Microcontroller

Instruction Set – Control Transfer Instructions

➢ Transfer the control to a specific destination or target instruction

➢ Do not affect flags
✓ 8086 Unconditional transfers

Mnemonics Explanation
CALL reg/ mem/ disp16 Call subroutine

RET Return from subroutine

JMP reg/ mem/ disp8/ disp16 Unconditional jump

➢ 8086 signed conditional ➢ 8086 unsigned conditional branch

branch instructions instructions

➢ Checks flags

➢ If conditions are true, the program control is transferred to the new

memory location in the same segment by modifying the content of IP

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 Microprocessor and Microcontroller

Instruction Set – Control Transfer Instructions

➢ 8086 signed conditional ➢ 8086 unsigned conditional branch

branch instructions instructions

Name Alternate name Name Alternate name

JE disp8 JZ disp8 JE disp8 JZ disp8
Jump if Jump if result is 0 Jump if Jump if result is 0
equal equal
JNE disp8 JNZ disp8 JNE disp8 JNZ disp8
Jump if not equal Jump if not zero Jump if not equal Jump if not zero
JG disp8 JNLE disp8 JA disp8 JNBE disp8
Jump if greater Jump if not less or equal Jump if above Jump if not below or
equal
JGE disp8 JNL disp8
Jump if greater than Jump if not less JAE disp8 JNB disp8
or equal Jump if above or equal Jump if not below
JL disp8 JNGE disp8 JB disp8 JNAE disp8
Jump if less than Jump if not greater than Jump if Jump if not above or
or equal below equal
JLE disp8 JNG disp8
Jump if less than or equal Jump if not greater JBE disp8 JNA disp8
Jump if below or equal Jump if not above

_
 Microprocessor and Microcontroller

Instruction Set – Control Transfer Instructions

➢ 8086 conditional branch instructions affecting individual flags

Mnemonics Explanation

JC disp8 Jump if CF = 1

JNC disp8 Jump if CF = 0

JP disp8 Jump if PF = 1

JNP disp8 Jump if PF = 0

JO disp8 Jump if OF = 1

JNO disp8 Jump if OF = 0

JS disp8 Jump if SF = 1

JNS disp8 Jump if SF = 0

JZ disp8 Jump if result is zero, i.e, Z = 1

JNZ disp8 Jump if result is not zero, i.e, Z = 1

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Assembly Language
Programming

_
Machine/Assembly Language

Machine Language:

Set of fundamental instructions the machine can execute

Expressed as a pattern of 1’s and 0’s

Assembly Language:

Alphanumeric equivalent of machine language

Mnemonics more human-oriented than 1’s and 0’s

Assembler:

Computer program that transliterates (one-to-one mapping) assembly to

machine language

Computer’s native language is machine/assembly language

_
Machine Language vs Assembly Language
Programming

➢ Machine language is the only language which a machine can understand.

Instructions in this language are written in binary bits as a specific bit pattern.
The computer interprets this bit pattern as an instruction to perform a
particular task. The entire program is a sequence of binary numbers. This is a
machine-friendly language but not user friendly. Debugging is another problem
associated with machine language.
➢ To overcome these problems, programmers develop another way in which
instructions are written in English alphabets. This new language is known as
Assembly language. The instructions in this language are termed mnemonics.
As microprocessor can only understand the machine language so mnemonics
are translated into machine language either manually or by a program known
as assembler.

_
Why Assembly Language Programming

➢ Faster and shorter programs.

✓ Compilers do not always generate optimum code.

➢ Instruction set knowledge is important for machine designers.

➢ Compiler writers must be familiar with details of machine language.

➢ Small controllers embedded in many products

✓ Have specialized functions,

✓ Rely so heavily on input/output functionality,

✓ HLLs inappropriate for product development.

_
Programmer’s Model

➢ Instruction Set Architecture

➢ Instruction set: collection of all machine operations.
➢ Programmer sees set of instructions, and machine
➢ resources manipulated by them.
➢ ISA includes
✓ Instruction set,
✓ Memory, and
✓ Programmer-accessible registers.
➢ Temporary or scratch-pad memory used to implement some functions is not
part of ISA
✓ Not programmer accessible.

_
Organization of 8086 Processor

_
CPU Registers

_
CPU Registers

_
Fetch-Execute Process

➢ Program Counter (PC) or Instruction Pointer (IP)

✓ Holds address of next instruction to fetch

➢ Instruction Register (IR)

✓ Stores the instruction fetched from memory

➢ Fetch-Execute process

✓ Read an instruction from memory addressed by PC

✓ Increment program counter

✓ Execute fetched instruction in IR

✓ Repeat process

_
Fetch-Execute Process

Main Memory

0
1

PC

4000 0010101100111111 4000

65535
IR

0010101100111111

_
Assembly Language Syntax

➢ Program consists of statement per line.

➢ Each statement is an instruction or assembler directive

➢ Statement syntax

✓ Name operation operand(s) comment

➢ Name field

✓ Used for instruction labels, procedure names, and variable names.

✓ Assembler translates names into memory addresses

✓ Names are 1-31 characters including letters, numbers and special characters ? . @ _ $ %

✓ Names may not begin with a digit

✓ If a period is used, it must be first character

✓ Case insensitive

_
Assembly Language Syntax

Examples of legal names

COUNTER1
@character
SUM_OF_DIGITS
$1000
Done?
.TEST
Examples of illegal names
TWO WORDS
2abc
A45.28
You&Me

_
Assembly Language Syntax

➢ Operation field

✓ instruction

✓ Symbolic operation code (opcode)

✓ Symbolic opcodes translated into machine language opcode

✓ Describes operation’s function; e.g. MOV, ADD, SUB, INC. • Assembler directive

✓ Contains pseudo-operation code (pseudo-op)

✓ Not translated into machine code

✓ Tell the assembler to do something.

➢ Operand field

✓ Specifies data to be acted on

✓ Zero, one, or two operands

NOP

INC AX

ADD AX, 2

_
Assembly Language Syntax

➢ Comment field
✓ A semicolon marks the beginning of a comment
✓ A semicolon in beginning of a line makes it all a comment line
✓ Good programming practice dictates comment on every line
➢ Examples
✓ MOV CX, 0 ; move 0 to CX
✓ Do not say something obvious
✓ MOV CX, 0 ; CX counts terms, initially 0
✓ Put instruction in context of program
✓ ; initialize registers

_
Data Representation

➢ Numbers
✓ 1011 decimal

✓ 11011B binary

✓ 64223 decimal

✓ -21843D decimal

✓ 1,234 illegal, contains a nondigit character

✓ 1B4DH hexadecimal number

✓ 1B4D illegal hex number, does not end with “H”

✓ FFFFH illegal hex numbe, does not begin with with digit

✓ 0FFFFH hexadecimal number

➢ Signed numbers represented using 2’s complement.

_
Data Representation

➢ Characters
✓ must be enclosed in single or double quotes

✓ e.g. “Hello”, ‘Hello’, “A”, ‘B’

✓ encoded by ASCII code

➢ A’ has ASCII code 41H

➢ ‘a’ has ASCII code 61H

➢ ‘0’ has ASCII code 30H

➢ Line feed has ASCII code 0AH

➢ Carriage Return has ASCII code 0DH

➢ Back Space has ASCII code 08H

➢ Horizontal tab has ASCII code 09H

_
Data Representation

➢ The value of the content of registers or memory is dependent on the

programmer.
Let AL=FFH
✓ represents the unsigned number 255
✓ represents the signed number -1 (in 2’s complement)
Let AH=30H
✓ represents the decimal number 48
✓ represents the character ‘0’
Let BL=80H
✓ represents the unsigned number +128
✓ represents the signed number -128

_
Variable Declaration

➢ Each variable has a type and assigned a memory address.

➢ Data-defining pseudo-ops

✓ DB define byte

✓ DW define word

✓ DD define double word (two consecutive words)

✓ DQ define quad word (four consecutive words)

✓ DT define ten bytes (five consecutive words)

➢ Each pseudo-op can be used to define one or more data items of given
type.

_
Byte Variables

➢ Assembler directive format defining a byte variable

✓ name DB initial value

✓ a question mark (“?”) place in initial value leaves variable uninitialized

➢ I DB 4 define variable I with initial value 4

➢ J DB ? Define variable J with uninitialized value

➢ Name DB “Course” allocate 6 bytes for Name

➢ K DB 5, 3, -1 allocates 3 bytes

_
Word Variables

➢ Assembler directive format defining a word variable

name DW initial value

✓ I DW 4

✓ J DW -2

✓ K DW 1ABCH

✓ L DW “01”

_
Double Word Variables

➢ Assembler directive format defining a word variable

✓ name DD initial value

✓ I DD 1FE2AB20H

✓ J DD -4

_
Named Constants

➢ EQU pseudo-op used to assign a name to constant.

➢ Makes assembly language easier to understand.

➢ No memory allocated for EQU names.

➢ LF EQU 0AH

✓ MOV DL, 0AH

✓ MOV DL, LF

➢ PROMPT EQU “Type your name”

✓ MSG DB “Type your name”

✓ MDG DB PROMPT

_
DUP Operator

➢ Used to define arrays whose elements share common initial value.

➢ It has the form: repeat_count DUP (value)

➢ Numbers DB 100 DUP(0)

✓ Allocates an array of 100 bytes, each initialized to 0.

➢ Names DW 200 DUP(?)

✓ Allocates an array of 200 uninitialized words.

➢ Two equivalent definitions

✓ Line DB 5, 4, 3 DUP(2, 3 DUP(0), 1)

✓ Line DB 5, 4, 2, 0, 0, 0, 1, 2, 0, 0, 0, 1, 2, 0, 0, 0, 1

_
General Rules

➢ Both operands have to be of the same size.

✓ MOV AX, BL illegal

✓ MOV AL, BL legal

✓ MOV AH, BL legal

➢ Both operands cannot be memory operands simultaneously.

✓ MOV i, j illegal

✓ MOV AL, i legal

➢ First operand cannot be an immediate value.

✓ ADD 2, AX illegal

✓ ADD AX, 2 legal

_
Memory Segmentation

➢ A memory segment is a block of 216 (64K) bytes.

➢ Each segment is identified by a segment number

✓ Segment number is 16 bits (0000 - FFFF).

➢ A memory location is specified by an offset within a segment.

➢ Logical address: segment:offset

✓ A4FB:4872h means offset 4872h within segment A4FBh.

➢ Physical address: segment * 10H + offset

✓ A4FB*10h + 4872 = A4FB0 + 4872 = A9822h (20-bit address)

➢ Physical address maps to several logical addresses

✓ physical address 1256Ah=1256:000Ah=1240:016Ah

_
Memory Segmentation

➢ Data Segment
✓ contains variable definitions

✓ declared by .DATA

➢ Stack segment
✓ used to store the stack

✓ declared by .STACK size

✓ default stack size is 1Kbyte.

➢ Code segment
✓ contains program’s instructions

✓ declared by .CODE

_
Memory Models

➢ SMALL
✓ code in one segment & data in one segment
➢ MEDIUM
✓ code in more than one segment & data in one segment
➢ COMPACT
✓ code in one segment & data in more than one segment
➢ LARGE
✓ code in more than one segment & data in more than one segment & no array larger than
64K bytes
➢ HUGE
✓ code in more than one segment & data in more than one segment & arrays may be larger
than 64K bytes

_
 Program Structure: An Example
TITLE PRGM1
.MODEL SMALL
.STACK 100H
.DATA
A DW 2
B DW 5
SUM DW ?
.CODE
MAIN PROC
; initialize DS
MOV AX, @DATA
MOV DS, AX

_
Program Structure: An Example
;add the numbers

MOV AX, A

ADD AX, B

MOV SUM, AX

; exit to DOS

MOV AX, 4C00H

INT 21H

MAIN ENDP

END MAIN

_
Assembly Language Programming: Addition
MOV CX, 0000H Initialize counter CX

MOV AX,[1200] Get the first data in AX reg

MOV BX, [1202] Get the second data in BX reg

ADD AX,BX Add the contents of both the regs AX & BX

JNC L1 Check for carry

INC CX If carry exists, increment the CX

L1 : MOV [1206],CX Store the carry

MOV [1204], AX Store the sum

HLT Stop the program

_
Assembly Language Programming: Multiplication
MOV AX,[1200] Get the first data

MOV BX, [1202] Get the second data

MUL BX Multiply both

MOV [1206],AX Store the lower order product

MOV AX,DX Copy the higher order product to AX

MOV [1208],AX Store the higher order product

HLT Stop the program

_
Assembly Language Programming: COPYING A
STRING
MOV SI,1200H Initialize destination address

MOV DI,1300H Initialize starting address

MOV CX,0006H Initialize array size

CLD Clear direction flag

REP MOVSB Copy the contents of source into destination until count
reaches zero

HLT Stop

_
Assembly Language Programming: Ascending Order
MOV SI,1200H Initialize memory location for array size
MOV CL,[SI] Number of comparisons in CL
L4 : MOV SI,1200H Initialize memory location for array size
MOV DL,[SI] Get the count in DL
INC SI Go to next memory location
MOV AL,[SI] Get the first data in AL
L3 : INC SI Go to next memory location
MOV BL,[SI] Get the second data in BL
CMP AL,BL Compare two data’s
JNB L1 If AL < BL go to L1
DEC SI Else, Decrement the memory location
MOV [SI],AL Store the smallest data
MOV AL,BL Get the next data AL
JMP L2 Jump to L2
L1 : DEC SI Decrement the memory location
MOV [SI],BL Store the greatest data in memory location
L2 : INC SI Go to next memory location
DEC DL Decrement the count
JNZ L3 Jump to L3, if the count is not reached zero
MOV [SI],AL Store data in memory location
DEC CL Decrement the count
JNZ L4 Jump to L4, if the count is not reached zero
HLT Stop

_
8086 Assembly Language Program LOGICAL OR

CODE SEGMENT
ASSUME CS: CODE
START: MOV AL, 85H
MOV BL, 99H
OR AL, BL
INT 3H
CODE ENDS
END START

_
 8086 Assembly Language program
Adding two multi byte numbers and store the result as the third number

DATA SEGMENT START: MOV AX, DATA

BYTES EQU 08H MOV DS, AX
NUM1 DB 05H, 5AH, 6CH, 55H, 66H, 77H, 34H, 12H MOV CX, BYTES
NUM2 DB 04H, 56H, 04H, 57H, 32H, 12H, 19H, 13H LEA SI, NUM1
NUM3 DB 0AH DUP (00) LEA DI, NUM2
DATA ENDS LEA BX, NUM3
CODE SEGMENT MOV AX, 00
ASSUME CS: CODE, DS: DATA NEXT: MOV AL, [SI]
ADC AL, [DI]
MOV [BX], AL
INC SI
INC DI
INC BX
DEC CX
JNZ NEXT
INT 3H
CODE ENDS
END START

_
8086 Assembly Language program : Moving a Block using strings

DATA SEGMENT
SRC DB ‘MICROPROCESSOR’
DB 10 DUP (?)
DST DB 20 DUP (0)
DATA ENDS
CODE SEGMENT
ASSUME CS: CODE, DS: DATA, ES: DATA
START: MOV AX, DATA
MOV DS, AX
MOV ES, AX
LEA SI, SRC
LEA DI, DST
MOV CX, 20
CLD
REP MOVSB
INT 3H
CODE ENDS
END START
_