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Binary Phase Shift Keying

Binary Phase Shift Keying

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110 views10 pages

Binary Phase Shift Keying

Binary Phase Shift Keying

Uploaded by

Ms.DEVI P
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Phase Shift Keying (PSK):

• PSK is an M-ary digital modulation scheme similar to phase modulation (PM) except with
PSK the input is a binary digital signal and there are a limited number of output phase
possible.
• The input binary information is encoded into groups of bits before modulating the
carrier.
• The number of bits in a group ranges from 1 to 12 (or) more.
The PSK signals are transmitted in 2 phase shifts.
(i) BPSK (binary) : 0 (or) 1.
(ii) QPSK (quadrature) : 00,01,10,11.
Binary Phase Shift Keying (BPSK):
• The simplest form of PSK is binary phase shift keying (BPSK), where N=1 & M=2 [2N=M].
• Therefore, with BPSK, two phases (21=2) are possible for the carrier
(i) one phase represents a logic 1 and
(ii) other phase represents a logic 0.
• As the input digital signal changes state (i.e., from a 1 to 0 (or) from o to 1) the phase of
the output carrier shifts between two angles that are separated by 180o.
• Other names for BPSK are Phase Reversal Keying (PRK) and biphase modulation.
• BPSK is a form of square wave modulation of a continuous wave (CW) signal.
BPSK Transmitter:

Fig: BPSK Transmitter


• The balanced modulator acts as a phase reversing switch.
• The BPSK signal can be generated by applying a carrier signal [sin(ωct)] to the balanced
modulator.
• The input binary data is applied to an level converter. The level converter converts the
binary data sequence into a bipolar signal. This baseband signal is applied to the
balance modulator.
• The output of the balance modulator is an BPSK signal.
Fig: (a) Balanced ring modulator
• The above figure shows the schematic diagram of a balanced ring modulator.
• It has 2 inputs
(i) a carrier (i.e) inphase with the reference oscillator
(ii) the binary digital data.
• For the proper operation of the balanced modulator, the digital input voltage must be
much (>) greater than the peak carrier voltage.
• The digital input controls the on/off state of diodes D1 to D4.
Fig: (b) Logic 1 input
• If the binary input is a logic 1 (positive voltage), diodes D1 & D2 are forward biased
and ON, while diodes D3 & D4 are reverse biased and OFF.
• The carrier voltage is developed across transformer T2 inphase with the carrier voltage
across T1.
• The output signal is inphase with the reference oscillator.
Fig: (c) Logic 0 input

• If the binary input is a logic 0 (negative voltage), diodes D1 & D2 are reverse biased and
OFF, while diodes D3 & D4 are forward biased and ON.
• The carrier voltage is developed across transformer T2 180o out of phase with the carrier
voltage across T1.
• The output signal is 180o out of phase with the reference oscillator.
(a) Truth table (b) Phasor diagram (c) Constellation diagram

Fig: BPSK Modulator

• A constellation diagram is sometimes called a signal state space diagram, is similar to a


phasor diagram.
• In a constellation diagram the relative positions of the peaks of the phasors are shown.
Bandwidth considerations of BPSK:

• A balanced modulator is a product modulator, the output signal is the product of the 2
input signals.
• In a BPSK modulator, the carrier input signal is multiplied by the binary data.
• If +1V is assigned to a logic 1 & -1V is assigned to logic 0, the input carrier (sin ωct) is
multiplied by either +1 (or) -1.
• Consequently, the output signal is either +1 sin ωct (or) -1 sin ωct (i.e) the signal is inphase
with the reference oscillator and a signal is 180o out of phase with the reference oscillator.
• Each time if the input logic condition changes, the output phase changes.
• The output rate of change (baud) is equal to the input rate of change (bps).
The output of BPSK modulator is,
BPSK o/p = [sin(2∏fat)]x[sin(2∏fCt)]
Where, fa = maximum fundamental frequency of binary input (hertz)
fC = reference carrier frequency (hertz)
The product of 2 sine functions,
1/2 cos[2∏(fC-fa)t] - 1/2 cos[2∏(fC+fa)t]
The minimum double-sided Nyquist bandwidth (B) is 2fa
fa=fb/2 , fb is the input bit rate.
B = fb

Fig: output phase versus time relationship for a BPSK modulator.


BPSK Receiver:

• The input signal may be +sinωct (or) -sinωct.


• The coherent carrier recovery circuit detects and regenerates a carrier signal that is
both frequency and phase coherent with the original transmit carrier.
• The balanced modulator is a product detector, the output is the product of the 2
inputs (the BPSK signal & the recovered carrier).
• The low pass filter (LPF) separates the recovered binary data from the complex
demodulated signal.
For a BPSK input signal of +sinωct (logic 1), the output of the balanced
modulator is,
output = (sinωct) (sinωct) = sin2ωct
sin2ωct = 1/2(1- cos2ωct) = 1/2 -1/2 cos2ωct
output = +1/2V = logic 1.
• The output of the balanced modulator contains a positive voltage [+(1/2)V] and a
cosine wave at twice the carrier frequency (2ωc)
• The LPF has a cutoff frequency much lower than 2ωc
• A positive voltage represents a demodulated logic 1.
For a BPSK input signal of -sinωct (logic 0), the output of the balanced
modulator is,
output = (-sinωct) (-sinωct) = -sin2ωct
-sin2ωct = -1/2(1- cos2ωct) = -1/2 +1/2 cos2ωct
output = -1/2V = logic 0.

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