WEPM 7-4

A Simple and Accurate Dynamic Voltage Divider for

Resistive Bridge Transducers
Frank M.L. van der Goes and Gerard C.M. Meijer
Electronics Research Laboratory
Delft University of Technology
P.O. Box 5031
2600 G A Delft, The Netherlands

Abstracr -- This paper presents a siiiiple aid accurate

dynamic voltage divider for resistive bridge transducers
which can be completely integrated in a standard CMOS
process. Calibration is not necessary. The division ratio
" b
converter

does not depend on the switch resistance of the applied I I I I I I

switches. The charge iiijeclioii and thc vollagc

dependency of the resistors cl0 not have any influence on
the performance. Furthermore, the number of
components is drastically reduced, compared to
traditional dividers. Measurements on an integrated
divider in a CMOS process show ai accuracy of 13 bits.

INTRODUCTION
Fig.1 Connection of the resistive-bridge transducer to
the A/D converter and an amplifier (a) or attenuator (b).
Resistive bridge transducers are often applied to measure
various physical signals such as pressure or force. A
For accurate measurements, the inaccuracy of the
resistive-bridge transducer is often ratiometric; the ratio
amplification or attenuation has to be smaller than the
of the output voltage of the bridge to its drive voltage
inaccuracy of the bridge (E). Since the A/D converter has
represents the physical signal. In orclcr to get a digital
representation of the physical signal, both the output to convert two signals which lie in the same runplitude
voltage of the bridge and the drive voltage have to be range, its non-linearity needs to be less than E. This is
measured. If both voltages are directly converted by the easy to realize.
sane A/D converter, its accuracy must be much hgher Below is a list of constraints for the attenuator of
tlian the bridge accuracy because the maximum output amplifier for realizing:
voltage of the bridge is a small part amax of the bridge accuracy better than 0.1c/o
drive voltage. In order to perform accurate measurements no calibration
compared to the bridge inaccuracy E, the converter good long term stability
no excessive noise contribution
inaccuracy (or non-linearity) should not exceed
fully integrable on chip
With C C ~ ~ = and ~ O - ~ the converter should be linear 0 simple circuitry and thus low-cost
within 17 bits. This is hard to realize. In some situations, In the next section, we will discuss the design of the
the bridge accuracy is better than 0.1%. resulting in an amplifier or attenuator.
increase in the desired linearity.
To overcome this problem, we can either amplify the
output voltage of the bridge or attenuate the driving DESIGN
voltage. Fig. l a and Ib show the connection of the
resistive bridge transducer to the A/D converter when The first two constraints in the previous section, an
respectively an amplifier for the output voltage or an accuracy better d i m 0.1 % ancl no calibration, cannot be
attenuator for the drive voltage is applied. met by applying matched components. Instead, we have
to apply dynamic element matching (DEM). When this

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 technique is applied, all (passive) components in a circuit Thlrdly, the number of components is approximately
exchange position in the circuit, resulting in a new 3N (N resistors and 2N switches) where N is the division
circuit. An example of a DEM-based voltage divider ratio. For large N,the number of components is also
(Fig. 2) has been proposed by Klaassen [ I ] . large.
Lastly, the voltage difference v 1 - V ~cannot be
measured ideally, because current must flow through the
resistive chain. This makes this circuit useless for
accurate 4-wire measurements.

VI
To overcome these problems, we propose the novel
circuit, depicted in Fig. 3.

_:rj
V2

Fig.2 Klaassen's voltage clivicler.

The circuit is based on N resistors ancl tlivities V1-V2 by Cint
N. The switches cyclically connect one resistor to V1 and
N-1 resistors to V2. If we assume a zero on-resistance of
IIK switc1xs, r~icavcrasc ouipui vo~ragcN - ~ C V , cquatls
exactly (V 1-V2)N-I. The Inismatch of the resistors does
not affect the division ratio and calibration is not
necessary. Moreover drift and l/f noise of the resistors
are canceled if the exchange rate of the resistors is
sufficiently high. Here, only an analog or digital memory I c4
is needed to perform the average operation. comparator 1
A DEM-based amplifier can be made by applying
DEM in a feedback loop around an opamp. A DEM-
amplifier consumes more clip space than a DEM-
attenuator and should therefore only be applied when Fig.3 The novel voltage divider.
absolutely necessary. The divider is realized with NR resistors and NC
capacitors, resulting in a division ratio of NRNc. During
The main reason for applying an amplifier instead of an
the ineasuremcnl of Vl-Vz, one Ci is chargecl to the
attenuator noise. Amplification of a signal normaLly
voltage across one resistor Ri, which is approximately
increases the signal-to-noise ratio. We apply a passive
(V 1-v2)/NR. This charge is transferred to the integrator.
attenuator because the low signal bandwidth (10Hz) After NRNC times, all Ci have been charged to the
enables us to keep the noise level sufficiently low.
voltages across all Ri. The charge transferred is then
(V1-V2)CCi. After NRNC charge transfers while Vin is
One possible implementation of the attenuator is the
being measured, the transferred charge equals N R N c V ~ ~
above circuit in Fig. 2. However, this circuit has some
X i . The ratio of the transferred charges equals M:
disadvantages. First, the difference between the on-
resistance of the switches (which are implemented by
MOS transistors when the divider is fully integrated)
directly influences the division ratio. It is likely that this This is the desired ratio, representing the physical signal.
difference is non-zero, because the common-mode (CM) This circuit can be part of a Delta-Sigma converter or a
voltage of a switch connected to V 1 dlffers from that of a VCO This will be discussed further.
switch connected to V2. This difference in CIM voltage In the next section we discuss the effect of common
influences the channel charge of the MOS switch ancl errors on the division ratio.
therefore the on-resist" For hgli accuracy, the on-
resistance has to be low, resulting in large transistors.
Secondly, the voltage dependence of the resistors also ERRORS
affects the division ratio. The voltage across a resistor
connected to V1 hffers from that V2, resulting in a Linear systematic errors of the A D converter, such as
change in the division ralio. offset and gain errors, are eliminated by applying the 3-

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 signal approach [2, 31. Let us assume that the transfer of the NRNC measurements of V h and v 1 - V ~are Qx and
the A/D converter is described by the equation Qref respectively. After some calculation it follows that
Y=u+bX
where Y is the output, X is the input of the A/D
(2)
Xld
Qx
(+ :
= aV,C,,, 1 -u2V6’(a’ )
+ 3) (5)
converter and a and b are its offset ancl gain respectively.
Wheh a signal Xx is measured, two reference signals
Xo and Xref are also measured identically by the same Qre, = VhCmi (1 + a2v6z ) (6)
system. The signal Xref has already been discussed where v b = v l - v 2 and C,,=CC,,,. Assuming that a<<l
above. The signal Xo represents the offset. The and a2Vb2<< 1, we can approximate the ratio Qx/Qref as
measurement result is the climensionless ratio M: follows:
T I T I

(3) (7)
In this ratio, the influence of the additive ancl Goocl capacitors such as poly/oxide/ligh-doped silicon
multiplicative parameters a and b is eliminated. The only capacitors show an a2<<lppm/v2. with vb=5v, the
requirement for the converter is that of linearity. When inaccuracy due to a second order voltage dependence is
the three signals are measured continuously (continuous less than 7ppm. This is low enough for our application.
auto-calibration of the offset ancl gain), the temperaturc
independence and long-tenn stability are guaranteed The on-resistance of switches
without calibration. We apply this technique to measure The on-resistance of the switches merely increases the
resistive-bridge transducers. time needed to charge or discharge Ci and thus does not
affect the division ratio. The MOS transistors can be kept
Switch charge injection small, which is a great advantage.
The switch charge injection originating from the MOS
switches in Fig. 3 gives rise to offset, which can be Parasitic capacitances
eliminated by the ?-signal approach. To be certain that The on-chip capacitors Ci have parasitic capacitances to
the charge injection is purely additive, switches s1 and s2 the substrate, which are also voltage-dependent. But
in Fig. 2 operate in break-before-make mode. Further, h e thanks to the measurement technique applied here, the
capacitors Ci may never be floating; a resistive path must parasitic capacitances do not contribute to the transfer of
exist from at least one node of Ci to a defined potential. charge to Cint. The voltage dependence of the parasitic
Thus the switches on the left side of Ci operate after s1 capacitances is therefor of no importance.
and s2 have been switchecl. The total switch charge
transfer to C h t only originates from s1 and s2. As the Stochastical errors
channel charge of si and s2 does not depend on the input We will next discuss the influence of the noise originating
signal, the charge injection results in offset. from the switches, the resistors and the active part of the
integrator depicted in Fig. 4. The resistors and the
Voltage dependence of resistors and capacitors switches generate thermal noise with a power spectrum
The voltage dependence of the resistors does not density 4kTR V2/Hz. The noise of both the resistors and
influence the division ratio, because every Ci samples in the switches is modeled by R. The equivalent input
N, times exactly V,-V,. However, the voltage referred noise U, of the active part of the integrator has a
dependence of the capacitors Ci do give an error. Let us power spectrum density S(Un) V2/Hz.
assume that this voltage dependence can be modeled by
the following equation: Cint
ci c;, + +
(v)= (1 u,v u p z up’) + (4)
where v is the voltage across the capacitor and Ci,ois the
zero-voltage capacitance. The odd-order terms can easily U
be eliminated by anti-parallel connection of two identical
capacitors. The even-orcler terms result in an inaccuracy
which we will calculate below. Fig.4 Noise sources.
Assume the CM voltage of V h lies exactly halfway
between the voltages V1 ancl V2 and that it has an The noise power of ueq for P samples of U is given by
amplitude of cx(V 1-V2). The transferred charge during

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 approach: after P periods of the VCO, the pC selects
another input signal for the A/D converter. As the VCO
frequency is 2OWz for the reference measurement ancl
with k as the B o l t z ” constant, T the absolute
5OkHz for the offset measurement, one measurement
temperature and fIllL- the bandwidth of the active part.
takes less than 120ms.
Note that the signal power equals (PU)2. With C=5OpF,
The bridge is simulated by resistors. The circuit inside
P= 1000, T=3OOK, finax= 1MHz, S(UII)= 10- V2/Hz
the dashes has been integrated in a CMOS process. The
and U=25mV, the equivalent input noise is 426pV, and
remaining part has been constructed with discrete
the SNR equals 95dB. components.
The dlvider contains 4 resistors ancl 2 capacitors,
resulting in a division ratio of 8. The output voltage of
APPLICATION TO RESISTIVE-BRIDGE the reference bridge was set to 0.125 of v b to ensure that
??IANSDUCERS the non-linearity of the VCO would not be measured.
The total inaccuracy of the voltage divider compared
Figure 5 shows a circuit including the bridge ancl the to the bridge is 90ppm. This corresponds to 13.4 bits, a
voltage divider. The measurement is performed by using satisfactory result. Thls inaccuracy is not due to noise.
the 4-wire teclvlique to eliminate the influence of the lead
resistances rcli. The capacitors Ci sample the voltage
across (he bridge vb. Thc rcsiswrs rd2 and rt14 only CONCLUSIONS AND FUTURE DEVELOPMENTS
contribute to the time to charge and discharge Ci.
rdl r - - - - - - - -
1 A novel voltage clivider for resistive-bridge transducers
+ - Vdd
has been presented. Three important advantages of this
divider are that no calibration is needed and it can be
fully integrated in a standard CMOS process.
Measurements were obtained from a VCO built with an
integrated cfvider and discrete components. The total
inaccuracy was found to be 90ppm. A fully integrated
circuit consisting of the chvider and the VCO is under
development.

comparator REFERENCES
I
I
[ 11 K.B. Klaassen, ‘Digitally Controlled Absolute
I_ - - - - - - Voltage Division’, IEEE Transactions on
Fig.5 Four-wire connection of the transducer used to Iizstrumenratioiz and Measurement, vol. 24 no. 2, pp
perform accurate measurements. 106-112, June 1975.
Note that Vdd do not have to be accurately known. The
circuit functions as a VCO by using the current I, as will [2] Frank M.L. van der Goes, Paul C. de Jong ancl
be discussed in the next section. Gerard C.M. Meijer, ‘Concepts for Accurate A/D
Converter for Transducers’, in Proceedings of the 7th
International Conference on Solid-Stare Sensors and
MEASUREMENT RESULTS Actuators, 1993, pp 331-334.

The circuit used to verify the theory is a VCO based on [3] Ferry N. Toth and Gerard C.M. Meijer, ‘A Low-
the circuit depicted in Fig. 5. Both the output voltage and Cost, Smart Capacitive Position Sensor’, IEEE
the drive voltage of the bridge are converted to charges. Transactions on lntrumenration cind Measurement, vol.
The VCO performs a charge-to-time conversion using the 41 no. 6, December 1992.
current I. The output of the comparator functions as the
input of a micro conlroller (pC), which measurcs the
period by counting. The pC (an Intel SO51FA) also
controls the entire measurement by means of the 3-signal

787

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