Design of a Cricket Game Using

FPGAs

Ronald J. Egyir and Ryan P. Devendorf

Department of Electrical and Computer Engineering Class of ‘20 & ‘21

Under the Guidance of Dr. Maqsood Mughal

June 2020
Design of a Cricket Game Using FPGAs 1

Acknowledgements
We would like to thank Worcester Polytechnic Institute for giving us the opportunity to
conduct our Major Qualifying Project research on the “Design of a Cricket Game Using
FPGAs”.

The Completion of this project could not have been made possible without the guidance
and support we have received throughout our time at WPI. A special thanks is owed to Dr.
Maqsood Mughal for overseeing our efforts throughout this project.

Abstract

Within this project, we have broken down our approach to implementing a realistic
cricket game onto a Basys 3 FPGA board. Using Verilog, we created a pseudorandom number
generator using an LFSR (Linear Feedback Shift Register) and assigned probabilities to the
outcomes in order to closely reflect a real cricket game. Through various logical elements, we
have utilized components such as push buttons to take in user input and have developed a lifelike
cricket scoreboard to keep track of things like number of runs, current ball count etc. You will
find explanations on various aspects of digital design such as button debouncing, using a
pseudorandom number generator, slowing a clock using a counter, converting data for
seven-segment led display and of course how to tie them all together in order to form a
functioning circuit. All code written for this project is referenced in text and can be found in the
appendix at the end of the paper.

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Table of Figures
Figure Number Figure Name Page Number

1 Cricket Scoreboard Shows 6

Runs(177), Wickets (6), and Balls
Left (74)

2 Key Elements in the​ ​Game of 7

Cricket

3 Basys 3 Board with Labeled 9

Components in Use

4 Entire Cricket Game Functionality 11

5 Functional Block Diagram of 12

Overall Game Flow

6 Verilog Schematic of Top 12

Module

7 Timing Diagram to Generate Slow 13

Clock from System Clock

8 Block Diagram of Debounce 14

Module

9 Timing Diagram for Generic Button 14

Debouncing

10 Block Diagram of Simplified 15

Cricket Game Module

11 Verilog Schematic of Cricket Game 16

Module

12 Block Diagram of LFSR Module 17

for Random Number Generation

13 Pseudorandom Numbers Generated 17

from an LFSR

14 Top 20 Highest Inning Totals for 18

Twenty20 Cricket

15 Score Results with Probability of 19

Occuring from LFSR Output

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Design of a Cricket Game Using FPGAs 3

16 Block Diagram of Data From Game 20

Module to Seven Segment display

17 Verilog Schematic of Seven 20

Segment Display

18 Timing Waveform - End of Team 21

1’s Inning

19 Timing Waveform - Switching 22

Teams

20 Timing Waveform - End of 22

Team2’s Inning and the End of the
Game

21 Design Utilization 23

22 Team 1 with 198 runs, 5 Wickets 23

and 119 Balls (leds = 7b1110111)

23 ‘IO’ Indicating Team 1’s ‘Inning 24

Over’ (notice ball count = 120)

24 Switch to Team 2(sw0 slider 24

switch is pushed from 0 to 1)

25 Team 2 with 136 Runs, 9 Wickets 25

and 112 Balls

26 Team 1 Wins the Game 25

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Appendix Figures
Appendix Number Figure name Page Number

A-1 Cricket.v (top module) 27

A-2 debounce.v 28

A-3 D_FF.v 28

A-4 cricketGame.v 29

A-5 lfsr.v 30

A-6 score_and_wickets.v 31

A-7 Score_and_wickets.v cont. 32

A-8 score_comparator.v 33

A-9 led_controller.v 34

A-10 Scroll_leds.v 35

A-11 slow_Clock_10Hz.v 35

A-12 bcd_Display.v 36

A-13 binary_to_BCD.v 37

A-14 slow_Clock_1KHz.v 38

A-15 two_bit_Counter.v 38

A-16 decoder2to4.v 39

A-17 mux4to1.v 39

A-18 bcd7seg.v 40

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Table of Contents
Section Name and Number ​Pg. Number

TITLE PAGE
Acknowledgments 1
Abstract 1
Table of Figures 2
Table of Appendix Figures 4
Table of Contents 5
1. Introduction 6
2. The Game Of Cricket 7
2.1 Overview 7
2.2 Structure of the Game 7
2.3 Scoring Runs 8
2.4 Wickets 8
3. Implementation 9
3.1 Scope 9
3.2 Game Flow 11
3.3 Modules 13
3.3.1 Slow Clock Module 13
3.3.2 Debounce Module 14
3.3.3 Cricket Game Module 15
3.3.4 LFSR Module 17
3.3.5 Score, Wickets and Comparator 18
3.3.6 BCD to Display Module 20
4. Results and Conclusion 21
4.1 Design Simulation 21
4.2 Design Utilization 23
4.3 Final Scoreboard Snapshots 23
5. References 26
6. Appendix 27-40

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1. Introduction
With the ability to become any digital circuit, the FPGA (Field Programmable Gate
Array) allows for tighter security, lower power consumption, higher data reliability as well as
being the fastest way to integrate a specific digital design into a device. It is no wonder that
many of the leading technology fields such as industrial, medical, aerospace, and defense have
all been finding more and more ways to utilize them. Whether you are programming a rocket or
simulating the wonderful game of cricket each of these complex tasks can be broken down into
their many simpler parts. The goal of this project is to combine basic digital circuits such as
flip-flops, decoders, comparators, counters etc. in order to create a functioning simulation of the
sport cricket. This project is intended for anyone with basic knowledge of digital design and can
aid as a detailed project for both students and individuals excited to jump into programming
FPGAs.
The board used throughout this project is the Digilent Basys 3 prototyping board which
contains the Xilinx Artix-7 FPGA. All programming has been completed using Verilog
Hardware Description Language (HDL) through Vivado Design Suite. A Digital Schematic Tool
(DSCH) was also used in order to create timing waveforms to help us validate the architecture of
the logic circuit prior to moving into design.
To provide a breakdown of the project and understand the steps we have taken, in the
following sections you will find a brief overview of the important aspects of the game of cricket,
various block diagrams and RTL (Register Transfer Level) schematics representing the Verilog
modules to help you understand how the logic is interconnected, a flowchart to explain the full
functionality of the game and what to expect, all of our code is included in the appendix with
detailed comments to further explain functionality, as well as DSCHs to visualize the game
functioning properly.

Figure 1: Cricket Scoreboard Shows Runs(177), Wickets (6), and Balls Left (74)

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2.The Game of Cricket

Figure 2: Key Elements in the​ ​Game of Cricket

2.1 Overview
The game of cricket is played with a bat and ball on a large field between two 11 player
teams. The objective in cricket is for the batting team to score as many runs as they can and for
the fielding team to prevent them from scoring. As a batsman there are various ways to score
runs but in general when the game is finished the team with the most runs wins. There are many
variations of the way cricket is played but for the purposes of this project we will stick to the
basics in order to maintain a good grasp on the rules of the game while keeping the majority of
the information adhered to the project's implementation. Below you will find further information
on the rules of the game and how it is played.

2.2 Structure of the Game

Typically the game of cricket will be made up of two innings. Before the game starts
there is a coin toss to determine which team will bat or field first. Each team has the opportunity
to score as many runs as they can before one of two things occurs that ends the inning. The first
way this can occur is that one team has been delivered all 120 balls by the opposing team. The
other way is that the fielding team has managed to get 10 out of the 11 players on the batting
team out. It is important to note that when a fielding team gets a batsman out it is referred to as a
‘wicket’. Once both teams have had a chance to bat the score will be compared and the team
with the higher score is the winner. If the score happens to be a tie then the game will then go for
another two innings, however each team will only be delivered 6 balls each before the score is
compared again [7].

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2.3 Scoring Runs

The most common way of scoring runs in cricket is when the batsman hits the ball within
the field, they must run to the other end (bowling end) to complete a run and can continue back
to where they started to score more runs if one of the bowlers hasn’t regained possession of the
ball. In the later, failing to make it back to the batting position or falling short of the crease will
result in one run only with batsmen ruled out if the bails are removed before the batsmen goes
across the batting crease. It is possible for the batsmen to continue running and score up to three
or more runs from one hit. More ways a batsman can score is if he hits the ball hard enough to
reach the boundary. If the ball bounces on the field and then hops over the boundary the team is
awarded 4 runs and if the ball makes it beyond the boundary without touching the field the team
is awarded 6 runs. If either of these two cases are to occur then the batsmens holds the strike and
doesn’t need to run. More possible ways of a team scoring runs is from the extras. Extras results
from a bowler violating the cricket rules while bowling. Examples of this include bowling above
waist height which is considered a “No Ball”, and an extra run is awarded to the opponent team.
Similarly, If a bowler delivers the ball from the wrong position such that his foot lands outside of
the crease the ball will also be called a ‘No Ball’ by the umpire. If the ball is declared as being
too far away from the batsman it will be considered a ‘Wide Ball’. A ‘No Ball’ and a ‘Wide Ball’
both fall into a category referred to as ‘Extras’ and when that occurs the batting team will be
awarded 1 run, and additionally that bowl is not considered legal and will not count towards the
120 balls, instead being rebowled. To summarize the possibilities of scoring, for any particular
delivery the batsman can score 0, 1, 2, 3, 4, or 6 runs and that's unless of course the fielding
team gets the batsman out [7].

2.4 Wickets
Just like there is more than one way to score runs as a batsman, there are also multiple
ways for the fielders to get the batsman out. To list a few common ways a fielder can get a
batsman out there is ‘Bowled’, ‘Caught’, run out, and ‘Leg Before Wicket’. If a batsman is
bowled out it means that the ball has knocked the stumps behind the batsman shown in figure 2.
If the batsman hits the ball and it is caught before touching the ground it is referred to as
‘Caught’. ‘Leg Before Wicket’ refers to when a batsman is hit by the ball without it touching the
bat but only if the ball was going to hit the wickets had it not been obstructed by the body of the
player. As a reminder going forward, when a batsman gets out for whatever reason it is counted
as a ‘wicket’ against their team. If the wicket count reaches 10 the inning ends and the other
team gets to bat no matter how many balls have been delivered [7].

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3. Implementation
Within this section, you will find the scope of the project where we have laid out what
components on the Basys 3 board we will be using for the game. You will find detailed
explanations with flowcharts and diagrams that express the overall game functionality as well as
thorough breakdowns of the individual modules. All commented code for these modules can be
found in the appendix section.

3.1 Scope

Figure 3: Basys 3 Board with Labeled Components in Use

1. We are using the micro-USB port for both programming and powering the board. The
two blue jumpers you see along the top of the board will be set to ‘USB’ and ‘JTAG’
from left to right respectively. You should notice that the image shown in figure 3 does
NOT have both jumpers in the proper position.

2. The first three digits on the seven segment display is used to display a team's current
number of runs in decimal and can range from 0 runs to 255 runs.

3. The last digit on the seven segment display is used to display the number of wickets
against the same team that has their runs displayed.

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4. The row of sixteen leds will be used to display the current teams ball count in binary.
Since the maximum ball count is 120 balls, we will only need the right most seven leds
for this, however the remainder of the leds will be used for an end of game celebration.

5. The up pushbutton is used to simulate a delivery from the bowler. When the up button is
pressed, depending on the outcome of the bowl the displays will change accordingly.

6. The middle button is used as a game reset. At any point in the game you can hit the reset
button and the game will start over.

7. The rightmost switch is used as a ‘team switch’. When the switch is in the up position it
means that team 1 is batting and the displays will present team 1’s current score, wicket
and ball count. This is the same functionality in the bottom position for team 2.

More Useful Information:

● The team switch should be in the up position at the beginning of the game and should be
switched to the bottom position when the display says ‘ IO ‘ which denotes ‘inning over’.
This means that team 1 has reached their maximum ball or wicket count and it is time for
the teams to switch. Failure to do this will result in an unfair game and it is recommended
that the reset switch be applied.

● Once both teams have gone the game will automatically compare the two scores and
display the team with the higher score (the winner) on the three rightmost digits of the
seven segment display in the form ‘t01’ or ‘t02’ and at the same time the leds will scroll
in a celebratory fashion.

● If the game results in a tie game the same three digits will display ‘tIE’. The switch will
then be switched back to the team 1 position and the game will be replayed the exact
same way, except this time each team will only receive 6 balls before the score is
compared again.

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3.2 Game Flow

​Figure 4: Entire Cricket Game Functionality

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Figure 5: Functional Block Diagram of Cricket Top Module

Figure 6: Verilog Schematic of Top Module

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3.3 Modules

3.3.1 Slow Clock Module

The system clock for the Basys 3 runs at a frequency of 100 MHz. Sometimes we are
able to use this frequency for our applications but for others we need to slow this frequency
down to produce the results we need. For instance, in the Basys 3 board reference manual [3]
you will find that the seven segment display leds should run at a frequency between 60 Hz and
1,000 Hz. Anything higher than that can result in unstable transitions and anything lower will
result in a noticeable flicker to the human eye. In order to obtain the desired frequency of the
clocks we can use a simple up-counter. When we give a counter a certain value to reset itself, we
can then count the number of clock ticks of the system clock and generate a different clock pulse
that transitions when we reach the maximum count. Depending how we set the max count value
will determine the frequency of the slower clock. For example, if we set the max count to a value
of 2 it will create a slower clock at half the system clock frequency, as shown in figure 7. Slow
clock modules are shown in figures A-11 and A-14.

Figure 7: Timing Diagram to Generate Slow Clock from System Clock

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3.3.2 Debounce Module

A common problem found in digital circuits is when a mechanical button is pressed

generally it will make and lose contact multiple times before setting into a steady state. This is
referred to as the button bouncing [4] and in order to not send multiple button press signals from
a single press we have decided to implement a button debouncer shown in figure 8 and
represented in Figures A-2 and A-3.

Figure 8: Block Diagram of Debounce Module

There are multiple ways of implementing this in a digital circuit but we chose to use a
series of D-flip-flops that are fed with a slower clock frequency making it so the
debouncedButton signal doesn’t change states for multiple .1 second clock periods represented in
figure 9.

Figure 9: Timing Diagram for Generic Button Debouncing

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3.3.3 Cricket Game Module

Figure 10: Block Diagram of Simplified Cricket Game Module

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​ ​ Figure 11: Verilog Schematic of Cricket Game Module

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The ​cricketGame module consists of the four modules LFSR, score_and_wickets,

score_comparator and led_controller shown in figures A-5, A-6, A-8, and A-9 respectively. As
seen in Figure 11 above, the inputs are the Basys 3 master clock(clk_fpga), the debounced up
pushbutton(delivery), the center pushbutton (reset) and the slider switch SW0 (teamSwitch) . The
outputs of cricketGame are leds, runs, wickets, ​inningOver,​ ​gameOver​ and ​winner.

3.3.4 LFSR Module

Figure 12: Block Diagram of LFSR Module for Random Number Generation [9]

A linear feedback shift register is used in ​lfsr.v (figure A-5) to provide a pseudorandom 4
bit number for the assignment of scores and wickets. Shown in figure 12 above, a shift register of
length 6-bits is used to increase the period, where the maximum period of an n-bit long lfsr is
equal to 2​n - 1 [8]. Figure 13 shows the result of a linear feedback shift register that uses an
XOR sum and starts with a seed of 6’b1111111(15d). The period of this sequence is 31 :
(15,15,7,3,9,12,6,11,5,2,9,4,2,1,0,8,4,10,5,10,13,14,7,11,13,6,3,1,8,12,14).

Figure 13: Pseudorandom Numbers Generated from an LFSR

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3.3.5 Score, Wickets and Comparator

Figure 14: Top 20 Highest Inning Totals for Twenty20 Cricket

The pseudorandom number sequence generated by ​lfsr.v ​(figure A-5) is used to assign the
score and wickets for each delivery of a ball(up push button). The scores for Twenty 20 cricket
tend to rarely exceed 256, as seen in figure 14 [10]. Teams also usually end their innings because
they reached 120 balls, rather than by losing 10 wickets. The random number assignment
shown in figure 15 below was carefully chosen in order to achieve realistic scores [2].

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LFSR Random Number Assigned Value Based on Probability of Receiving Score

Output 0-15 LFSR Output from any one Delivery

0,1,2 Dotball: Runs + 0 18.75%

ballCount + 1

3,4,5,6 Single: Runs + 1 25%

ballCount + 1

7,8,9 Double: Runs + 2 18.75%

ballCount + 1

10 Triple: Runs + 3 6.25%

ballCount + 1

11 Four: Runs + 4 6.25%

ballCount + 1

12 Six: Runs + 6 6.25%

ballCount + 1

13 WideBall: Runs + 1 6.25%

ballCount + 0

14 NoBall: Runs + 1 6.25%

ballCount + 0

15 Wicket: wicketCount + 1 6.25%

ballCount + 1

Figure 15: Score Results with Probability of Occuring from LFSR Output

As shown in figure A- 8, ​score_comparator.v t​ akes the scores, wickets, and balls,

accumulated by each team in ​score_and_wickets.v (​ figure A-7) and compares them to determine
if an inning is over, if the game is over, and if so determine who is the winner.

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3.3.6 BCD to Display Module

​Figure 16: Block Diagram of Data from Game Module to Seven Segment Display [1]

​ ​ Figure 17: Verilog Schematic of Seven Segment Display

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The ​bcdDisplay.v module shown in figure A-12 along with its submodules (figures A-13
to A-18) convert the binary runs and wickets from ​cricketGame.v ​(figure A- 4) ​to BCD (Binary
Coded Decimal) and display them on the seven segment leds on the Basys 3 board [5]. The block
diagram and verilog schematic of the bcd display system are shown in figures 16 and 17 above.

4. Conclusion and Results

In the following section you will find our simulated digital schematics with explanations
of what is being displayed. You can also find the design utilization report from our finished
project in Vivado Design Studio and photographs of the Basys 3 board while the game is in
process.

4.1 Design Simulation

Figure 18 shows that on the rising edge of the delivery at 2510 ns, the lfsr output is 15
resulting in another wicket being taken. On the next free clock cycle at 2525 ns, the number of
wickets goes from 9 to 10. Once the wickets are at 10 or the ball count reaches 120, ‘inningOver’
value goes high as seen at 2535 ns. Despite new delivery attempts, the runs, wickets, and balls of
Team 1 are no longer allowed to be incremented in this state (inningOver = 1) [6].

Figure 18: Timing Waveform - End of Team 1’s Inning

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Figure 19 below shows what happens when the teams are switched. The second team’s
runs, wickets and balls all start from zero.

Figure 19: Timing Waveform - Switching Teams

Figure 20 below shows the second team completing their inning, which ends the game.
Team 2 (sw = 1) delivers 120 balls and thus their inning is over (updated on next clock cycle in
simulation). The game ends immediately because both teams' innings are over (team 1 took 10
wickets and team 2 delivered 120 balls). Gameover goes to 1 and since Team 2 had 203 runs
while Team 1 had 184 runs, Team 2 is declared the winner(‘winner’ changes from don’t care(x)
to 1, instead of going to 0) [6].

Figure 20: Timing Waveform - End of Team2’s Inning and the End of the Game

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4.2 Design Utilization

Figure 21 shows a summary of the post-implementation design utilization on a Basys 3 board.

​ ​ Figure 21: Design Utilization

4.3 Final Scoreboard Snapshots

Snapshots of the game in action are shown below:

Figure 22: Team 1 with 198 runs, 5 Wickets and 119 Balls (leds = 7b1110111)

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Figure 23: ‘IO’ Indicating Team 1’s ‘Inning Over’ (notice ball count = 120)

Figure 24: Switch to Team 2 (sw0 slider switch is pushed from 0 to 1)

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Figure 25: Team 2 with 136 Runs, 9 Wickets and 112 Balls

Figure 26: Team 1 Wins the Game

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5. References
[1] ​Chakraborty Rajat Subhra, and Palchaudhuri Ayan. “ARCHITECTURE AND DESIGN
AUTOMATION OF HIGH PERFORMANCE LARGE ADDERS AND COUNTERS ON FPGA
THROUGH CONSTRAINED PLACEMENT.” 18 May 2017: n. pag. Print.

[2] ​Fokhrulislam, Md., M. A. Mohd. Ali, and Burhanuddin Yeop Majlis. “FPGA Implementation
of an LFSR Based Pseudorandom Pattern Generator for MEMS Testing.” ​International Journal
of Computer Applications​ 75.11 (2013): 30–34. Web.

[3] ​ Digilent, “Basys3 Reference Manual,” Basys3 Rev.c Datasheet, August 2014.

[4] ​Girard III Hilton W, and Christenson Keith A. “Debounce strategy for validating switch
actuation.” 15 Feb. 2012: n. pag. Print.

[5] ​Chu, Pong P. ​FPGA Prototyping by Verilog Examples Xilinx Spartan -3 Version .​ Hoboken,
N.J: J. Wiley & Sons. Print.

[6] ​Salemi, Ray. ​FPGA Simulation : A Complete Step-by-Step Guide ​. S.l: Ray Salemi. Print.

[7] Orr, Graeme. “Test Cricket Versus One-Day Cricket: Regulations and Rhythms.” ​Alternative
Law Journal​ 31.1 (2006): n. pag. Print.

[8] Ghelani, Harsh H. et al. “FPGA Implementation of Configurable Linear Feedback Shift
Register Using Verilog.” ​International Journal of Computer Sciences and Engineering 6.4
(2018): 143–146. Web.

[9] Cerda, J. C et al. “An Efficient FPGA Random Number Generator Using LFSRs and Cellular
Automata.” ​2012 IEEE 55th International Midwest Symposium on Circuits and Systems
(MWSCAS)​. IEEE, 2012. 912–915. Web.

[10] ESPN. ​“Records: Twenty20 Internationals: Team Records: Highest Innings Totals:
ESPNcricinfo.com.” ​Cricinfo,​ stats.espncricinfo.com/ci/content/records/283218.html. Web.

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6. Appendix

Figure A-1: ​Cricket.v​ (top module)

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Figure A-2:​ d​ ebounce.v

Figure A-3:​ D_FF.v

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Figure A-4:​ cricketGame.v

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Figure A-5:​ ​lfsr.v

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Figure A-6:​ ​score_and_wickets.v

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Figure A-7:​ ​score_and_wickets.v cont’d

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Figure A-8:​ ​score_comparator.v

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Figure A-9:​ ​led_controller.v

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Figure A-10:​ ​scroll_Leds.v

Figure A-11:​ ​slowClock_10Hz.v

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Figure A-12:​ bcdDisplay.v

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Figure A-13:​ binary_to_BCD.v

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Figure A-14:​ ​slowClock_1kHz.v

Figure A-15:​ ​two_bit_counter.v

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Figure A-16:​ ​decoder2to4.v

Figure A-17: ​mux4to1.v

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Figure A-18: ​bcd7seg.v

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