FAKULTI TEKNOLOGI DAN KEJURUTERAAN

ELEKTRONIK DAN KOMPUTER

UNIVERSITI TEKNIKAL MALAYSIA MELAKA

VLSI DESIGN & FABRICATION

BERC4804 SEMESTER 2 SESI 2023/2024

LAB 1: MOSFET CHARACTERIZATION

NO. STUDENTS' NAME MATRIC. NO.

1.

2.

3.

4.

PROGRAMME 3 BERC

SECTION /
GROUP

DATE

1.
NAME OF
INSTRUCTOR(S)
2.

EXAMINER’S COMMENT(S) TOTAL MARKS

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1.0 OBJECTIVES

1. To familiar with VLSI design software.

2. To identify the operating region of MOSFET.
3. To characterize the I-V curve of MOSFET.
4. To work effectively in given task in group.

2.0 EQUIPMENT

1. Personal Computer / desktop.

2. Mentor Graphics software.

3.0 SYNOPSIS & THEORY

This Lab is concerned with the use of VLSI design software to characterize metal-oxide
semiconductor field effect transistor (MOSFET); pMOS and nMOS. It will be focusing on
determining the transistor operating region, threshold voltage characterization, and I-V
characterization.

In this Lab, pMOS and nMOS schematics circuits will be drawn by using Mentor Graphics EDA
software, by using all the available components in the library. Once designed, the circuit will be
then verified and characterized through simulation.

3.1 MOSFET

MOSFET has two modes which are enhancement and depletion. In this course, we focus on
enhancement mode of MOSFET. MOSFET has two types which are pMOSFET (or pMOS) and
nMOSFET (or nMOS).

(a) (b)

Figure 3-1 Cross section of (a) nMOS, (b) pMOS

Figure 3-1 depicts the cross-section view of nMOS and pMOS which constructed using p-type
and n-type substrates, respectively.

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4.0 PROCEDURES

PART A: OPERATING REGION OF MOSFET

1. Create a directory namely vlsi. Go to vlsi directory. In the vlsi directory, create a directory
using your group# (replace # with your group number), e.g., group5

2. Go to group# directory, open the new terminal on Linux OS by using right-mouse-button

(RMB), click on Open Terminal.

3. In the terminal, type: pwd

Your current path should be: /home/training/Desktop/vlsi/group#

4. Open the Pyxis Design Manager, by typing:

dmgr_ic &

5. Click on File > New > Project and under the technology library path, point to
/EDA/TSMC_013_TDK/tech_libs/generic13. Define the Project name as lab1.
After that, define the Project location as /home/training/Desktop/vlsi/group#. Then click
“OK” to continue.

Notice that the technology we are using for laboratory activities is Taiwan Semiconductor
Manufacturing Company (TSMC) 130nm technology (i.e., the length (L) of the transistor is
130nm). PLEASE REMEMBER THIS!!!!!

6. On the Manage External/Logic Libraries, click on “Add Standard Libraries”, to add the
Pyxis Libraries.

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7. Select your project name (lab1) at the Project Navigator, then followed by RMB>New>
Library; and name your library name as component and click OK to continue.

8. Select the library component which you have created at the previous step, then followed by
RMB>New>Schematic; and define your schematic and cell name as nmos. Then the Pyxis
Design Manager will automatically invoke the Pyxis Schematic window, as below.

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9. On the Pyxis Schematic, click on Add>Instance… or with the hotkey I, then point the browser
to $GENERIC13/symbols and select nmos and click on OK. Then paste the nmos onto the
schematic sheet.

10. Setup the schematic with the DC voltage values, transistor width (W), and transistor length (L)
as shown below. DC voltage source can be obtained from sources_lib and ground from
generic_lib. To change the properties of an instance, select any instance and press Q to
change its properties. Connect all the components by clicking on “Add > Wire” or you may
use the shortcut key “W”.

11. Once the schematic is done, click on File>Check Schematic to check for connection error. If
errors occur, fix the error and run the schematic check again. If your design is error free, then
you may close the schematic checking report and save your schematic by clicking on
File>Save Sheet>Default and proceed to the next step.

12. Click on Simulation on the schematic edit to enter the Simulation Mode. An Entering
Simulation Mode window will pop up once you click the Simulation, click OK to continue.

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13. Click on Simulation>Setup Simulation at the menu bar to setup the simulation. On the
Analysis, select OP in the Analysis Selector. On the Libraries, select Typical in the Model
Scenario. Click Apply.

14. Click on the Run Simulator icon on the toolbar to run the simulation.

15. Once the simulation process is completed, click on ASCII Files on the schematic sim and
click on Simulation results (chi). Then the AMS Results Browser will automatically invoke.

16. In the AMS Results Browser, go to Model parameters to check on the transistor model.
NMOS.6 is the transistor model that was used for simulation in Step 14.

17. In the DC operating point, you can check the current, voltage and power measurement
values.

18. In the Operating point information, you can check more details on the voltage values such
as VGS, VDS, VBS, VTH, VDSAT, etc. Most importantly, you can check the transistor
operating region.

19. Based on the information obtained from Operating point information, fill in Table 5.1.

20. Set your own values of VGS and VDS to operate the nMOS transistor in the linear and
saturation region. Rerun the simulation and complete Table 5.1.

21. Redo steps 8-20 for pMOS transistor, snapshot the schematic setup for pMOS transistor and
complete Table 5.2.

PART B: CHARACTERIZATION OF THRESHOLD VOLTAGE

1. Modify the nMOS schematic setup as below and perform Check Schematic to check for
connection error.

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2. Click on Simulation on the schematic edit to enter the Simulation Mode

3. Click on Simulation>Setup Simulation at the menu bar to setup the simulation. While
keeping the existing/previous simulation settings, do the followings:

a. On the Analysis, select DC in the Analysis Selector.

b. On the Outputs, select Currents in the Global Outputs.
c. Setup the Params/Sweep as below for vds and vgs.
d. Click on Apply.

4. Click on the Run Simulator icon on the toolbar to run the simulation.

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5. Once the simulation process is completed, click on View Measures on the schematic sim and
click on Plot. Then the EzWave will automatically invoke.

6. Click on the DC>M1 folder to view the list of all available waveforms. Double click on the node
I(D) to view the waveform of ID versus VGS.

7. Measure the VTH by using cursor. To add the cursor, Cursor>Add. Snapshot the waveform of
ID versus VGS with measured VTH and complete Table 5.3.

8. Increase the width of the transistor (W) to 4u and 6u. Rerun the simulation. Observe the VTH
value in Operating point information and complete Table 5.4.

9. Overlap the waveform of ID versus VGS for W=2u, 4u, and 6u. Observe the current value as
the transistor width increases. Label each waveform with proper name and snapshot the
waveforms.

PART C: MOSFET I-V CHARACTERIZATION

1. Using the existing schematic setup in PART B (W=2u), click on Simulation>Setup

Simulation at the menu bar to setup the simulation. While keeping the existing/previous
simulation settings, do the followings:

a. Setup the Params/Sweep as below for vds.

b. Click on Apply.

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2. Run the simulation and observe the waveform for I(D) of M1. Snapshot the waveform.

3. Redo the I-V characterization for pMOS.

5.0 RESULTS

PART A: OPERATING REGION OF MOSFET

 Table 5.1: nMOS operating region.

VG VBS
Region VTH VDS VDS(SAT)
S
Subthreshol
d
Linear
Saturation

 Snapshot of pMOS simulation setup.

 Table 5.2: pMOS operating region.

Region VTH VGS VDS VDS(SAT) VBS

Subthreshol
d
Linear
Saturation

PART B: CHARACTERIZATION OF THRESHOLD VOLTAGE

 Snapshot of the waveform of ID versus VGS with measured VTH for W=2u.

 Table 5.3: VTH measurement.

Method VTH
Extracted value Operating point information
Measured value from graph

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  Table 5.4: VTH values with different width of nMOS

Width VTH
2u
4u
6u

 Snapshot of the waveform of ID versus VGS for W=2u, 4u, and 6u (i.e., three
waveforms in one graph).

PART C: MOSFET I-V CHARACTERIZATION

 Snapshot of I-V curve for nMOS

 Snapshot of I-V curve for pMOS

6.0 DISCUSSION
Discuss the findings from the experiment versus the theory.
 Explain your observation in Table 5.4 - why increasing the width of the transistor
reduces the VTH. Your explanation must be based on the understanding of
phenomenon at the device level.
 Explain your observation on current value as the width of transistor increases from
W=2u to W=6u.
 Explain your observation in PART C - why pMOS transistor has lower Id current as
compared to nMOS?

7.0 CONCLUSION
Conclude what you have learned in this lab session.

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