ECEN 474/704 Lab 7: Operational Transconductance Amplifiers

Objective

Design, simulate and layout an operational transconductance amplifier.

Introduction

The operational transconductance amplifier (OTA) is a basic building block of electronic systems. The
function of a transconductor is to convert an input voltage to an output current. The transconductance
amplifier can be configured to amplify or integrate either voltages or currents. The versatility of an OTA
allows its use in many electronic systems such as filters, analog to digital converters, and oscillators. An
OTA is also used as the core amplifier for an operational amplifier. The OTA is an essential element of
many analog systems.

The symbol for a single-ended OTA is shown in Figure 7-1. The amplifier has two voltage inputs and a
single current output. Fully differential versions have two current outputs, and are commonly used in
integrated circuits.

Figure 7-1: The OTA Symbol

The output current of an OTA is proportional to the difference between the input voltages. The relationship
between the input voltages and output current is given by:

Typical input-output characteristic for an OTA is shown in Figure 7-2. Notice that this characteristic is
similar to the input-output characteristic for the differential amplifier. For a given maximum output current,
the width of the OTA's linear region is inversely related to the magnitude of the transconductance. The
larger the linear region, the smaller the transconductance and vice versa.

Figure 7-2: Typical Input-Output Characteristics for an OTA

The input and output resistances must be large in an OTA. Infinite input impedance allows maximum
transfer of the source voltage to the input of the OTA. Maximum transfer of output current to the load
occurs when the output resistance is infinite. Schematic of a basic OTA is shown in Figure 7-3.
 VDD

M5 M6 Io

Rbias
CL
Vi+ M1 M2 Vi-

Itail

M3 M4

VSS
Figure 7-3: Differential Amplifier used as an OTA

A quick analysis of this amplifier shows that the transconductance is given by:

The input resistance is large due to the inputs being at the gate terminals of the MOSFET differential pair.
Notice that the output resistance is also large.

||

The gain-bandwidth product (GBW) is given approximately by:

An improvement of the differential amplifier in Figure 7-3 is to use self-biased loads. The circuit in Figure
7-4 is called a symmetric OTA or the three current-mirror OTA. This circuit is constructed from all the
basic elements discussed in the previous labs. The input stage is a differential pair, the sub-circuits
composed of M1,3 and M2,4 are self-biased inverters, and the transistors M3,5, M4,6, M7,8 and M9,10 are simple
current mirrors.

When designing the symmetrical OTA, transistors M1=M2, M3=M4, M5=M6 and M7=M8. This reduces the
number of designable parameters to four transistor sizes and the tail current. An analysis of this amplifier
shows the transconductance is given by:

,
, ,
,

The input resistance is large due to the MOSFET input stage. The output resistance is given by:

||
 VDD

M5 M3 M4 M6

A1 A2
Io

Rbias
CL
Vi- M1 M2 Vi+
B

Itail

M9 M10

M7 M8

VSS
Figure 7-4: The Three Current-Mirror OTA

The gain-bandwidth product is given approximately by:

Analysis shows that the symmetric OTA has a larger transconductance, slew rate and GBW than the OTA
of Figure 7-3. These specifications are made larger by increasing K.

Design Description

The design of an OTA begins with a consideration of the design specifications. The typical design
specifications for an OTA include transconductance, slew rate, output resistance, GBW, noise, phase
margin, power dissipation and output loading. The transconductance of the symmetric OTA was listed
previously and is repeated here for convenience:

,
, 2 ,
, ,

In the above equation, notice that the DC current in transistors M5,6 is K times larger than the currents in
transistors M3,4. The transconductance can be set by the tail current source, current mirror ratio, or size of
the input transistors. The transconductance is usually the most important parameter, and it is fortunate that
it can be determined by several parameters. Automatic tuning circuits sometimes vary the bias current in
order to adjust the transconductance to the desired value.

The slew rate of the OTA is given by:

Notice the slew rate is larger than the slew rate of the differential amplifier. The increased slew rate comes
with the disadvantage of an increase in current which leads to an increase in power consumption. The
current drawn from the power supply (not including the bias current source) is given by:

1 1 1 1
1
2 2 2 2

The output resistance was provided earlier and is repeated below as:

||

The gain-bandwidth product is given by:

1

Another design consideration is noise. The noise performance is improved when the voltage gain of the
first stage is large. The voltage gain of the first stage is given by:

2
, , 2 ,
, 2
, 2 ,

The phase margin is a measure of stability for the amplifier. In most cases, the load capacitance is much
larger than the capacitance at the other nodes. When this is the case, the OTA has a dominant pole at the
output node and two non-dominant poles at the other two nodes. Due to the symmetric behavior at the input
stage, the amplifier also has a right half plane zero. For most symmetric OTA designs, the non-dominant
poles and zero are much larger than the gain-bandwidth product and degrade the phase margin by less than
10º each. This gives a typical phase margin of greater than 60º. The transfer function of the OTA is given
by:

where p1 is the dominant pole located at the output node:

1

p2 is the non-dominant pole located at nodes A1 and A2:

1 ,

p3 is the non-dominant pole located at node B:

1

z is the zero due to the pole-zero double formed by the symmetric input stage:
 2

The phase margin is given by:

180° tan tan tan tan

2

90° tan tan tan

2

The above design description shows that many performance figures are inversely related. For example,
increasing slew rate results in an increase in power dissipation.

Prelab

The prelab exercises are due at the beginning of the lab period. No late work is accepted.

Design the three current mirror OTA of Figure 7-4 to obtain the following specifications:

Gm 500 µA/V
Slew Rate > 10 V/µs
Load Capacitance 20 pF
Power < 1 mW (not including bias current source)
Power Supply VDD = -VSS = 0.9 V

Lab Report

1. Simulate the designs from the prelab, measure (include formulas used) and plot (use markers):

a) Transconductance versus frequency

b) Slew rate
c) Power consumption
d) Voltage gain versus frequency
e) Dominant pole frequency
f) Phase margin
g) Gain-bandwidth product

Use any analysis necessary to obtain the most accurate measurements. Include these results in the
lab report.

2. Create three cell views for your OTA. The symbol, schematic and layout. Layout your final design
and use good layout techniques and include the LVS report (again NetID and time stamp required
for credit). Indicate which transistors should be matched in your lab report. Extract the layout and
repeat the measurements from part 1. Be sure to include parasitic capacitances in the extraction.