EMC DESIGN GUIDELINES

Contents

power supply considerations . . . . . . . . . . . . . . . . . . . . 5

signal line considerations . . . . . . . . . . . . . . . . . . . . . . 5

PCB considerations . . . . . . . . . . . . . . . . . . . . . . . . . 6

component considerations . . . . . . . . . . . . . . . . . . . . . . . 8

EMC specific components . . . . . . . . . . . . . . . . . . . . . . 9

inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

common mode chokes . . . . . . . . . . . . . . . . . . . . . . . . 10

transformers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

network isolators . . . . . . . . . . . . . . . . . . . . . . . . . . 12

isolated interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . 12

isolated DC-DC converters . . . . . . . . . . . . . . . . . . . . . . 13

conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

pre-compliance testing
conducted line emissions of DC supplied circuits . . . . . . . . . . 13

pre-compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

standard test method . . . . . . . . . . . . . . . . . . . . . . . . 14

shielding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

DC target circuit under test . . . . . . . . . . . . . . . . . . . . . 14

circuit conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

resolution bandwidth and spectra obtained . . . . . . . . . . . . 16

spectra detection method . . . . . . . . . . . . . . . . . . . . . . 17

EMC Design Guidelines 3

EMC DESIGN GUIDELINES
Contents

using the emissions spectra

information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

relevant standards . . . . . . . . . . . . . . . . . . . . . . . . . 18

abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4
 EMC DESIGN GUIDELINES
Power Supply Considerations

The EC (European Community) regulations

regarding electromagnetic compatibility
(EMC) affect many aspects of circuit and VCC
system design. However, there are many
considerations that can be applied generally
CCT1
to reduce both the emissions from and sus- PSU CCT2
ceptibility to, electromagnetic interference
(EMI).
GND
As a manufacturer of electronic components,
VCC
Newport Components is committed to min-
imising emissions from its own components
and to helping its customers achieve EMC CCT1
PSU
compliance by correct component choice CCT2

and design. To this end Newport Components

have compiled the following list of general GND
design considerations.

power supply considerations Figure 1 : Eliminate Loops in Supply Lines

Eliminate loops in supply lines (see
figure 1).
Decouple supply lines at local boundaries VCC
(use RCL filters with low Q, see figure 2).
Place high speed sections close to the
power line input, slowest section furthest
away (reduces power plane transients,
see figure 3).
Isolate individual systems where possible
CCT1 CCT2
(especially analogue and digital sys-
tems) on both power supply and signal
lines (see figure 4).

signal line considerations

Use low pass filters on signal lines to GND
reduce bandwidth to signal minimum.
Keep feed and return loops close on
wide bandwidth signal lines. Figure 2 : Decouple Supply Lines at Local
Boundaries
Terminate lines carrying HF or RF signals

EMC Design Guidelines 5

EMC DESIGN GUIDELINES
PCB Considerations

correctly (this minimises reflection,

ringing and overshoot, see figure 5).
LOW SPEED
LOCAL HIGH MEDIUM CIRCUIT Terminate lines carrying signals exter-
PSU SPEED SPEED
FILTER CIRCUIT CIRCUIT
nal to a board at the board edge, avoid
DC
CIRCUIT lead terminations within the board and
loose leads crossing the board.
Avoid cabling or tracking which is close
Figure 3 : Place High Speed Circuits Close to to the quarter wavelength of the signal
PSU frequency, this can produce resonance
within the signal conductor.
Track all signals on the board, avoid
VCC
’flying leads’ across the board.
Minimise rise and fall times on signal
and clock edges (sharp edges produce
wide hf spectra), slew rate limiting also
DC DC
CCT1 CCT2 reduces crosstalk (see figure 6).
DC DC

PCB considerations
GND Avoid slit apertures in PCB layout, par-
ticularly in ground planes or near cur-
rent paths.
Figure 4 : Isolate Individual Systems
Areas of high impedance give rise to
high EMI, use wide tracks for power
lines on the trace side.
Terminating Circuit Make signal tracks stripline and include
a ground plane and power plane
whenever possible.
ZO ZT Keep HF and RF tracks as short as
Signal Line
possible, lay out the HF tracks first (see
figure 7).
Avoid track stubs, these cause reflec-
D Z I ZO - ZT I tion and harmonics (see figure 8).
Reflection Coefficient t = =
S Z I ZO + ZT I
On sensitive components and termina-
tions use surrounding guard ring and
ground fill where possible (see figure 9).
Figure 5 : Terminate Signal lines Correctly
A guard ring around trace layers re-
duces emission out of the board, only

6
 EMC DESIGN GUIDELINES
PCB Considerations

Figure 6 : Use Slow Rise & Fall Times

connect to ground at single point and

make no other use of the guard ring
(i.e. do not use to carry ground return
from a circuit).
Avoid overlapping power planes, keep
separate over common ground (reduces
system noise and power coupling, see
figure 10). Figure 7 : Keep HF Tracks Short
Power plane conductivity should be
high, therefore avoid localised con-
centrations of via and through hole
pads (surface mount is the preferred
assembly technology)
Track mitring (bevelling the edges at
corners) reduces field concentration
(see figure 11).
If possible make tracking run ortho- Figure 8 : Avoid Track Stubs
gonally between adjacent layers (see
figure 12).

EMC Design Guidelines 7

EMC DESIGN GUIDELINES
Component Considerations

Ground Fill on Trace Side Guard Ring Guard Ring on Trace Side

Figure 9 : Use Guard Ring & Ground Fill

Do not loop tracks, even between lay-

ers, this forms a receiving or radiating
antennae.

VEE VEE VDD

Do not leave any floating conductor
VDD
areas, these act as EMI radiators, if
possible connect to ground plane
(often these sections are placed for
Figure 10 : Avoid Overlapping Power Planes thermal dissipation, hence polarity
should be unimportant but check com-
ponent data sheet, see figure 13).

component considerations
Locate biasing and pull up/down com-
ponents close to driver/bias points.
Minimise output drive from clock
circuits.
Figure 11 : Mitre Track Corners Use common mode chokes between
current carrying and signal lines to
increase coupling and cancel stray
fields (see figure 14).
Decouple close to chip supply lines,
reduces component noise and power
line transients (see figure 15).
Use low impedance capacitors for
decoupling and bypassing (ceramic
multilayer types are preferred due to
Figure 12 : Orthogonal Tracking on Seperate high resonant frequency and stability).
Layers

8
 EMC DESIGN GUIDELINES
EMC Specific Components

Use discrete components for filters

where possible (surface mount is prefer-
able due to lower parasitics and aerial
effects of terminations on through hole
parts).
Ensure filtering of cables and over
voltage protection at the terminations
(this is especially true of cabling that is
external to the system, if possible all
external cabling should be isolated at
the equipment boundary).
Minimise capacitive loading on digital Figure 13 : Do Not Leave Floating
output by minimising fan-out, especially Conductive Areas
on CMOS ICs (this reduces current
loading and surge per IC).
If available, use shielding on fast
switching circuits, mains power supply
components and low power circuitry Signal Receiving
(shielding is expensive and should be
Circuit
a ’last resort’ option).

In general, keeping the bandwidth of all

parts of the system to a minimum and
Figure 14 : Use Common Mode Choke
isolating circuits where possible reduces
Between Signal Lines
susceptibility and emissions. Considerations
which are applicable to reducing noise levels
are equally applicable to EMC compliance, VCC
EMC compliant circuits should obviously ex-
hibit low noise levels.
GND

EMC specific components

As a supplier of isolator components, New-

port Components provide a range of parts
which can offer simple solutions to EMC
problems within an existing circuit. The
range of components Newport Components
produce which can be used for specific EMC Figure 15 : Decouple Close to IC Supply Lines
problems include transformer isolators,
digital isolators, isolated serial interfaces

EMC Design Guidelines 9

EMC DESIGN GUIDLINES
Inductors

and the more standard inductor and com- response of the load/driver needs to be
mon mode choke components. known, but can be matched by a relatively
simple and easily characterised RCL network.
inductors Another area where inductors can be used
with great benefit to the EMI of a circuit is in
The range of inductors available from New- an amplifier bias network (see figure 17). By
port Components are targeted mainly at the using an inductive element in the bias or
power market, and are useful for reducing compensation arms, a filter can be added to
EMI on power lines and for filtering high the circuit without loading the signal with
current signals. additional inductance. Careful choice of
In switched mode power supply (SMPS) inductance value is required and placement
circuits inductors for both the energy storage close to the amplifier is essential. This
and line filtering are available (see figure method is suitable for filtering HF noise,
16). It is recommended that a toroidal particularly on video and VHF/UHF TV type
inductor be used if EMC problems are signals.
suspected of being emitted from this circuit
function. Toroidal inductors maintain the common mode chokes
magnetic field within the core shape and
hence have virtually zero radiated field. The Common mode chokes are best employed
susceptibility of a toroid is also negligible in signal lines to eliminate common mode
due to the shape, since an applied magnetic noise or EMI on cables or induced in the
field would generate an equal and opposite signal tracks (see figure 14). The choke
current component in the wire (self cancelling). should be located as near to the driver/re-
ceiver circuit as possible, or at the entry point
At power sections of various circuit functions,
of a signal to a board. The choke works by
an inductor between the local supply and the
cancelling interference appearing on both
main feed provides good filtering of the
signal and return lines (i.e. induced EMI)
supply and reduces noise from localised
while allowing differential mode signals and
circuits in the system polluting the main
DC to pass.
power line (see figure 2). Since the inductor
here requires a relatively high DC current Suitable choice of inductance will also help
during its usual operation, axial inductors in maintaining a match to the characteristic
which have very a high saturation current are line impedance and acts as a filter to band-
recommended. Selection should be made width limit the termination.
on the current handling and relative switching
Any of Newport Components’ transformers
speed of the circuit section. Generally low
with a 1:1 ratio can be employed as a
values of inductance are preferred due to the
common mode signal choke. Newport
associated low DC resistance.
Components also have a portfolio of cus-
In systems with a reactive load or driver a tomer specific chokes and can design a
matched termination may be required using common mode choke for a customer’s circuit
a passive reactive circuit. The frequency application.

10
 EMC DESIGN GUIDELINES
Transformers

transformers
Energy Storage
Choke Filter Choke
The main EMC benefit of using a trans- VIN VOUT

former is in providing an isolation barrier L1 L2

between a signal line and the signal proc-
essing circuit (particularly where the signal IC1
line exits the board or system). This is true
C1 C2
of signals being driven or received, since
isolating the line reduces common mode
GND GND
noise and eliminates ground (or signal re- GND

turn) potential differences between systems.

F i g u r e 1 6 : Basic SMPS and Filter
One particular area where high noise im- Configuration
munity is essential is in thyristor/triac driving
circuits, where the transformer is providing
an isolation between a mains driven load LO
+VS
LP
and a logic based controller (see figure 18).
The isolating pulse transformer provides
much better noise immunity than an insulated RO CP
gate bipolar transistor (IGBT) due to inher- GND
OFFSET
ently lower coupling capacitance (typically Input Output
tens of pF for a pulse transformer compared NULL
to nF for power IGBT devices). The lower LP
CP
coupling capacitance improves the circuits
immunity for noise on the mains and from LN GND
--VS
the power switching device.
Figure 17 : Amplifier Filtering with Inductors

ZLOAD
Mains D1
T1
R1 IC1
120VAC, TR1
60Hz C1 C2 766YY/X

240VAC,
50Hz NTC
Thermistor

Figure 18 : Triac/Thyristor Firing Circuit

EMC Design Guidelines 11

EMC DESIGN GUIDELINES
Network Isolators

network isolators

Although there are several companies offer-

ing network isolating transformers, not
many will have considered the implications
the isolator itself may have on the EMI of the
complete circuit. The fact that the part is an
isolator in itself helps reduce common mode
EMI, however, there is also the potential to
further reduce the emissions from the host
circuit by careful design of the impedance
characteristic of the isolator (see figure 19).
Isolators with a sharp peak in their impedance
curve, particularly near the primary data rate
Figure 19 : Network Isolator Impedance of the network, can appear to the transmit
Analysis circuit as a sharply tuned resonant circuit.
Designing the isolator to have a gentle roll-
over in the impedance analysis produces a
NM485D NM485D much lower tuned transmit circuit, this has
Serial Data Line
the advantage of lowering the EMI as there
LOGIC V LOGIC is no ’natural’ resonant tuned circuit to
EIA-485 produce large transients, reflections or ring-
iCM
ing. The circuit can be seen as a natural
oscillator for the primary data rate, with a
sharply tuned circuit exhibiting overshoot,
whereas with gentle roll-off critical damping
will minimise the generated EMI.
Figure 20 : Isolated EIA-485 Interface

isolated interfaces
The main benefit to the EMC of using an
isolated interface is the reduction of ground
LIN LO1
+VIN +VO potential variation and the elimination of
DC
ISO ground loops between interfaced equipment
DC
GND (see figure 20). If the serial line is isolated at
GND LO2 --VO both ends of the cable, common mode noise
is also significantly reduced, this can be
further enhanced by using a differential serial
protocol, such as EIA-485.
Figure 21 : Filtering a DC-DC Converter
Although often used for long distance data
transmission in a distributed network, the

12
 EMC DESIGN GUIDELINES
Isolated DC-DC Converters

isolated interface can also be a good solution CE certification first time. They should give a
to EMI problems in a localised situation with designer more confidence in their circuits
motorised and rotating electrical mecha- ability to meet the EC directive and offer
nisms (e.g. photocopiers). Data isolators for good advice for low noise circuitry.
logic lines are also an effective way to reduce
noise from digital processing sections
pre-compliance testing conducted
affecting analogue, communication and
other peripheral functions (e.g. disk interface). line emissions of dc supplied circuits
Power supply (PSU) designers should be well
isolated DC-DC converters aware by now of the requirement of their
power supply to provide clean DC voltage
An isolated DC-DC converter can provide a to the target circuit and not to disturb the ac
significant benefit to reducing susceptibility mains voltage. However, often the PSU
and conducted emission due to isolating designer may have no idea of the noise that
both power rail and ground from the system can potentially to be introduced by the target
supply (see figure 4). The range of DC-DC circuit, likewise the DC circuit designer
converters available from Newport Compo- (digital or analogue) may not be aware of
nents all utilise toroidal power transformers the requirements of the PSU as far as accept-
and as such have negligible EMI radiation able noise levels are concerned.
(they also incorporate the recommended
PCB layout suggestions internally where The aim of this section is to bridge this gap,
possible). to provide a method for testing the DC circuit
in isolation from its final PSU and enable
Isolated DC-DC converters are switching either additional filtering to be specified, or
devices and as such have a characteristic PSU immunity to conducted noise to be
switching frequency which may need some requested. Either way it enables the two
additional filtering (see figure 21). Some designers to work towards a common goal;
commercial converters offer a pulse skip- CE certification of the final product.
ping technique, which although offering a
flat efficiency response gives a very wide
pre-compliance
spectral range of noise, since it does not
have a fixed characteristic frequency. There are no specified EMC limit lines for DC
Newport Components devices feature a rails, hence there are no specified tests in the
fixed frequency converter stage which is EC or CENELEC regulations that can be
stable across its full loading and tempera- applied directly. Likewise the PSU and the
ture curve, hence it is very easy to filter the DC supplied circuit could only be considered
switching noise using a single series inductor. as sub-systems at best, possibly even com-
ponents, consequently on their own they are
conclusion exempt from the EC directive. The tests con-
ducted can therefore only be considered as
The above recommendations, if followed, pre-compliance tests, the end system would
should allow completed systems to achieve have to be fully compliance tested for full CE

EMC Design Guidelines 13

EMC DESIGN GUIDELINES
Standard Test Method

certification. However, if the system is to be and the noise measured on each of the
certified via the Technical Construction File power lines.
(TCF) route, the individual pre-compliance
tests may be used as part of the TCF.
shielding

At all times the DC powered circuit under test

standard test method
(CUT), LISN and all cables connecting any
measurement equipment, loads and supply
Having no EN standard relies on the user to
lines should be shielded. The shielding is to
implement the closest equivalent test standard
prevent possible pick-up on cables and the
to the existing EMC regulations for mains
CUT from external EMC sources (e.g. other
borne emissions. One of the first problems
equipment close by, radiated emissions from
with a DC supply is removing the test PSU
the PSU etc). The shielding is again refer-
noise from the target circuit noise while per-
enced to mains earth.
forming the test (assuming the test PSU is not
the same as the final system PSU). When measuring small circuits or individual
components, the whole part can often be
The removal of line noise is performed on fitted into a metal enclosure for testing. All
AC mains connected systems using a line
power and test entry points should be via
impedance stabilisation network (LISN) on
shielded connectors, preferably high frequency
both live and neutral lines and referenced to
BNC types. The LISN should be shielded and
the mains earth as a ground plane. This has
external to the enclosure containing the test
been directly copied for the testing of DC
circuit (see figure 23). At Newport Components
supplied circuits, using any DC PSU with an
we have managed to construct a completely
earth terminal, both the positive and ground
shielded test set up in a small bench-top
(or 0V) lines are filtered with a LISN refer-
case, requiring only a PSU and spectrum
enced to the mains earth terminal. Each LISN
analyzer to complete a DC supply pre-com-
is constructed in accordance with CISPR 16
pliance EMC evaluation test set.
for 50 /50 H line impedance (see figure 22).

There are other reasons for using the mains DC target circuit under test
earth as a reference than just the ability to
relate the test to the standard EN specifica- There are innumerable circuit configurations
tions, in many systems the mains earth will that could be used as a test circuit for an
in fact be the case ground plane. If it is example, however, it was decided instead to
known that the 0V line is the ground plane use a board level DC-DC converter with a
reference the earth reference can be con- resistive output load. Board level DC-DC
nected to the 0V line at the supply, with both converters are a common place item on
LISNs still on the DC supply lines (the LISN many PC boards, instrumentation and
on the 0V line should still be connected as processing equipment. The advantage of
this gives an indication of likely ground line using a DC-DC converter here is that it has
noise). Circuits supplied with multiple DC a known characteristic switching frequency
lines will require a LISN on each power feed (see figure 24), hence a stable well behaved

14
 EMC DESIGN GUIDELINES
DC Target Circuit Under Test

noise spectrum can be obtained easily and

the vagaries of the actual circuit functionality
Circuit
can be circumvented. Under
DC Test
L1, 50 H
The DC-DC converter used was an Supply (CUT)

NMS1212, 12V input, 12V dual output device

delivering a total 2W of power with a typical C1 C2
characteristic switching frequency of 35kHz. 1 F 0.1 F

This device has a number of line spectra

Earth Spectrum
below the EC EMC lower limit for conducted R1, 1K0
Analyzer
emissions (150kHz), but no sub-harmonics
below its fundamental switching frequency.
Figure 22 : CISPR16 LISN Circuit

POWER SUPPLY
50
Termination

-- LISN
LOAD
DC
DC

+ LISN

To Spectrum Anaylser

Figure 23 : Test Set-Up

Figure 24 : Switching Spectra of NMS1212

EMC Design Guidelines 15

EMC DESIGN GUIDELINES
Circuit Conditions

circuit conditions
To ensure that worst case conditions, as far
as EMC is concerned, are applied to the CUT
it is necessary to have some knowledge of
the circuit operation, hence it is usually best
specified by the CUT designer.
In the case of the NMS DC-DC converter,
worst case is at full load (i.e. 2W output) with
maximum input voltage (see figure 25),
although the input voltage actually had a
Figure 25 : Input Voltage Effect on Switching minimal effect within its allowed tolerance.
Frequency Other worst case conditions may be difficult
to apply (e.g. high temperature, see figure
26) due to the nature of the test environment,
however, some gauge of how these may
effect the EMC performance should be con-
sidered.
Where circuit loading conditions and their
effect on EMC are not known, tests can be
done in-situ on the CUT prior to the pre-
compliance test.

resolution bandwidth and spectra

obtained
Figure 26 : Temperature Effect on Switching
Frequency One of the first problems may be to decide

Figure 27 : NMS1212 Spectra with 9kHz RBW

16
 EMC DESIGN GUIDELINES
Spectra Detection Method

on the resolution required for the pre-com- hence more than 200 additional lines could
pliance tests. To maintain compatibility with be added or subtracted from the spectra.
the EC directive for mains emissions, a 9kHz Overall the envelope tends to remain fairly
resolution bandwidth (RBW) should be used constant, hence by simple widening the RBW
for conducted line measurements. In circuits to 120kHz gives the envelope function and
with only a few line emissions this may be not the individual line spectra (see figure 28).
suitable, however, with analogue processing The information is now easier to use and
circuits or asynchronous logic there are likely understand and possible variations should
to be some wideband spectra. It is also be encompassed by this envelope.
possible that individual line spectra may
Widening the RBW should only be done in
change with loading conditions but within a
situations where there is wideband noise or
predefined envelope, hence widening the
a large number of closely related individual
RBW can encompass this envelope.
spectra. Most circuits will be able to use a
If we consider the NMS again, as a square 9kHz RBW. It should also be noted that when
wave quasi-resonant converter there are two using a spectrum analyzer the effective noise
main switching peaks, one at the resonant floor is raised when the RBW is widened,
frequency (35kHz) and another at twice the hence the lower level noise can be swamped
resonant frequency (reflected full wave rec- out by this effect. It is always worth trying the
tification, see figure 24). There are also narrowest RBW first then widening as and
harmonics of these across the whole emis- when necessary.
sions spectra (falling significantly at 5MHz,
see figure 27). In the frequency range of spectra detection method
interest there are therefore 853 individual
line spectra if resolved at 9kHz RBW, vari- There are essentially three methods of meas-
ation in tolerance of components, input uring conducted line spectra; peak detection,
voltage accuracy and loading could change average detection and quasi-peak detec-
the operating frequency by as much as 20%, tion. Peak detection is the instantaneous

Figure 28 : NMS1212 Spectra with 120kHz RBW

EMC Design Guidelines 17

EMC DESIGN GUIDELINES
Using the Emissions Spectra Information

measurement of the signal, this is essentially these should be examinable on the circuit
best for continuous wave spectra and ’snap- while still in the pre-production or design
shots’ of the emissions. Average detection stages.
measures the average over a time period,
Filtering may be the lowest cost option of
this can be achieved by reducing the video
getting the circuit through pre-compliance. If
bandwidth of the spectrum analyzer to less
redesign represents a major investment in time
than the RBW. Quasi-peak detection is
and money, simply adding a capacitor and
designed to simulate a subjective human
inductor to the input line may only add minimal
type response to a pulse type interference.
cost and drop the noise by 20dB at the problem
Quasi-peak weights rise and fall times of the
frequency. Alternatively you may even have to
signal to produce a given level.
specify to the PSU designer that the PSU must
A continuous wave signal would be identical give a specified noise rejection, 20dB to noise
with all three detection methods, infrequent below 1MHz for example.
pulsed interference would be higher via a
The standard EMC limit lines can be placed
quasi-peak detection and lowest using peak
as overlays on the noise emissions to deter-
detection. It is up to the user to decide on the
mine what rejection the PSU requires. Often
most appropriate detection method for their
this is not quite as straight forward as it
circuit. If in doubt use the quasi-peak
sounds as PSU output capacitors and CUT
method. Here the spectra was produced by
input capacitors may result in a significantly
continuous pulses from the DC-DC con-
higher rejection than would be suggested by
verter, peak detection could have been used
simply using 50 noise sources (the PSU
but average detection was used as this gave
and CUT are unlikely to have 50 imped-
a cleaner envelope trace.
ance, or even matched impedances). As
stated previously, these tests are only pre-
using the emissions spectra compliance and further tests with the PSU
information and circuit in the target system will have to
be conducted prior to certifying the com-
There are several uses for the spectra ob- pleted product.
tained; the circuit could be redesigned or the
PCB layout changed to reduce the noise, relevant standards
there could be additional filtering added at
the PSU input to the DC circuit or the circuit The following are some of the relevant EMC
could prove to have so little noise as to standards applicable in various countries
require no changes. that the above design notes are intended to
address.
If considering redesign it is possible to
determine which of multiple layouts are the FCC 15J/SUB Part B
quietest or which components are quietest, VDE 0871
does filtering on the sensors or load points CISPR 22
reduce noise? Does noise get to the PSU EN 60555-2/3
from the logic, clock or interface circuits? All EC Directive 89/336/EEC

18
 EMC DESIGN GUIDELINES
Abbreviations

abbreviations
ANSI American National Standards Institute
BSI British Standards Institute
CE Certificate of EMC Compliance
CENELEC Comite European de Normalisation Electrotechnique
CISPR Comite International Special des Perturbations Radioelectriques
CSA Canadian Standards Authority
DEMKO Dansk Standard (Denmark)
DIN Deutsches Institut fur Normung (Germany)
DTI Department of Trade and Industry (UK)
EC European Community
EIA Electronic Industries Association
EN European Standard (Norme European)
EMC ElectroMagnetic Compatibility
EMI ElectroMagnetic Interference
ETSI European Telecommunications Standards Institute
FCC Federal Communications Commission (US)
HF High Frequency
IEC International Electrotechnical Commision
ISO International Organisation for Standardisation
ITU International Telecommunication Union
JISC Japanese Industrial Standards Committee
NSF Norges Standardiseringsforbund (Norway)
RF Radio Frequency
TCF Technical Construction File
SAA Standards Australia
SCC Standards Council of Canada
SFA Finnish Standards Association
SEMKO Svenska Elektviska Kommissionen (Sweden)
UHF Ultra High Frequency
UL Underwriters Laboratory (USA)
UNI Ente azionale Italiano di Unificazione (Italy)
VDE Verband Deutsche Electrotechniker (Germany)
VHF Very High Frequency