Module Fpga Verification Session2 Code Coverage Rsalemi
Module Fpga Verification Session2 Code Coverage Rsalemi
Code Coverage
Ray Salemi
Application Engineer Consultant
[email protected]
www.verificationacademy.com
Overview
Functional Coverage
Automatic Stimulus
Self-Checking Testbench
Transactions
Assertions
Test Planning
Code Coverage
Code Coverage
• Code coverage is an
automated technique
that identifies code that
hasn’t been tested
Code coverage is automated and easy!
• Statement
• Where all statements executed?
• Branch
• Did all branches exercised?
• Condition
• Did we take all branches for all reasons?
• Expression
• Where sub-expressions of a concurrent assignment tested?
• Finite State Machine
• Where all states and transitions visited?
The TinyCache State-Machine Example Design
of code coverage
Case
current_state
RESET HIT WRITE MISS OTHERS
F
(cpuwait_int=‘1’) next_state <= HIT;
F
T (cpuwait_wr=‘1’)
T
next_state <= MISS; next_state <= HIT;
End Case
END
Statement Coverage
• A statement is a line of
code that ends in a
semicolon
• e.g., assignments, task calls,
procedure calls
Statement Coverage Report Example
Branch Coverage
(cpuwait_int = ‘1’)
MISS
RESET
HIT
WRITE
(cpu_wr = ‘1’)
Finite State Machine Coverage Report Example
Toggle Coverage
• Default Exclusion
- Some simulators, such as ModelSim, have the option to automatically
exclude all default and OTHERS alternatives in case statements
• No metric is perfect
• In this session we
• Discussed the use of code coverage
- An easy, automated, measurable metric to help assess
the Verification Complete milestone
• FPGA Simulation
Ray Salemi,
Boston Light Press,
March 2, 2009
www.fpgasimulation.com
Evolving FPGA Verification Capabilities
Code Coverage
Ray Salemi
Application Engineer Consultant
[email protected]
www.verificationacademy.com