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Bus Arbitration 1

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39 views12 pages

Bus Arbitration 1

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Dhiman1001
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Lecture-35

Bus Arbitration
Introduction
• Bus Arbitration refers to the process by which the current
bus master accesses and then leaves the control of the
bus and passes it to the another bus requesting processor
unit. The controller that has access to a bus at an instance
is known as Bus master.
• A conflict may arise if the number of DMA controllers or
other controllers or processors try to access the common
bus at the same time, but access can be given to only
one of those. Only one processor or controller can be Bus
master at the same point of time. To resolve these
conflicts, Bus Arbitration procedure is implemented
to coordinate the activities of all devices requesting
memory transfers. The selection of the bus master must
take into account the needs of various devices by
establishing a priority system for gaining access to the bus.
The Bus Arbiter decides who would become current bus
master.
The key terms
❑A device that initiates data transfers on the bus at
any given time is called a bus master.
❑In a computer system, there may be more than
one bus master such as a DMA controller or a
processor etc.
❑These devices share the system bus and when a
current master bus relinquishes another bus can
acquire the control of the processor.
❑Bus arbitration is a process by which next device
becomes the bus controller by transferring bus
mastership to another bus.
Types
Two approaches to bus arbitration:

1. Centralized bus arbitration – A single bus arbiter performs


the required arbitration.
There are three approaches for centralized arbitration
a) Daisy Chaining
b) Polling or Rotating Priority
c) Fixed Priority or Independent Request

2. Distributed bus arbitration – All devices participate in the


selection of the next bus master.
Daisy Chaining
The daisy-chaining method involves connecting all the devices that
can request an interrupt in a serial manner. This configuration is
governed by the priority of the devices. The device with the highest
priority is placed first followed by the second highest priority device
and so on.
Advantages and Disadvantages
Advantages
▪ Simplicity and Scalability.
▪ The user can add more devices anywhere along the chain, up
to a certain maximum value.

Disadvantages
▪ The value of priority assigned to a device is depends on the
position of master bus.
▪ Propagation delay is arises in this method.
▪ If one device fails then entire system will stop working.
Polling or Rotating Priority method
In this method, the devices are assigned unique priorities and
complete to access the bus, but the priorities are dynamically
changed to give every device an opportunity to access the
bus.
Advantages and Disadvantages
Advantages –
▪ This method does not favor any particular device and
processor.
▪ The method is also quite simple.

Disadvantages –
▪ Adding bus masters is difficult as increases the number of
address lines of the circuit.
▪ If one device fails then entire system will not stop working.
Fixed priority or
Independent Request method
In this scheme, each bus has its own bus request and a grant.
The built-in priority decoder selects the highest priority requests
and asserts the system. The bus control passes from one device
to another only through the centralized bus arbiter.
Advantages and Disadvantages
Advantages –
▪ This method generates fast response.

Disadvantages –
▪ Hardware cost is high as large no. of control lines are required.
Distributed Arbitration
Here, all the devices participate in the selection of the next bus master.
Each device on the bus is assigned a 4 bit identification number.
When one or more devices request control of the bus, they assert the
start arbitration signal and place their 4-bit identification numbers on
arbitration lines through ARB3.
Each device compares the code and changes its bit position
accordingly.
It does so by placing a 0 at the input of their drive.
The distributed arbitration is highly reliable because the bus operations
are not dependant on devices.
References
Computer System Architecture, M.mano
Computer Architecture , N. Carter

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