AN-750 Application Note: ADE7758 Phase Dropout Detection For VAR Calculation

AN-750
APPLICATION NOTE
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • Tel: 781/329-4700 • Fax: 781/326-8703 • www.analog.com
ADE7758 Phase Dropout Detection for VAR Calculation

by Rachel Kaplan
INTRODUCTION phase-shift filter has a nonunity magnitude response, a

The ADE7758 is a polyphase, multifunction energy compensation based on line frequency is implemented
metering IC that performs kWh, kVAh, kVARh, and rms to achieve accurate reactive power calculation around
current and rms voltage measurements. This application fundamental frequency.
note describes how phase dropout affects VAR calcula- 5
tion in the ADE7758, the solution to detect phase dropout
with the ADE7758, and how to avoid VAR errors. 4
PHASE DROPOUT AND THE ADE7758 3
MAGNITUDE (dB)
The ADE7758 measures the line frequency of one phase
at a time. If a phase drops out, the line frequency 2
measurement on that phase can be incorrect due to
offset or noise causing erroneous zero-crossing detection. 1
Compensation for reactive power calculation is based
on the line frequency measurement of one phase. If the 0
phase used for frequency measurement drops out, this
can induce error to the reactive power calculation of the –1
40 45 50 55 60 65 70
other phases. To solve this problem, the meter needs FREQUENCY (Hz)
to detect the phase dropout and switch the frequency
Figure 1. Magnitude Response
measurement to an active phase. The phase used for
89.80
frequency measurement can be changed using Bit 0 to
Bit 1 in the measurement mode register (MMODE [7:0],
89.85
Address 0x14). Table I shows the setting of the two
bits, MMODE [1: 0] , for dif ferent phase frequency
89.90
measurement.
PHASE (Degrees)
Table I. Phase Selection for Frequency Measurement 89.95
MMODE [1] MMODE [0] Phase

90.00
0 0 A
0 1 B 90.05
1 0 C
90.10
40 45 50 55 60 65 70
FREQUENCY (Hz)
VAR CALCULATION Figure 2. Phase Response
Reactive power is defined as the product of the voltage
and current waveforms when one of these signals is ZERO-CROSSING TIMEOUT
phase shifted by 90°. There is a phase-shift filter in the The ADE7758 measures the line frequency using zero-
ADE7758 that introduces a 90° phase shift in the current crossing detection circuits. Refer to the Zero-Crossing
channel of the reactive energy datapath. The magnitude Detection section in the data sheet for more details
and phase response of the phase-shift filter is shown about zero-crossing detection.
in Figure 1 and Figure 2, respectively. Because the
REV. 0
AN-750
The ADE7758 has a zero-crossing timeout interrupt for is set to 6, the SAG event is recorded at the end of the
each phase. If no zero crossing is detected for a time sixth half cycle. In conjunction with ZXTOUT, SAG can be
period determined by the zero-crossing timeout regis- used to detect when a phase has dropped out.
ter (ZXTOUT [15:0], Address 0x1B), the corresponding
zero-crossing timeout detection bit in the interrupt status VAP, VBP, OR VCP
register (STATUS [23:0], Address 0x19) is set. An active FULL-SCALE
low on the IRQ output also appears if the corresponding

SAGLVL[7:0]
bit in the interrupt mask register (MASK [23:0], Address
0x18) is set. Figure 3 shows the mechanism of the zero-
crossing timeout detection when the line voltage of
Phase A stays at a fixed dc level for more than 384/CLKIN 
ZXTOUT seconds. Ideally, if one phase drops out, no zero
crossing is detected for this phase and the zero-crossing SAGCYC[7:0] = 0x06
6 HALF CYCLES
timeout bit of the corresponding phase is set in the sta-

SAG EVENT RESET
tus register after 384/CLKIN  ZXTOUT seconds. However, LOW WHEN VOLTAGE
SAG INTERRUPT FLAG CHANNEL EXCEEDS
noise due to possible channel offset may cause the part (BIT 3 TO BIT 5 OF SAGLVL[7:0]
STATUS REGISTER)
to continue detecting zero crossing during phase dropout.
Thus, no zero-crossing timeout request is generated. SAG
READ RSTATUS
detection can be used in this case to detect if the phase REGISTER
has dropped out. Figure 4. Voltage SAG Detection
Note that the zero - crossing detection signal is used
for the line - cycle accumulation mode, zero - crossing SOLUTION
interrupt, and zero-crossing timeout interrupt. Thus, in There are two solutions for phase dropout detection.
phase dropout condition, the part should not use the
1. Use the combination of zero-crossing timeout interrupt
dropped phase for zero-crossing detection.
and voltage SAG interrupt.
16-BIT INTERNAL
REGISTER VALUE Set the ZXTOUT register to a small value that satisfies
ZXTOUT[15:0] the following equation: 384/CLKIN  ZXTOUT > 1/2f,
where f is the line frequency. Set the ZXTO bits in the
MASK register. If a phase drops out, an interrupt
should occur after the time specified by the ZXTOUT
register has elapsed. However, as mentioned previ-
ously, noise and offset on the voltage channel may
VOLTAGE cause the part to continue detecting zero crossing.
CHANNEL A
Therefore, no ZXTOUT interrupt is generated. In this
situation, SAG can be used to detect the phase
dropout condition. If the SAG bits in the MASK
ZXTOA
DETECTION BIT register are also set and SAGLVL is set to a value
that is larger than possible noise, an interrupt occurs
READ after the number of half line cycles specified by the
RSTATUS
SAGCYC register. The SAGCYC register should be
Figure 3. Zero-Crossing Timeout Detection set to a very small value for the part to detect the
phase dropout promptly. Once the interrupt occurs
SAG DETECTION from either SAG or ZXTOUT, read the reset interrupt
The ADE7758 can also detect voltage SAG. When the abso- status register (RSTATUS [19:0], Address 0x1A) and
lute value of the line voltage of any phase drops below check the SAG and ZXTO bits to determine which
a peak value set by the SAG level register (SAGLVL [7: 0], phase has dropped out. Then switch the frequency
Address 0x1E) for a number of half cycles set by the SAG measurement to an active phase by changing Bit 0 to
line cycle register (SAGCYC [7:0], Address 0x1D), the Bit 1 in MMODE register. Since zero-crossing detec-
corresponding bit in the status register is set. An active tion is used for other measurement, the part should
low on the IRQ output pin also appears if the correspond- exclude the dropped phases from zero-crossing detec-
ing bit in the MASK register is set. Figure 4 shows a line tion. The phases used for counting the number of
voltage falling below the threshold set in the SAGLVL zero crossings is selected by Bit 3 to Bit 5 in the line-
register for nine half cycles. Since the SAGCYC register cycle accumulation mode register (LCYCMODE [7:0],
Address 0x17). Bit 3, Bit 4, and Bit 5 select Phase A,
Phase B, and Phase C, respectively.
–2– REV. 0
AN-750
The steps to implement this phase dropout detection 2. Monitor the voltage rms value.
method are outlined as follows:
We can read voltage rms registers periodically.
• Set ZXTOUT register, i.e., 0x12C(300d) for CLKIN of When a phase drops out, the voltage rms register
10 MHz and line frequency of 50 Hz. value of that phase is very small. If the phase used
• Set SAGCYC register to a small value, i.e., 0x05. for frequency measurement drops out, change the
frequency measurement to an active phase by setting
• Set SAGLVL to a value larger than possible noise but
the MMODE register according to Table I. However,
smaller than the lowest expected value during normal
this method is not recommended because continuously
operation, i.e., half full-scale value.
reading the voltage rms register may use a lot of system
• Set Bit 3 to Bit 8 in the MASK register to enable SAG resources and power consumption.
and ZXTO interrupts for all three phases.
• When an interrupt is detected, read the reset interrupt
status register (RSTATUS [19:0], Address 0x1A) to
find out which phase drops out by looking at the SAG
and ZXTO bits.
• Switch the frequency measurement to an active
phase by setting the MMODE register according to
Table I.
• Exclude the dropped phase from zero - crossing
detection by changing Bit 3 to Bit 5 in the LCYCMODE
register.
REV. 0 –3–
AN05137–0–1/05(0)
© 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.
–4–

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AN-750

ADE7758 Phase Dropout Detection for VAR Calculation

INTRODUCTION phase-shift filter has a nonunity magnitude response, a

PHASE DROPOUT AND THE ADE7758 3

Table I. Phase Selection for Frequency Measurement 89.95

MMODE [1] MMODE [0] Phase

register (STATUS [23:0], Address 0x19) is set. An active FULL-SCALE

low on the IRQ output also appears if the corresponding

timeout bit of the corresponding phase is set in the sta-

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