Module #03 - Data Types
Module #03 - Data Types
3.2. Wire:
- Represents a physical wire in a circuit and is used to connect gates or modules.
- A value of a wire can be read but not assigned to, in a procedural block or in a function
- A wire does not store its value
- Must be driven by a continuous assignment statement
Example 3.1:
Syntax:
wire a; //simple 1 wire
wire b;
wire wire_variable_scaler;
wire c;
wire [MSB : LSB] wire_variable_vector;
wire [7:0] data; // A cable of 8 wires
assign c = a & b;
3.3. Reg:
- Declare type reg for all data objects on the left hand side of expressions in procedural
blocks (initial and always) and functions.
- Reg data type must be used for latches, flip-flops and memories
3.5. Integer:
- Integers are general purpose variables.
- They are mainly used for loop indices, parameters, and constants
- Implicitly they are type of reg but they store data as signed numbers however
explicitly declared reg types store data as unsigned
- Default size is 32 bits
- If they hold constants, during synthesis, synthesizer adjusts them to the minimum
width needed at compilation
3.7. Time:
- A 64-bits quantity that can be used in conjunction with the $time system task to hold
simulation time
- Time is not used for synthesis (Not Synthesizable) and hence only used for simulation
3.8. Parameter:
- Parameters allows constants like word length to be defined symbolically in one place.
This makes it easy to change the word length later, by changing only the parameter