Computer Architecture and

Organization

• Course Code: BCSE205L

• Course Type: Theory (ETH)
• Slot: D2+TD2
• Timings:

Monday 16:00-16:50
Wednesday 17:00-17:50
Thursday 14:00-14:50
Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore
IAS Computer
Institute for Advanced Studies

Introduction:

• Virtually all-contemporary computers are based on concepts developed by John

von Neumann who designed the IAS computer.
• The IAS machine was the first electronic computer built at the Institute for
Advanced Study (IAS) in 1940 at Princeton University, New Jersey.
• It is sometimes called the von Neumann machine, since the paper describing its
design was edited by John von Neumann, a mathematics professor at both
Princeton University and IAS.

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

IAS Computer Institute for Advanced Studies
Introduction:

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

IAS Computer Institute for Advanced Studies
Introduction:

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

IAS-Memory format
• MEMORY: 4096 WORDS
• WORD LENGTH: 40 BITS
• STORED PROGRAM CONCEPT
• Data Word Format: First bit is represented by a sign bit and a 39 bit value.
• A word may contain two 20 bit instructions.
• EACH INSTRUCTION:
• an 8 bit operation code (opcode) specifying the operation to be performed
• a 12 bit address designating one of the words in memory (0 to 999)
Opcode: In computing, an opcode (abbreviated from operation code, also known as instruction machine code, instruction
code, instruction syllable, instruction parcel or opstring) is the portion of a machine language instruction that specifies the
operation to be performed. Simple opcodes include: ADD, SUB, MUL, DIV, MOV, ...

operand: In computing, an operand can refer to an element in a programming language. Depending on architecture, the
operands may be register values, values in the stack, other memory values, I/O ports (which may also be memory mapped),
etc., Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore
Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore
IAS Structure of IAS Machine
 Memory Address Register (MAR): Specifies the address in memory of the
word to be written from or read into the MBR.
 Instruction Register (IR): Contains the 8 bit opcode instruction being
executed.
 Instruction Buffer Register (IBR) :Employed to hold temporarily the right
hand instruction from a word in memory
 Program Counter (PC): Contains the address of the next instruction pair to
be fetched from memory
 Memory Buffer Register (MBR): Contains a word to be stored in memory or
sent to the I/O unit, or it is used to receive a word from memory or from the
I/O unit.
 Accumulator (AC) & Multiplier Quotient (MQ): Employed to hold
temporarily the output data. For eg. The result of multiplying two 40 bit
numbers is an 80 bit number, the most significant 40 bits are stored in the
AC and the least significant in the MQ.

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

Example of program execution First step is PC (Program counter) have content 300,
where 300 is first command from memory, after that
command will be change become hexadecimal in the
memory, so number 300 become 1940.
Number 1940 will be move in the CPU register in
the IR(instruction register).

Note: The PC contains 300, the address of the first

instruction. The instruction (the value 1940 in hex) is
loaded into IR and PC is incremented. This process
involves the use of MAR and MBR.

Program Execution example

(Contents of memory and registers in hexadecimal)
Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore
Example of program execution First step is PC (Program counter) have content 300, where 300 is first
command from memory, after that command will be change become
hexadecimal in the memory, so number 300 become 1940.
Number 1940 will be move in the CPU register in the IR(instruction
register).

In step 2 ac(temporary storage) have content 0003,

why ?,
because the last 3 digit is a 940 is 0003, and the
hexadecimal is 1940 so we using 940 because the
last 3 digit number from hexadecimal 1940 is 940
and 940 have content 0003.

Note:
• The first hexadecimal digit in IR indicates that the AC is to
be loaded.
• The remaining three hexadecimal digits specify the address
(940) from which data are to be loaded.

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

Example of program execution First step is PC (Program counter) have content 300, where 300 is first command from
memory, after that command will be change become hexadecimal in the memory, so
number 300 become 1940. Number 1940 will be move in the CPU register in the
IR(instruction register).

In step 2 ac(temporary storage) have content 0003, why ?,

because the last 3 digit is a 940 is 0003, and the hexadecimal is 1940 so we using
940 because the last 3 digit number from hexadecimal 1940 is 940 and 940 have
content 0003.

Step 3 actually almost same with step 1, pc have content

301 and change hexadecimal become 5941 and will be
move in cpu register the place is IR . the content pc is 301,
and the content from AC still 0003.

Note: The next instruction (5941) is fetched from location 301

and PC is incremented.

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

Example of program execution First step is PC (Program counter) have content 300, where 300 is first command from
memory, after that command will be change become hexadecimal in the memory, so
number 300 become 1940. Number 1940 will be move in the CPU register in the
IR(instruction register).
In step 2 ac(temporary storage) have content 0003, why ?,
because the last 3 digit is a 940 is 0003, and the hexadecimal is 1940 so we using 940
because the last 3 digit number from hexadecimal 1940 is 940 and 940 have content
0003.
Step 3 actually almost same with step 1, pc have content 301 and change hexadecimal
become 5941 and will be move in cpu register the place is IR . the content pc is 301,
and the content from AC still 0003.

Step 4, Pc have content 302 so the hexadecimal is 2941 but

the IR is still 5941, and Ac will be change become 0005 ?,
where we can find 0005 ?, 0005 is sum from hexadecimal
940 is 0003 and hexadecimal from 941 is 0002 so the result
is 0003 + 0002 = 0005.
Note: The old contents of AC and the contents of location 941
are added and the result is stored in the AC.

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

Example of program execution First step is PC (Program counter) have content 300, where 300 is first command from
memory, after that command will be change become hexadecimal in the memory, so
number 300 become 1940. Number 1940 will be move in the CPU register in the
IR(instruction register).
In step 2 ac(temporary storage) have content 0003, why ?,
because the last 3 digit is a 940 is 0003, and the hexadecimal is 1940 so we using 940
because the last 3 digit number from hexadecimal 1940 is 940 and 940 have content
0003.
Step 3 actually almost same with step 1, pc have content 301 and change hexadecimal
become 5941 and will be move in cpu register the place is IR . the content pc is 301,
and the content from AC still 0003.
Step 4, Pc have content 302 so the hexadecimal is 2941 but the IR is still 5941, and Ac
will be change become 0005 ?, where we can find 0005 ?, 0005 is sum from
hexadecimal 940 is 0003 and hexadecimal from 941 is 0002 so the result is 0003 + 0002
= 0005.

Step 5 is pc have content 302 after that hexadecimal is 2941

so move in IR, and AC is still 0005.

Note: The next instruction (2941) is fetched from

location 302 and the PC is incremented.

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

Example of program execution First step is PC (Program counter) have content 300, where 300 is first command from
memory, after that command will be change become hexadecimal in the memory, so
number 300 become 1940. Number 1940 will be move in the CPU register in the
IR(instruction register).
In step 2 ac(temporary storage) have content 0003, why ?,
because the last 3 digit is a 940 is 0003, and the hexadecimal is 1940 so we using 940
because the last 3 digit number from hexadecimal 1940 is 940 and 940 have content
0003.
Step 3 actually almost same with step 1, pc have content 301 and change hexadecimal
become 5941 and will be move in cpu register the place is IR . the content pc is 301,
and the content from AC still 0003.
Step 4, Pc have content 302 so the hexadecimal is 2941 but the IR is still 5941, and Ac
will be change become 0005 ?, where we can find 0005 ?, 0005 is sum from
hexadecimal 940 is 0003 and hexadecimal from 941 is 0002 so the result is 0003 + 0002
= 0005.
Step 5 is pc have content 302 after that hexadecimal is 2941 so move in IR, and AC is
still 0005.

Step 6, The last step is from CPU register we have content

pc is 303, AC is 0005, and IR is 2941, so from cpu register
have ac 0005 will be move in memory change hexadecimal
941 = 0002 become 941 = 0005.
Note: The contents of the AC are stored in location 941.
Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore
Instruction Representations
• Each instruction is represented by sequence of bits
• The instruction is divided into two fields
• Opcode field
• Operand field
• This operand field further divided into one to four fields.
• This layout of the instruction is known as the “Instruction Format”
• Simple instruction format

Operand Operand Result Next

Opcode
Address1 Address2 Address1 Instruction
CLASSIFICATION OF INSTRUCTIONS
Assembly language opcode
Meaning/use
mnemonics and instructions
INP (Input) Inputs a value, then stores the value in the accumulator
OUT (Output) Outputs the accumulator contents
STA (Store) Transfers a number from the accumulator to RAM
LDA (Load) Transfers a number from RAM to the accumulator
ADD (Add) Adds accumulator contents to the contents at a RAM address

SUB (Subtract) Subtracts accumulator contents from the contents at a RAM address

BRA (Branch) When looping, jumps to the RAM memory address

HLT (Halt/Stop/End) Stops the processor
DAT (Data definition) Variable definition

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

 IAS Computer AC MQ

MARPC
MBRM[MAR] Input/output
Arithmetic & Logic Circuits
IBRMBR<20..39> IBRMBR<20..39> Equipments
IRMBR<0..7> IRMBR<0..7>
MARMBR<8..19> MARMBR<8..19> MBR
MBRM[MAR] MBRAC
ACMBR M[MAR}MBR
IRIBR<0..7> IRIBR<0..7>
MARIBR<8..19> IBR PC
MBRM[MAR]
ACAC + MBR Main
PCPC+1 Memory
MARPC IR
MBRM[MAR] MAR

Control
Circuits
 Sample Instructions of IAS Computer
 IAS Computer Sample Symbolic
Instructions Symbolic Description Representation
Description
Representation

LOAD MQ AccMQ ADD M(X) Acc M(X) + Acc

ADD |(X)| Acc |M(X)| + Acc
LOAD MQ,M(X) MQM(x)
SUB M(X) AccAcc – M(X)
|SUB M(X)| AccAcc – | M(X) |
STOR M(X) M(x)Acc MUL M(X) Acc, MQ M(x) x MQ.
DIV M(X) Remainder :
LOAD M(X) AccM(x)
AccAcc \ M(X)
LOAD –M(X) Acc -M(x)
Quotient :
LOAD |M(X)| Acc|M(X)|
MQAcc \ M(X)
LOAD -|M(X)| Acc -|M(X)|
 IAS Computer Block Diagram AC MQ
 IAS Computer Sample z = x + y
Instructions
Input/output
 IAS Computer M(z) = M(x) + M(y) Arithmetic & Logic Circuits
Equipments
• Registers
• Block Diagram
1. Load M(x) Acc  M(x)
MBR
2. ADD M(y) Acc  Acc + M(y)

3. STOR M(z) M(z)  Acc

3. HALT
IBR PC

Main
Memory
IR
MAR

Control
Circuits
IAS Instruction set
IAS Instruction set (continued)
Problem
Write an appropriate assembly language code for the following operation and
interpret to Von Neumann IAS architecture
X=Y*Z
// Where Y->40 bit data and Z->40 bit data
Result would be more than 40 bit.
EXAMPLE ALP (IAS) X=Y*Z

Assume that data variables ‘Y’ & ‘Z’ available at memory locations 801 & 802 resly. And X
will be stored 803 onwards.
LOAD MQ, M(801) MQM[801]

MUL M(802) AcMQ * M[802]

STOR M(803) M[803]AC

Address values

LOAD MQ ACMQ 801 Y

802 Z
STOR M(804) M[804]AC
803 Result [msb]
804 Result [lsb]
Example Problems
Write an Assembly language programming for the following expressions using IAS
computer Instruction set and interpret to the flow of IAS computer
1. A=(B-C)*D
2. A=B*(C+D)

Make necessary assumptions.

 Practice Problems
Write an Assembly language programming for the following expressions using IAS computer
Instruction set and interpret to the flow of IAS computer
1. A=(B-C)*D
2. A=B*(C+D)
3. A=(B-C)/D
4. A=B/(C+D)
5. A=-(B+C-D)
6. A=(B*2)/2
Make necessary assumptions.
 Try it if you want to be champion
• Write an assembly language programming for the following code fragment and
Interpret to IAS computer flow of operations.
if(x=0)
c=a*b;
else
c=a/b;
Where
Data variables are avaible from loation address 500 onwards and program can be
stored at memory location 200 onwards.
Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore
Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore