A Simple Polysilicon Thin-Film Transistor SPICE Model

Pappas, I.; Hatzopoulos, A.T.; Tassis, D.H.; Arpatzanis, N.; Siskos, S.; Hatzopoulos, A.A.; Dimitriadis, C.A.;
Kamarinos, G.Microelectronics, 2006 25th International Conference on480-48314-17 May 2006
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1-4244-0117-8/06/$20.00 2006 IEEE
PROC. 25th INTERNATIONAL CONFERENCE ON MICROELECTRONICS (MIEL 2006), BELGRADE, SERBIA AND MONTENEGRO, 14-17 MAY, 2006
A Simple Polysilicon Thin-Film Transistor SPICE
Model
I. Pappas, A. T. Hatzopoulos, D. H. Tassis, N. Arpatzanis, S. Siskos,
A.A. Hatzopoulos, C. A. Dimitriadis and G. Kamarinos
Abstract A simple current-voltage model for polysilicon
thin-film transistors (TFTs) is proposed, including the sixth-order
polynomial function coefficients fitted to the effective mobility
versus gate voltage data, the channel length modulation and the
impact ionization effect. The model possesses continuity of
current in the transfer characteristics from weak to strong
inversion and in the output characteristics throughout the linear
and saturation regions of operation. It has been applied in a
number of long and short channel TFTs and the statistical
distributions of the model parameters involved have been derived.
The new model was adapted in the simulation program AIM-
SPICE, with the extracted parameters used as input parameters of
the new polysilicon TFT model.
I. INTRODUCTION
Polysilicon thin-film transistor (poly-Si TFT)
technology is emerging strongly in large area electronics
[1], such as display technology, memories and scanners.
The efficient and economic design of polysilicon TFT
integrated circuits depends to a great extent on the
simplicity and accuracy of the model available for the TFT
devices involved. In most of the proposed models, several
parameters are needed to reproduce the experimental output
characteristics or long computing time is required [2]-[7].
Relatively, there is a great interest for the development of
analytical models suitable for circuit simulation programs,
such as SPICE.
Recently, a simple analytical on-state drain current
model for polysilicon TFTs has been developed, based on
the carrier transport through latitudinal and longitudinal
grain boundaries [8]. From the experimental transfer
characteristics in the linear region, the experimental data of
the effective mobility versus gate voltage can be extracted.
By employing these data, the output characteristics can be
successfully reproduced over wide range of bias voltages in
devices with different gate length [9]. In this work, the
current-voltage model has been applied in a number of long
channel and short channel polysilicon TFTs and the
statistical distribution of the model parameters are derived.
The new polysilicon TFT model was adapted in the
circuits simulation program AIM-SPICE. The extracted
parameters are used as input parameters and their measured
values are used as default values of the new TFT model. In
order to verify the feasibility of the new model in the AIM-
SPICE, the input and output characteristics of the
fabricated TFTs were reproduced through simulation.
II. POLYSILICON TFT I-V MODEL
The drain current in the linear region of a polysilicon
TFT can be expressed by the equation:
( )
d eff ox g inv d
W
I C V V V
L
= (1)
where W is the channel width, L is the channel length, C
ox
is the gate capacitance per unit area, V
g
is the gate voltage,
V
d
is the drain voltage and V
inv
is the charge inversion
voltage corresponding to the gate voltage at which the
onset of the channel conductance is observed in the transfer
characteristic. Considering carrier transport through
latitudinal and longitudinal grain boundaries, the effective
carrier mobility
eff
is [8]:
//
1 exp
gi gb
eff gb
b g
g
L
qV w L
L w kT

= +
| |
+
|

\ .
(2)
where
gi
is the mobility for a carrier within the grain
region, w is the width of the depletion region at the grain
boundary which is dependent on the grain boundary
potential barrier height V
b
, L
gb
is the effective grain
boundary width fixed at the value 2 nm, L
g
is the average
grain size of the polysilicon layer and
gb//
is the mobility
for a carrier passing along a grain boundary. The
dependence of the potential barrier height at the grain
boundary V
b
on V
g
is modeled as [8]:
( )
0.56
1
b
g inv
t
qV
q V V
E
=
| |

| +
|
\ .
(3)
I. Pappas, A. T. Hatzopoulos, D. H. Tassis, N. Arpatzanis,
S.Siskos and C. A. Dimitriadis are with the Department of Physics,
Aristotle University of Thessaloniki, Thessaloniki, 54124 Greece,
E-mail: [email protected]
A. A. Hatzopoulos is with the Department of Electrical &
Computer Engineering, Aristotle University of Thessaloniki,
Thessaloniki, Greece
G. Kamarinos is with IMEP, ENSERG, 23 rue des Martyrs,
38016 Grenoble, Cedex 1, France
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The parameter E
t
is related to the quality of the polysilicon
material. For smaller parameter E
t
, qV
b
decreases more
rapidly with V
g
, thus the smaller value of E
t
corresponds to
better quality of the active polysilicon layer. Fit of the
experimental I
d
versus V
g
data with Eqs. (1)-(3) enables the
determination of the parameters L
g
, E
t
,
gb//
,
gi
and V
inv
.
Thus, from analysis of the transfer characteristics, the
experimental data of
eff
versus V
g
can be extracted. The
use of the charge inversion voltage (V
inv
) instead of the
more commonly used threshold voltage, enables well
correlation to the experimental data in the gate voltage
region from weak to strong inversion.
In polysilicon TFTs, the experimental data of
eff
versus V
eff
can be represented by the n
th
-order polynomial
function [9, 10]:
( )
0
i
n
eff i eff
i
c V
=
=

for V
eff
> 0 (4)
where V
eff
= V
g
V
inv
and {c
i
} are the polynomial
coefficients. Considering ideal saturation region and using
Eq. (4), the output characteristics can be described by the
expression [8, 9]:

( ) ( )
2 2
0
2
n
i i
i
di ox eff eff d
i
c W
I C V V V
L i
+ +
=
(
(
=
(
(
+

for V
d
V
eff
( )
2
0
2
n
i
i
di ox eff
i
c W
I C V
L i
+
=
(
=
(
+

for V
d
> V
eff
(5)
A more realistic description of the output
characteristics is obtained by taking into account the
channel length modulation effect associated with the
channel length reduction due to the finite extent of the
saturated part of the channel near the drain and the impact
ionization effect due to the high electric field near the drain
region. When these effects are included, the transistor
characteristics can be described by equation:
d di m i
I I F F = (6)
The channel length modulation effect is described
properly by the function F
m
:
( ) 1
m d
F V = + (7)
The gate voltage dependence of the fitting parameter
is empirically described by:
eff 1
V
o
= (8)
0 5 10 15 20 25
10
-11
10
-9
10
-7
10
-5
10 m/4 m
20 m/10 m
D
r
a
i
n

C
u
r
r
e
n
t

(
A
)
Gate Voltage (V)
Fig. 1. Measured and simulated input characteristics of long and
short channel TFTs and drain voltage V
d
=0.1V.
where

and
1
are model parameters. The current increase
due to the impact ionization near the drain is described by
the factor F
i
:
1 exp
n
i n sat
d
B L
F K
V
u
| |
= +
|
\ .
(9)
where u
sat
is the carrier saturation velocity ( u
sat
= 10
7
cm/s)
and K
n
, B
n
are empirical parameters. By employing the
coefficients {c
i
} of the
eff
versus V
eff
polynomial function
and using

,
1
, K
n
, B
n
as fitting parameters, the output
characteristics can be reproduced.
III. EXPERIMENTAL APPLICATION
A. Input Characteristics
The above I V model has been applied successfully
in a number of TFTs, with channel lengths 4 m and 10m,
fabricated on solid-phase crystallized polysilicon layers,
irradiated by XeCl excimer laser with energy density 435
mJ/cm
2
.
Fig. 1 shows the transfer characteristics of polysilicon
TFTs with different channel dimensions, measured at drain
voltage V
d
= 0.1 V. The symbols correspond to the
experimental data and the solid lines to the model results
using the parameters: (a)
gi
= 75.63 cm
2
/Vs,
gb//
= 0.174
cm
2
/Vs, E
t
= 0.4 eV, L
g
= 0.168 m, V
inv
= -0.698 V for the
TFT with L = 4 m and (b)
gi
= 64.56 cm
2
/Vs,
gb//
=
0.102 cm
2
/Vs, E
t
= 0.4 eV, L
g
= 0.075 m, V
inv
= -0.76 V
for the TFT with L = 10 m. It is worth to mention that,
independently on the channel length of the device, the
experimental transfer characteristics are reproduced with
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the model using the parameter E
t
= 0.4 eV, indicating that
the quality of the polysilicon layer is similar in all the
investigated devices. In the investigated transistors, the
experimental I
d
versus V
g
data in the on-current region can
be reproduced from Eqs. (1)-(3), using the three fitting
parameters L
g
,
gi
and V
inv
. These three parameters will be
used as input parameters of AIM-SPICE.
B. Output Characteristics
For accurate reproduction of the experimental I
d
V
d
curves using Eqs. (5)-(9), it was found that the lower-order
polynomial representation for
eff
(V
eff
) is a sixth-order
polynomial function.
Fig. 2 shows the reproduced output characteristics (a)
of long channel TFTs and (b) of short channel TFTs. In
long channel TFTs (L= 10 m), the experimental output
characteristics can be reproduced with the model using the

eff
(V
eff
) sixth-order polynomial function coefficients and
the impact ionization parameters K
n
and B
n.
The measured
I
d
V
d
curves (open cycles) and the simulated curves
(continuous lines) show a good agreement.
In short channel TFTs (L = 4 m), the output
characteristics can be reproduced with the model using the

eff
(V
eff
) sixth-order polynomial function coefficients and
the channel length modulation fitting parameters

and
1
described in Eqs. (7) and (8). A good agreement between
measured data (open cycles) and calculated I
d
V
d
curves
(solid lines) is obtained, showing that the channel length
modulation effect is sufficient to explain the output
characteristics of the investigated short channel polysilicon
TFTs.
IV. SPICE IMPLEMENTATION
SPICE is the most commonly used analog circuit
simulator today and is enormously important for electronics
industry. AIM-SPICE is a version of circuits simulation
program SPICE. The default poly-Si TFT model included
in AIM-SPICE is the PSIA2 level 16 poly-Si TFT model.
Our purpose was to adapt the new polysilicon TFT model
into AIM-SPICE. In order to achieve this, the source code
of the new model was written with the use of C language.
The source code of the model includes the input parameters
of the model and its functions. The source code was
compiled with AIM-SPICE, so that the compatibility of the
new model to be insured. This means that we were able to
run all the routines of simulation (DC, AC and transient
analyses) with the new model. The input parameters of the
new model are the
eff
(V
eff
) sixth-order polynomial
function coefficients, the impact ionization parameters K
n
and B
n
and the channel length modulation fitting
parameters

and
1
.
0 2 4 6 8 10 12
0
100
200
300
400
500
600
(a)
V
g
(V)
10
9
8
7
6
5
4
W/L=20Pm/10Pm
D
r
a
i
n

C
u
r
r
e
n
t

(
P
A
)
Drain Voltage (V)
0 2 4 6 8 10
0
100
200
300
400
500
600
(b) V
g
(V)
3
4
5
6
7
8
W/L=10Pm/4Pm
D
r
a
i
n

C
u
r
r
e
n
t

(
P
A
)
Drain Voltage (V)
Fig. 2 Measured and simulated output characteristics: (a) for long
channel TFT using the impact ionization parameters K
n
= 1u10
-7
s/cm, B
n
= 1.55u10
4
V/cm and
eff
(V
eff
) coefficients :
{c
0
,c
1
,c
2
,c
3
,c
4
,c
5
,c
6
}={-17.56044, -1.002, 8.987922, -2.1117,
0.208307, -0.00963, 1.7110
-4
} and (b) for short channel TFTs
using the channel length modulation parameters
o
= 0.111 V
-1
,

1
= 8u10
-3
V
-2
and
eff
(V
eff
) coefficients:{c
0
,c
1
,c
2
,c
3
,c
4
,c
5
,c
6
}={-
88.178, 73.9, 13.7274, 1.279789 ,-0.06002,0.001191, -3.7610
-6
}
The default values of the inputs parameters are the
statistical values obtained from the investigated devices and
they are presented in Table 1. The convenience of the new
model is that there is only one polynomial drain current
equation for all the regions of operation which leads to
more easy deviations and calculations for the source code
of the new model.
Fig. 3 shows the simulated output characteristics of
the new poly-Si model for short channel TFTs, reproduced
with AIM-SPICE. As it can be seen from Fig. 3, there is a
very good correlation between the simulated output and the
measured characteristics. This shows that it is possible to
perform realistic simulations with AIM-SPICE using the
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proposed TFT model and thus demonstrate the feasibility of
circuits designed using poly-Si TFTs.
TABLE I
DEFAULT VALUES OF THE INPUT PARAMETERS
Input
Parameters
Description Default Values
V
inv
Charge inversion voltage -0.61 0.15 V

o
Channel length
modulation parameter
0.111 V
-1

1
Channel length
modulation parameter
810
-3
8.610
-4
V
-2
B
n
Impact ionization
parameter
1.5510
4

2.910
3
V/cm
K
n
Impact ionization
parameter
110
7
s/cm
L
g
Average grain size of the
polysilicon layer
0.104 0.025
m

gi
Carrier mobility within
the grain region
70 5.56
cm
2
/Vs
V. CONCLUSION
A simple and continuous I V model for the output
characteristics of polysilicon TFTs is proposed, including the
sixth-order polynomial coefficients fitted to the
eff
versus
V
eff
data, the channel length modulation effect and the
impact ionization effect. The model has been applied in
TFTs fabricated on SPC polysilicon layers, irradiated by
XeCl excimer laser with energy density 435 mJ/cm
2
. This
new model was adapted in the circuits simulation program
AIM-SPICE and the measured model parameters were set as
the default values of the input parameters for the AIM-
SPICE. The output characteristics were reproduced by
simulations with AIM-SPICE and they have shown very
good correlation with the measured ones.
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