Digital Lec
Digital Lec
2^n : n
I3 I2 I1 I0 Y1 Y0
0 0 0 1 0 0
0 0 1 0 0 1
0 1 0 0 1 0
1 0 0 0 1 1
I3 I2 I1 I0 Y1 Y0
0 0 0 1 0 0
0 0 1 X 0 1
0 1 X X 1 0
1 X X X 1 1
=> Decoder
n : 2ⁿ
I1 I0 Y3 Y2 Y1 Y0
0 0 0 0 0 1
0 0 0 0 1 0
0 1 0 1 0 0
1 1 1 0 0 0
A B C D| a b c d e f g
0 0 0 0| 1 1 1 1 1 1 0
0 1 0 1| 1 1 0 1 1 0 1
0 0 1 1| 0 1 1 1 1 0 1
Any n-variable logic function can be implemented using a single n-to- 2n decoder to generate the
minterms
OR gate forms the sum.
The output lines of the decoder corresponding to the minterms of the function are used as
inputs to the or gate.
Any combinational circuit with n inputs and m outputs can be implemented with an n-to-2n
decoder with m OR gates.
Suitable when a circuit has many outputs, and each output function is expressed with few
minterms.
1) F(a,b,c) = ∑m(0,1,4,6)
F(a,b,c) = ∏M(2,3,5,7)
i) Non-Inverting outputs
(Use Minterm)
0
a 1
2
b 3:8 OR F
3
Gate
c 4
5
6
7
i) Inverting outputs
(Use Maxterm)
0
a 1
ii) b 2
3
c 4
5
6
7
- Nand Gate
- Nor Gate
- Multiplexer
1) Nand
A B F
0 0 1
0 1 1
1 0 1
1 1 0
- Not
A’ A=1
A
B F
1 0 1
A’
A 1 0
- And
A
A.B
B
i)
A (A.B)’
A.B
B
ii)
A (A.B)’
A.B
B