Dump File COA
Dump File COA
System
Q1. What is computer organization?
a) SR flip-flop
b) JK flip-flop
c) T flip-flop
d) XYZ flip-flop
Answer: d
Q5. What is a JK flip-flop?
a) Control Unit
b) Arithmetic Logic Unit (ALU)
c) Memory Unit
d) Register Unit
Answer: a
Memory Reference Instructions, Input-Output and Interrupts
Q15. Which of the following is a memory reference instruction?
a) MOV (Move)
b) ADD
c) SUB
d) MUL
Answer: a
Program Control: Status bits, Conditional Branch Instructions, Program
Interrupts & Types
Q23. What is a status bit?
a) A situation that prevents the next instruction in the pipeline from executing
b) A problem with the power supply
c) A type of memory error
d) An error in the software
Answer: a
Input-Output Organization: I/O Interface
Q29. What is an I/O interface?
a) The hardware and software used to connect the CPU to peripheral devices
b) The process of executing instructions
c) The method of addressing memory
d) A type of memory used for storing data
Answer: a
Asynchronous Data Transfer
Q30. What is asynchronous data transfer?
a) The primary storage area for data and programs currently in use
b) The secondary storage used for backup
c) The fastest type of memory in the hierarchy
d) The smallest type of memory in the hierarchy
Answer: a
Q35. What is associative memory?
a) A type of memory that allows data to be accessed based on content rather than
address
b) A memory used for caching
c) A method of organizing data in memory
d) A memory used for arithmetic operations
Answer: a
Cache Memory and Virtual Memory
Q36. What is cache memory?
a) A small, fast memory located close to the CPU to store frequently accessed
data
b) A type of external storage
c) A memory used for storing large files
d) A memory used for backup
Answer: a
Q37. What is virtual memory?
a) A device that selects one of many input signals and forwards the selected
input into a single line
b) A device that performs arithmetic operations
c) A memory storage device
d) A type of register
Answer: a
Q45. What is the purpose of an address bus?
a) Hard drive
b) USB flash drive
c) RAM
d) DVD
Answer: c
Q47. What is the purpose of a data bus?
a) Flash Memory
b) DRAM
c) SRAM
d) Cache Memory
Answer: a
Q54. What does the term 'cycle time' refer to in CPU performance?
a) Flip-flop
b) AND gate
c) OR gate
d) NOT gate
Answer: a
Q61. What is the function of a decoder in digital circuits?
a) A situation that prevents the next instruction in the pipeline from executing
b) A problem with the power supply
c) A type of memory error
d) An error in the software
Answer: a
Q67. What is the purpose of an instruction decoder in a CPU?
a) A device that selects one of many input signals and forwards the selected
input into a single line
b) A device that performs arithmetic operations
c) A memory storage device
d) A type of register
Answer: a
Q80. What is the function of a control unit in a CPU?
a) A situation that prevents the next instruction in the pipeline from executing
b) A problem with the power supply
c) A type of memory error
d) An error in the software
Answer: a
Q86. What is the role of a program counter (PC) in a CPU?
Q87. What does the term 'cycle time' refer to in CPU performance?
a) The delay between a request for data and the start of the data transfer
b) The speed at which data is processed
c) The amount of data that can be stored
d) The total time taken to execute a program
Answer: a
Q94. What is the purpose of the 'stack pointer (SP)' in a CPU?
a) When the data requested by the CPU is found in the cache memory
b) When the data requested by the CPU is not found in the cache memory
c) When the CPU performs a successful arithmetic operation
d) When the CPU accesses the main memory
Answer: a
Q97. What is the primary role of the 'instruction set architecture (ISA)'?
a) To temporarily hold data while it is being transferred from one place to another
b) To store the current instruction
c) To perform arithmetic operations
d) To manage memory addresses
Answer: a
Q99. What is 'address space' in computer architecture?
a) A CPU design where data must be loaded into registers before operations can
be performed
b) A CPU design where data is directly operated upon in memory
c) A CPU design optimized for multi-threading
d) A CPU design with integrated cache memory
Answer: a
Q106. What is a 'context switch' in an operating system?
a) The process of switching the CPU from one process or thread to another
b) The process of loading an instruction into the CPU
c) The process of writing data to memory
d) The process of managing input/output operations
Answer: a
Q107. What is 'branch prediction'?
a) A CPU that can execute more than one instruction per clock cycle
b) A CPU with a very high clock speed
c) A CPU with a large cache memory
d) A CPU designed for mobile devices
Answer: a
Q117. What is the 'translation lookaside buffer (TLB)'?
a) The ability of a CPU to execute instructions out of the original order to improve
performance
b) The execution of instructions in the order they appear in the program
c) The execution of instructions based on their memory addresses
d) The process of writing data to memory
Answer: a
Q120. What does 'VLIW' stand for in CPU design?
a) A technique where the CPU executes instructions before it is certain they are
needed
b) The execution of instructions based on their memory addresses
c) The process of storing data in cache memory
d) The method of managing input/output operations
Answer: a
Q125. What is the role of 'cache coherence' in a multi-core processor?
a) To ensure that all cores have a consistent view of the cached data
b) To increase the size of the cache memory
c) To manage the speed of data transfer
d) To perform arithmetic operations
Answer: a
Q126. What is the function of 'write-back cache'?
a) To update the main memory only when the cache block is replaced
b) To immediately update the main memory with every write operation
c) To store instructions temporarily
d) To manage input/output operations
Answer: a
Q127. What is 'hyper-threading' technology?
a) A technology that allows a single CPU to behave like multiple logical CPUs
b) A technology to increase the clock speed of the CPU
c) A technology to increase the size of cache memory
d) A technology to reduce power consumption
Answer: a
Q128. What does 'FLOPS' stand for in computing?
a) The ability of the CPU to execute instructions in an order different from their
appearance in the program
b) The execution of instructions in the order they appear in the program
c) The method of managing input/output operations
d) The process of storing data in cache memory
Answer: a
Q137. What is 'parallel processing' in computer architecture?
a) A CPU design that allows for the execution of multiple instructions per clock
cycle
b) A CPU with a single instruction execution pipeline
c) A CPU with a very high clock speed
d) A CPU designed for mobile devices
Answer: a
Q142. What is the primary function of a 'control unit' in a CPU?
a) Ensuring that all caches have the most recent copy of the data
b) The total size of the cache memory
c) The speed at which data is accessed in the cache
d) The method of data transfer between cache and main memory
Answer: a
a) The process of storing the state of a CPU so that it can be restored and
execution resumed later
b) The switching of tasks in the CPU
c) The management of memory addresses
d) The execution of input/output operations
Answer: a
Q169. What does 'FLOPS' stand for in computing?
a) Floating Point Operations Per Second
b) Fast Logic Operations Per Second
c) Frequency Logic Operations Per Second
d) Floating Logic Operations Per Second
Answer: a
Q170. What is the main function of a 'load/store unit' in a CPU?
a) A type of cache where data is written to main memory only when the cache line
is replaced
b) A cache where data is immediately written to main memory
c) A cache that stores instructions temporarily
d) A system to manage input/output operations
Answer: a
Q177. What is 'superscalar architecture'?
a) A CPU design that allows for the execution of multiple instructions per clock
cycle
b) A CPU with a single instruction execution pipeline
c) A CPU with very high clock speed
d) A CPU designed for low power consumption
Answer: a
Q178. What is 'cache coherence' in multiprocessor systems?
a) Ensuring that all caches have the most recent copy of the data
b) The total size of the cache memory
c) The speed of data transfer in the cache
d) The method of data transfer between cache and main memory
Answer: a
Q179. What is the main purpose of a 'branch target buffer' in CPU design?
a) The process of storing and restoring the state of a CPU so that execution can
be resumed from the same point later
b) The switching of tasks in the CPU
c) The management of memory addresses
d) The execution of input/output operations
Answer: a
Q186. What is 'speculative execution' in CPU design?
a) A technique where the CPU executes instructions before it is certain they are
needed
b) The execution of instructions based on their memory addresses
c) The process of storing data in cache memory
d) The method of managing input/output operations
Answer: a
Q187. What is 'pipeline hazard' in CPU pipelining?
a) A cache that allows other operations to proceed while a cache miss is being
handled
b) A cache that blocks other operations during a cache miss
c) A cache with a very high hit rate
d) A cache that stores only instructions
Answer: a
Q190. What is 'dynamic branch prediction'?
a) When the data requested by the CPU is not found in the cache memory
b) When the cache memory is full
c) When data is found in the cache memory
d) When the cache memory is being updated
Answer: a
Q198. What is the primary function of 'branch prediction' in a CPU?