Annexure-I

Amrutvahini Polytechnic Sangamner

Academic year – 2023-24

Program: EJ Class: EJ6I(I)

Course: VWV Course Code: 22026

Micro project proposal

Aims:
Prepare a detailed report on Half Subtractor using Xilinx software.

Benefits:
1. Half subtractor is used to reduce the force of audio or radio signals.
2. It can be used in amplifiers to reduce the sound distortion.
3. Half subtractor is used in ALU of processor.
4. It can be used to increase and decrease operators and also calculates the
addresses.

Course outcomes (co) addressed:

CI607.1- Develop design flow for give application using VLSI tools.
CI607.2- Interpret CMOS technology circuits with their specifications.
CI607.3- Use relevant VHDL model for given application.
CI607.4- Debug VHDL program for given application.
CI607.5- Describe VHDL simulation and synthesis.

Proposed methodology:
1. In this micro project we will search the information about half Subtractor
from internet as well as various reference book.
2. We will also include its specifications and applications of half Subtractor.
3. We will also include each half Subtractor of simulation output on Xilinx
software.
4. Finally, we will be able to select a half Subtractor for a specific applications or
advantages.

Action plan (sequence and time required for major activity):

Sr. No. Details of activity Planned Planned Name of responsible team

start finish member
date date
1. Group formation, project 11/01/2024 18/01/2024 Khatal Om Pradip
distribution
2. Collection of data from 20/01/2024 04/02/2024 Kadlag Ayush Rajendra
internet, reference book
3. Assemble of project and 06/02/2024 04/03/2024 Yewale Ashish Dattatraya
rough writing
 4. Writing report 05/03/2024 21/03/2024 Arote Akash Dnyaneshwar

5. Submission of report 22/03/2024 01/04/2024 All Team Members

Resources required:

Sr.no. Name of resources/material Specification Quantity Remark

1. Desktop - - -
2. Xilinx Sofware
3. https://www.engineersgarage.com/v - - -
hdl-tutorial-11-designing-half-and-
full-subtractor-circuits/
4. https://www.androiderode.com/half- - - -
subtractor-and-full-subtractor-vhdl-
simulation-code/

Name of team members with Roll No:

1. Khatal Om Pradip (Roll no: 04)

2. Kadlag Ayush Rajendra (Roll no: 05)
3. Yewale Ashish Dattatraya (Roll no: 19)
4. Arote Akash Dnyaneshwar (Roll no: 20)

Signature of Teacher
(Prof. Kanawade M.V.)
 A
MICRO PROJECT REPORT
ON

“Prepare a detailed report on Half Subtractor using Xilinx software”

In the partial fulfillment of the requirement for the

Diploma in Electronics and Telecommunication
Engineering Submitted To
Maharashtra State Board of Technical Education, Mumbai
Submitted By

Sr. No. Name Roll No.

1 Khatal Om Pradip 04

2 Kadlag Ayush Rajendra 05

3 Yewale Ashish Dattatraya 19

4 Arote Akash Dnyaneshwar 20

Under The Guidance of

Prof. Kanawade M.V.

Department of Engineering Electronics &

Telecommunication

AMRUTVAHINI POLYTECHNIC, AMRUTNAGAR

TAL-SANGAMNER, DIST-AHMEDNAGAR, (M.S.) Pin-422605

(2023-2024)
 Amrutvahini Sheti and Shikshan Vikas Sanstha’s

AMRUTVAHINI POLYTECHNIC, SANGAMNER

Department 2023-2024 Electronics & telecommunication
Engineering

CERTIFICATE
This is to certify that,

Name Roll No. Enrollment

Kahatl Om Pradip 04 2100800566

Kadlag Ayush Rajendra 05 2100800569

Yewale Ashish Dattatraya 19 2100800636

Arote Akash Dnyaneshwar 20 2100800638

Has satisfactorily carried out and completed the Micro Project work
entitled

“Prepare a detailed report on Half Subtractor using Xilinx software”

This work is being submitted for the award of

Diploma in Electronics and Telecommunication

It is submitted in the partial fulfillment of the prescribed syllabus of

MSBTE, Mumbai

For the academic year 2023-2024

Prof. Kanawade M.V. Prof. Kulkarni. B. L.

(Guide) (H.O.D)
 INDEX

Sr. No. Title Page No.

1) Rationale 1

2) Aims /benefits of micro project 1

3) Course outcome achieved 1

4) Actual methodology followed 1

5) Literature review 2

6) Output of the micro-project 6

7) Skill developed / learning outcome of the micro- 6

project

8) Application of this micro-project 7

1. Rationale:

The preparation of a detailed report on a half subtractor using Xilinx software

serves several critical purposes in the field of digital electronics. Firstly, it provides
essential educational value by allowing students and practitioners to gain hands-
on experience in designing and simulating digital circuits, reinforcing theoretical
knowledge with practical implementation. Secondly, it facilitates understanding of
practical applications as half subtractors are fundamental components in various
digital systems. Moreover, proficiency in Xilinx software is highly valued in the
industry, making this report a valuable opportunity for individuals to enhance their
skills in utilizing industry-standard tools for digital circuit design. Lastly, the report
can contribute to research and development efforts by documenting the design
process, simulation results, and performance analysis of the half subtractor,
thereby advancing knowledge and fostering innovation in digital circuit design.
Overall, the report serves as a comprehensive resource for learning, skill
development, and research in the field of digital electronics.

2. Aim:

Prepare a detailed report on Half Subtractor using Xilinx software.

Benefits:

a) Half subtractor is used to reduce the force of audio or radio signals.

b) It can be used in amplifiers to reduce the sound distortion.
c) Half subtractor is used in ALU of processor.
d) It can be used to increase and decrease operators and also calculates the
addresses.

3. Course Outcomes Addressed:

CI607.1- Develop design flow for give application using VLSI tools.
CI607.2- Interpret CMOS technology circuits with their specifications.
CI607.3- Use relevant VHDL model for given application.
CI607.4- Debug VHDL program for given application.
CI607.5- Describe VHDL simulation and synthesis.

4. Proposed Methodology:

a) In this micro project we will search the information about half Subtractor from
internet as well as various reference book.
b) We will also include its specifications and applications of half Subtractor.
c) We will also include each half Subtractor of simulation output on Xilinx
software.
d) Finally, we will be able to select a half Subtractor for a specific applications or
advantages.
5. Literature Review:

A half subtractor is a digital logic circuit that performs the subtraction of two binary
bits. It has two inputs, A and B, and two outputs, Difference (d) and Borrow (b). The
output d is the difference between the two inputs, A and B, and output b represents a
borrow, indicating that the subtraction of B from A requires borrowing from the next
digit in a larger binary number.

A half subtractor can be used in combination with other half subtractors to build a full
subtractor circuit, which can perform binary subtraction of larger binary numbers.

The block diagram for the half subtractor is shown below:

Operation of Half Subtractor:

Now, let us understand the operation of the half subtractor circuit. Half subtractor
performs its operation to find the difference of two binary digits according to the rules
of binary subtraction, which are as follows −

The output borrow of b is zero (0) as long as the minuend bit (A) is greater than or
equal to the subtrahend bit (B), i.e. A ≥ B. The output borrow is a 1 when A = 0 and
B = 1.

From the logic circuit diagram of the half subtractor, it is clear that the difference bit
(d) is obtained by the XOR operation of the two inputs A and B, and the borrow bit is
obtained by AND operation of the compliment of the minuend (A') with the
subtrahend (B).
Half Subtractor Truth Table:

The truth table for Half Subtractor is given as

From the truth table, we can see that the difference (d) output is equal to 1 if either A
is 1 or B is 0. This means that the half subtractor will produce a 1 in the difference
output if there is no borrow from the next lower order bit. If both A and B inputs are 1,
then the half subtractor produces a 0 in the difference output and a 1 in the borrow
out (b) output. This indicates that there is a borrow from the next lower order bit.

K-Map for Half Subtractor:

After making the Truth Table for the Half Subtractor, let us now derive the Boolean
Expression for both the outputs of Half Subtractor i.e., “d” and “b”.

K-Map:
K-Map is the official way for deriving the boolean expressions using the truth table for
a particular digital circuit. Let us make the K-Map for the Half Subtractor.

For Difference (d):

For Borrow (b):

So by using the K-Map we get the Logical Boolean Expressions for the output as:

a) d = A’B + AB”, which can be written as

d=A⊕B
b) b = A’B

Characteristic Equation of Half Subtractor:

The characteristic equations of the half subtractor, i.e. equations of the difference bit
(d) and the output borrow bit (b) are obtained by following the rules of binary
subtraction. These equations are given as follows −

The difference bit (d) of the half subtractor is given by XORing the two inputs A and
B. Therefore,

Difference,d=A⊕B=A′B+AB′

The borrow (b) of the half subtractor is the AND of A’ (compliment of A) and B.
Therefore,
Borrow,b=A′B
Circuit Diagram for Half Subtractor using Basic Gates:

The circuit diagram according to the above mentioned boolean expression is given:

VHDL Code for half subtractor using dataflow:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity half_sub is
port( A, B : in std_logic;
DIFF, Borrow : out std_logic);
end entity;

architecture dataflow of half_sub is

begin

DIFF <= A xor B;

Borrow <= (not A) and B;

end architecture;
6. Output of Micro - Project:

7. Skills Developed/Learning Outcome:

a) Digital Logic Design: Understanding of basic digital logic concepts such as

Boolean algebra, truth tables, and logic gates, and applying them to design a Half
Subtractor circuit.
b) Xilinx Software Proficiency: Proficiency in using Xilinx software tools such as
Vivado for schematic design, simulation, and synthesis, enhancing familiarity with
industry-standard design environments.
c) Project Management: Planning and organizing the project timeline, setting
milestones, and managing tasks effectively to ensure timely completion of the
project.
d) Team Collaboration: Collaborating effectively with team members, sharing
knowledge, and dividing tasks to leverage individual strengths and complete the
project efficiently.
e) Attention to Detail: Paying attention to detail during the design and verification
process to ensure the accuracy and reliability of the implemented circuit.
f) Communication Skills: Communicating technical concepts and project progress
effectively, both orally and in writing, to peers, instructors, or stakeholders
involved in the project.
8. Application of Micro - Project:

a) Calculators: Most mini-computers utilize advanced rationale circuits to perform

numerical tasks. A Half Subtractor can be utilized in a number cruncher to deduct
two parallel digits from one another.
b) Alarm Frameworks: Many caution frameworks utilize computerized rationale
circuits to identify and answer interlopers. A Half Subtractor can be utilized in
these frameworks to look at the upsides of two parallel pieces and trigger a
caution in the event that they are unique.
c) Automotive Frameworks: Numerous advanced vehicles utilize computerized
rationale circuits to control different capabilities, like the motor administration
framework, stopping mechanism, and theater setup. A Half Subtractor can be
utilized in these frameworks to perform computations and examinations.
d) Security Frameworks: Advanced rationale circuits are usually utilized in security
frameworks to identify and answer dangers. A Half Subtractor can be utilized in
these frameworks to look at two double qualities and trigger a caution in the event
that they are unique.
e) Computer Frameworks: Advanced rationale circuits are utilized broadly in PC
frameworks to perform estimations and examinations. A Half Subtractor can be
utilized in a PC framework to deduct two paired values from one another.

9. Conclusion:

In conclusion, the detailed report on the Half Subtractor implemented using Xilinx
software highlights the comprehensive understanding and practical application of
digital logic design principles. Through the utilization of Xilinx tools, we have
successfully designed, simulated, and synthesized a functional Half Subtractor
circuit, demonstrating its capability to perform subtraction operations in binary
arithmetic. This project not only deepened our comprehension of fundamental digital
logic concepts but also provided invaluable hands-on experience with industry-
standard design tools. Moving forward, the knowledge gained from this project
serves as a solid foundation for tackling more complex digital design challenges and
exploring advanced topics in the field of digital electronics.