FMA Unit 4 Questions & Answers
FMA Unit 4 Questions & Answers
Reset 0000
INT 0 0003
TF0 000B
INT 1 0013
TF1 001B
RI & TI 0023
• The timer and serial interrupts are internally produced by the microcontroller.
• The external interrupts are produced by additional interfacing devices or
switches that are externally connected with the microcontroller at pin no.
12(P3.2) and pin no. 13(P3.3)
• These external interrupts can be level triggered or edge triggered and are called
as hardware interrupts.
• SFRs involved with interrupts are as follows:
• Interrupt Enable Register (IE) : It is used to enable or disable any interrupt.
• Interrupt Priority Register (IP) : It is used to change the priority levels of the
interrupt i. e. which interrupt will be executed first.
• Timer Control Register (TCON) : Used to monitor Timer Interrupts and
External Hardware Interrupts.
Q2. Write a program in C language to enable hardware interrupts INT0 and INT1.
Ans 2.
#include < reg51.h>
void main(void)
{
IE=0X85;
}
Q3. Write down the steps to program ADC 0809.
Ans 3. Following are the steps to program ADC 0809
1) Select the analog channel by providing bits to A, B, and C address according to
following table:
Selected C B A
Analog
Channel
IN0 0 0 0
IN1 0 0 1
IN2 0 1 0
IN3 0 1 1
IN4 1 0 0
IN5 1 0 1
IN6 1 1 0
IN7 1 1 1
2) Activate the ALE (Address Latch Enable) pin. It needs a L to H pulse to latch in the
address.
3) Activate SC (Start of Conversion) by an L to H pulse to initiate the conversion.
4) Monitor EOC (end of conversion) to see whether conversion is finished. H to L
output indicates that the data is converted and is ready to be picked up. If we do
not use EOC, we can read the converted digital data after a brief time delay.
5) Activate OE (output enable) to read data out of the ADC chip. A L to H pulse to the
OE pin will bring digital data out of the chip. OE is same as RD pin in other ADC
chip.
Q4. Draw the IE register and explain the functions of bits EA, ET0 and EX0.
Ans 4.
Interrupt Enable Register (IE)
• Upon reset all interrupts are disabled (masked). They must be enabled by
software by using IE register for the microcontroller to respond to them. This
register is responsible for enabling (unmasking) and disabling (masking) the
interrupts. It is a bit addressable register.
• EA (IE.7) : It is called as Enable all . If EA =1, all interrupts are enabled, if EA =0 ,
no interrupt will be responded , even if the associated bit in the IE register is
high.
• IE. 6 : Not implemented, reserved for future use.
• ET2(IE.5) : Enables or disables timer 2 overflow.
• ES (IE.4) : Enables or disables the serial port interrupt.
• ET1 (IE.3) : Enables or disables the timer 1 overflow interrupt.
• EX1 (IE.2) : Enables or disables the external interrupt 1.
• ET1 (IE.1) : Enables or disables the timer 0 overflow interrupt.
• EX0 (IE.0) : Enables or disables the external interrupt 0.
Q5. Write down the steps in executing on an interrupt.
Ans 5. Steps followed by 8051 while occurrence of an Interrupt
1) It finishes the instruction it is executing and saves the address of the next
instruction (PC) on the stack.
2) It also saves the current status of all the interrupts internally (i.e. not on the
stack).
3) It jumps to a fixed location in memory called the interrupt vector table that
holds the address of the interrupt service routine.
4) The microcontroller gets the address of the ISR from the interrupt vector
table and jumps to it. It starts to execute the interrupt service subroutine
until it reaches the last instruction of the subroutine which is RETI (return
from interrupt).
5) After executing RETI instruction, the microcontroller returns to the place
where it was interrupted. First, it gets the program counter (PC) address
from the stack by popping the top two bytes of the stack into the PC.
Then it starts to execute from that address.
Q6. Draw and explain interfacing diagram of ADC with 8051.
Ans 6.
Microcontroller sends a LOW to HIGH level signal to ALE pin (its active-high pin) of ADC
to enable the latch in the address.
By applying HIGH to LOW Level signal to SC (Start Conversion), ADC starts analog to
digital conversion.
EOC (end of conversion) pin is monitored to see whether the conversion is finished. H
to L output indicates that the data is converted and is ready to be picked up.
After this, microcontroller enables the output line by applying a LOW to HIGH signal to
OE pin of ADC0809.
Q7. Explain interrupt structure of 8051 microcontroller with neat diagram
Ans 7. Same as answer 1,
Q8. Explain Interrupt Priority Register of 8051 Microcontroller.
Ans 8. Interrupt Priority Register (IP)
• The priorities are assigned to the interrupts to decide which interrupt will be
executed if more than one interrupts are activated at the same time.
• The following table shows the interrupt priority
Priority bit = 1 assigns high priority. Priority bit = 0 assigns low priority.
-- IP.7 : Reserved
-- IP.6 : Reserved
PT2 IP.5 : Timer 2 interrupt priority bit(8052 only)
PS IP. 4 : Serial port interrupt priority bit
PT1 IP.3 : Timer 1 interrupt priority bit
PX1 IP.2 : External interrupt 1 priority bit
PT0 IP.1 : Timer 0 interrupt priority bit
PX0 IP.0 : External interrupt 0 priority bit