8051
8051
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Microcontroller
• A smaller computer on a CHIP
• On-chip RAM, ROM, I/O Ports, Timer, Serial Controller…
• Example: Motorola’s 6811, Intel’s 8051, Atmel 32
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Microprocessor vs. Microcontroller
Microprocessor Microcontroller
• CPU is stand-alone, RAM, • CPU, RAM, ROM, I/O and
ROM, I/O, timer are separate timer are all on a single chip
• Versatility • Single-purpose
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C based Embedded Systems
• Special purpose computer system usually completely inside
the device it controls
• Has specific requirements and performs pre-defined tasks
• Cost reduction compared to general purpose processor
• Different design criteria
– Performance
– Reliability
– Availability
– Safety
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Embedded Systems Examples
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Examples
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8
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Harvard Architecture
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8051 CPU Operation
1. Features
2. Pin Diagram
3. Block Diagram
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8051 Microcontroller
• Intel introduced 8051, referred as MCS- 51, in
1981.
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Features of 8051
8 bit Processor
4KB Internal ROM
128 Bytes Internal RAM
Four 8 BIT I/O PORTS (32 I/O LINES)
Two 16 Bit Timers/Counters
On Chip Full Duplex UART for Serial Communication
5 Vector Interrupts ( 2 External, 3 Internal - Timer0,Timer1,Serial)
On Chip Clock Oscillator
16 bit Address bus
64k External Code Memory
64k External Data Memory
16-bit program counter to access external Code Memory and
16 bit Data Pointer to access external Data Memory
128 user defined flags
32 General Purpose Registers each of 8 bits
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8051 Family
• The 8051 is a subset of the 8052
• The 8031 is a ROM-less 8051
– Add external ROM to it
– You lose two ports, and leave only 2 ports for I/O operations
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Pin Diagram
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Block Diagram of 8051
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Return 19
Block Diagram of 8051
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Programming Model of 8051
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8051 microcontroller memory
organization
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8051
Memory Space
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8051 Memory Structure
External
External
60K
64K 64K
SFR
EXT INT 4K
128
EA = 0 EA = 1 Internal
Program Memory Data Memory
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Separate read instructions for external data and code memory.
Internal code
External data memory
Memory
RAM
ROM or EPROM
64k
4k or up
0xFF
SFR(direct access)
128 bytes External code memory
ROM or EPROMext
64k
0x80
0x7F
0x30
0x2F
0x20
0x1F Register bank 0(R0-R7)
Direct
Addressing
Only
SFR [ Special Function
Direct & Registers]
Indirect
Addressing
128 Byte Internal RAM
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Special Function Registers [SFR]
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Program Status Word [PSW]
C AC F0 RS1 RS0 OV F1 P
Carry Parity
Auxiliary Carry User Flag 1
User Flag 0 Register Bank Select Overflow
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128 Byte RAM
• There are 128 bytes of RAM in the 8051.
– Assigned addresses 00 to 7FH General Purpose
Area
• The 128 bytes are divided into 3 different
groups as follows:
BIT Addressable
1. A total of 32 bytes from locations 00 to 1F Area
hex are set aside for register banks and the 128 BYTE
stack. INTERNAL RAM
Reg Bank 3
2. A total of 16 bytes from locations 20H to 2FH
Reg Bank 2
are set aside for bit-addressable read/write Register Banks
memory. Reg Bank 1
3. A total of 80 bytes from locations 30H to 7FH Reg Bank 0
are used for read and write storage, called
scratch pad.
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8051 RAM with addresses
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8051 Register Bank Structure
Bank 3 R0 R1 R2 R3 R4 R5 R6 R7
Bank 2 R0 R1 R2 R3 R4 R5 R6 R7
Bank 1 R0 R1 R2 R3 R4 R5 R6 R7
Bank 0 R0 R1 R2 R3 R4 R5 R6 R7
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8051 Register Banks with address
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8051 Programming Model
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8051 Stack
• The stack is a section of RAM used by the CPU to store
information temporarily.
– This information could be data or an address
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Bit Addressable & Byte Addressable
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Single bit Instructions
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Bit Addressable Programming
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Bit Addressable Programming
• Example: Find out to which by each of the following bits
belongs. Give the address of the RAM byte in hex
(a) SETB 42H, (b) CLR 67H, (c) CLR 0FH (d) SETB 28H, (e) CLR 12, (f) SETB 05
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Pin Description of the 8051
• 8051 family members (e.g., 8751, 89C51, 89C52,
DS89C4x0)
– Have 40 pins dedicated for various functions such as I/O, RD,
WR, address, data, and interrupts.
– Come in different packages, such as
• DIP(dual in-line package),
• QFP(quad flat package), and
• LLC(leadless chip carrier)
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XTAL1 and XTAL2 …..
• If you use a frequency source other than a crystal
oscillator, such as a TTL oscillator:
– It will be connected to XTAL1
– XTAL2 is left unconnected
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RST
• RESET pin is an input and is active high (normally low)
• Upon applying a high pulse to this pin, the microcontroller will
reset and terminate all activities
• This is often referred to as a power-on reset
• Activating a power-on reset will cause all values in the registers to
be lost
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EA
• EA’, “external access’’, is an input pin and must be
connected to Vcc or GND.
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PSEN and ALE
• PSEN, “program store enable’’, is an output pin
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I/O Port Pins
• The four 8-bit I/O ports P0, P1, P2
and P3 each uses 8 pins.
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Port 0
• Port 0 is also designated as AD0-AD7.
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Port 1 and Port 2
• In 8051-based systems with no external
memory connection:
– Both P1 and P2 are used as simple I/O.
• In 8051-based systems with external
memory connections:
– Port 2 must be used along with P0 to provide
the 16-bit address for the external memory.
– P0 provides the lower 8 bits via A0 – A7.
– P2 is used for the upper 8 bits of the 16-bit
address, designated as A8 – A15, and it cannot
be used for I/O.
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Port 3
• Port 3 can be used as input or output.
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Pin Description Summary
PIN TYPE NAME AND FUNCTION
Vss I Ground: 0 V reference.
Vcc I Power Supply: This is the power supply voltage for normal,
idle, and power-down operation.
P0.0 - P0.7 I/O Port 0: Port 0 is an open-drain, bi-directional I/O port. Port
0 is also the multiplexed low-order address and data bus
during accesses to external program and data memory.
P1.0 - P1.7 I/O Port 1: Port I is an 8-bit bi-directional I/O port.
P2.0 - P2.7 I/O Port 2: Port 2 is an 8-bit bidirectional I/O. Port 2 emits the
high order address byte during fetches from external
program memory and during accesses to external data
memory that use 16 bit addresses.
P3.0 - P3.7 I/O Port 3: Port 3 is an 8 bit bidirectional I/O port. Port 3 also
serves special features as explained.
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Pin Description Summary
PIN TYPE NAME AND FUNCTION
RST I Reset: A high on this pin for two machine cycles while the
oscillator is running, resets the device.
ALE O Address Latch Enable: Output pulse for latching the low byte
of the address during an access to external memory.
PSEN* O Program Store Enable: The read strobe to external program
memory. When executing code from the external program
memory, PSEN* is activated twice each machine cycle,
except that two PSEN* activations are skipped during
each access to external data memory.
EA*/VPP I External Access Enable/Programming Supply Voltage: EA*
must be externally held low to enable the device to fetch
code from external program memory locations. If EA* Is
held high, the device executes from internal program
memory. This pin also receives the programming supply
voltage Vpp during Flash programming. (applies for 89c5x
MCU's)
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8051 Software Overview
1. Addressing Modes
2. Instruction Set
3. Programming
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8051 Addressing Modes
• The CPU can access data in various ways, which are
called addressing modes
1. Immediate
2. Register
3. Direct
4. Register indirect
5. External Direct
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Immediate Addressing Mode
• The source operand is a constant.
• The immediate data must be preceded by the pound sign, “#”
• Can load information into any registers, including 16-bit DPTR
register
– DPTR can also be accessed as two 8-bit registers, the high byte DPH and
low byte DPL
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Register Addressing Mode
• Use registers to hold the data to be manipulated.
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SFR Registers & their Addresses
MOV 0E0H,#55H ;is the same as
MOV A,#55H ;which means load 55H into A (A=55H)
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SFR Addresses ( 1 of 2 )
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SFR Addresses ( 2 of 2 )
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Example
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Stack and Direct Addressing Mode
• Only direct addressing mode is allowed for pushing or
popping the stack.
• PUSH A is invalid.
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Register Indirect Addressing Mode
• A register is used as a pointer to the data.
• Only register R0 and R1 are used for this purpose.
• R2 – R7 cannot be used to hold the address of an
operand located in RAM.
• When R0 and R1 hold the addresses of RAM locations,
they must be preceded by the “@” sign.
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Register Indirect Addressing Mode
• Write a program to copy the value 55H into RAM memory locations 40H
to 41H using (a) direct addressing mode, (b) register indirect addressing
mode without a loop, and (c) with a loop.
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Register Indirect Addressing Mode
• The advantage is that it makes accessing data dynamic
rather than static as in direct addressing mode.
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External Direct
• External Memory is accessed.
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8051 Instruction Set
• 8051 instructions have 8-bit opcode
• There are 256 possible instructions of which 255 are
• implemented
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MOV Instruction
• MOV destination, source ; copy source to destination.
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ADD Instruction
• ADD A, source ;ADD the source operand to the
accumulator
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Structure of Assembly Language
ORG 0H ;start (origin) at location 0
MOV R5,#25H ;load 25H into R5
MOV R7,#34H ;load 34H into R7
MOV A,#0 ;load 0 into A
ADD A,R5 ;add contents of R5 to A
;now A = A + R5
ADD A,R7 ;add contents of R7 to A
;now A = A + R7
ADD A,#12H ;add to A value 12H
;now A = A + 12H
HERE: SJMP HERE ;stay in this loop
END ;end of asm source file
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Data Types & Directives
ORG 500H
DATA1: DB 28 ;DECIMAL (1C in Hex)
DATA2: DB 00110101B ;BINARY (35 in Hex)
DATA3: DB 39H ;HEX
ORG 510H
DATA4: DB “2591” ; ASCII NUMBERS
ORG 518H
DATA6: DB “My name is Joe” ;ASCII CHARACTERS
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ADD Instruction and PSW
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ADD Instruction and PSW
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Multiplication of Unsigned Numbers
MUL AB ; A B, place 16-bit result in B and A
MOV A,#25H ;load 25H to reg. A
MOV B,#65H ;load 65H in reg. B
MUL AB ;25H * 65H = E99 where B = 0EH and A = 99H
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Division of Unsigned Numbers
DIV AB ; divide A by B
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Checking an input bit
JNB (jump if no bit) ; JB (jump if bit = 1)
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Switch Register Banks
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Pushing onto Stack
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Popping from Stack
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Looping
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Loop inside a Loop (Nested Loop)
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8051 Conditional Jump Instructions
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Conditional Jump Instructions
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Conditional Jump Example
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Conditional Jump Example
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Unconditional Jump Instructions
• All conditional jumps are short jumps
– Target address within -128 to +127 of PC
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Call Instructions
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8051 Peripheral Overview
1. Timers
2. Serial Port
3. Interrupts
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8051
TIMERS
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8051 Timer/Counter
OSC ÷12
C /T = 0 TLx THx TFx
(8 Bit) (8 Bit) (1 Bit)
C /T =1
T PIN
INTERRUPT
TR
Gate
INT PIN
89
TMOD Register
GATE:
When set, timer/counter x is enabled, if INTx pin is high
and TRx is set.
When cleared, timer/counter x is enabled, if TRx bit set.
C/T*:
When set, counter operation (input from Tx input pin).
When cleared, timer operation (input from internal clock).
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TMOD Register
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TCON Register
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8051 TIMERS -TMOD
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8051 TIMERS –TMOD Cont..
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TIMER 0
OSC ÷12
C /T = 0
TL0 TH0 TF0
C /T =1
T 0 PIN
INTERRUPT
TR 0
Gate
INT 0 PIN
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TIMER 0 – Mode 0
13 Bit Timer / Counter
OSC ÷12
C /T = 0 TL0 TH0 INTERRUPT
C /T =1 TF0
T 0 PIN
(5 Bit) (8 Bit)
TR 0
Gate
INT 0 PIN
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TIMER 0 – Mode 1
16 Bit Timer / Counter
OSC ÷12
C /T = 0 TL0 TH0 INTERRUPT
C /T =1 TF0
T 0 PIN
(8 Bit) (8 Bit)
TR 0
Gate
INT 0 PIN
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TIMER 0 – Mode 2
8 Bit Timer / Counter with AUTORELOAD
OSC ÷12
C /T = 0 TL0 TH0 INTERRUPT
C /T =1 TF0
T 0 PIN
(8 Bit) (8 Bit)
TR 0
Gate Reload
INT 0 PIN
TH0
(8 Bit)
101
TIMER 0 – Mode 3
Two - 8 Bit Timer / Counter
OSC ÷12
C /T = 0 TL0 INTERRUPT
C /T =1 TF0
T 0 PIN
(8 Bit)
TR 0
Gate
INT 0 PIN
TR1
102
TIMER 0 – Mode 3
103
TIMER 1
OSC ÷12
C /T = 0
TL1 TH1 TF1
C /T =1
T1PIN
INTERRUPT
TR1
Gate
INT 1 PIN
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TIMER 1 – Mode 0
13 Bit Timer / Counter
OSC ÷12
C /T = 0 TL1 TH1 INTERRUPT
C /T =1 TF1
T1PIN
(5 Bit) (8 Bit)
TR1
Gate
INT 1 PIN
OSC ÷12
C /T = 0 TL1 TH1 INTERRUPT
C /T =1 TF1
T1PIN
(8 Bit) (8 Bit)
TR1
Gate
INT 1 PIN
OSC ÷12
C /T = 0 TL1 TH1 INTERRUPT
C /T =1 TF1
T1PIN
(8 Bit) (8 Bit)
TR1
Gate Reload
INT 1 PIN
TH1
(8 Bit)
Timer 0 Timer 1
Mode 0 Mode 0
Mode 1 Mode 1
Mode 2 Mode 2
Mode 3
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Programming Timers
• Example: Indicate which mode and which timer are
selected for each of the following.
(a) MOV TMOD, #01H (b) MOV TMOD, #20H (c) MOV
TMOD, #12H
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Programming Timers
• Find the timer’s clock frequency and its period for
various 8051-based system, with the crystal frequency
11.0592 MHz when C/T bit of TMOD is 0.
• Solution:
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Calculating Delay Length Using Timers
• To speed up the 8051, many recent versions of the 8051
have reduced the number of clocks per machine cycle
from 12 to four, or even one
• The frequency for the timer is always 1/12th the
frequency of the crystal attached to the 8051, regardless
of the 8051 version
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Ex Pr:1
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Ex Pr:2
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Ex Pr:3
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Ex Pr:4
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8051
Serial
Port 116
Basics of Serial Communication
• Computers transfer data in two ways:
– Parallel: Often 8 or more lines (wire conductors) are used to
transfer data to a device that is only a few feet away.
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Basics of Serial Communication
• Serial data communication uses two methods
– Synchronous method transfers a block of data at a time
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Asynchronous – Start & Stop Bit
• Asynchronous serial data communication is widely used
for character-oriented transmissions
– Each character is placed in between start and stop bits, this is
called framing.
– Block-oriented data transfers use the synchronous method.
• The start bit is always one bit, but the stop bit can be
one or two bits
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Data Transfer Rate
• The rate of data transfer in serial data communication is
stated in bps (bits per second).
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Registers related to Serial
Communication
1. SBUF Register
2. SCON Register
3. PCON Register
122
SBUF Register
• SBUF is an 8-bit register used solely for serial communication.
• For a byte data to be transferred via the TxD line, it must be
placed in the SBUF register.
• The moment a byte is written into SBUF, it is framed with the
start and stop bits and transferred serially via the TxD line.
• SBUF holds the byte of data when it is received by 8051 RxD
line.
• When the bits are received serially via RxD, the 8051 deframes
it by eliminating the stop and start bits, making a byte out of
the data received, and then placing it in SBUF.
123
SBUF Register
• Sample instructions:
124
SCON Register
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SCON
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SCON: Bit Description
127
SCON: Bit Description Cont..
128
Baud Rate
• The data transfer rate of given computer system
depends on communication ports incorporated into that
system
• IBM PC/XT could transfer data at the rate of 100 to 9600
bps
• Pentium-based PCs transfer data at rates as high as 56K
bps
• In asynchronous serial data communication, the baud
rate is limited to 100K bps
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Standard Baud Rates
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Baud rate & BPS
• Does 1 baud equal 1 bps?
Bps is a measure of how many bits can be transmitted during one pulse
(one baud). So, bps = baud * number of bits per baud . The two are
often confused because early modems used to transmit only 1 bit per
baud, so a 1200 baud modem would also be transmitting 1200 bps..
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RS232 Communication Device DB-25
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RS232 Communication Device DB-9
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Steps to transfer byte serially
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Setting Timers with Baud Rates
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Ex Program:1
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Ex Program:2
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8051 Serial Port – Mode 0
The Serial Port in Mode-0 has the following features:
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8051 Serial Port – Mode 1
The Serial Port in Mode-1 has the following features:
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8051 Serial Port – Mode 2
The Serial Port in Mode-2 has the following features:
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8051 Serial Port – Mode 3
The Serial Port in Mode-3 has the following features:
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Programming Serial Data Transmission
1. TMOD register is loaded with the value 20H, indicating the use of timer
1 in mode 2 (8-bit auto-reload) to set baud rate.
2. The TH1 is loaded with one of the values to set baud rate for serial data
transfer.
3. The SCON register is loaded with the value 50H, indicating serial mode
1, where an 8- bit data is framed with start and stop bits.
4. TR1 is set to 1 to start timer 1
5. TI is cleared by CLR TI instruction
6. The character byte to be transferred serially is written into SBUF
register.
7. The TI flag bit is monitored with the use of instruction JNB TI, xx to see
if the character has been transferred completely.
8. To transfer the next byte, go to step 5
142
Programming Serial Data Reception
1. TMOD register is loaded with the value 20H, indicating the use of timer 1
in mode 2 (8-bit auto-reload) to set baud rate.
2. TH1 is loaded to set baud rate
3. The SCON register is loaded with the value 50H, indicating serial mode 1,
where an 8- bit data is framed with start and stop bits.
4. TR1 is set to 1 to start timer 1
5. RI is cleared by CLR RI instruction
6. The RI flag bit is monitored with the use of instruction JNB RI, xx to see if
an entire character has been received yet
7. When RI is raised, SBUF has the byte, its contents are moved into a safe
place.
8. To receive the next character, go to step 5.
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Doubling Baud Rate
• There are two ways to increase the baud rate of data
transfer
1. By using a higher frequency crystal
2. By changing a bit in the PCON register
•We can set it to high by software and thereby double the baud rate.
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Doubling Baud Rate (cont…)
145
8051
Interrupts
146
INTERRUPTS
• An interrupt is an external or internal event that
interrupts the microcontroller to inform it that a device
needs its service
147
Interrupt Vs Polling
1. Interrupts
– Whenever any device needs its service, the device notifies the
microcontroller by sending it an interrupt signal.
– Upon receiving an interrupt signal, the microcontroller
interrupts whatever it is doing and serves the device.
– The program which is associated with the interrupt is called the
interrupt service routine (ISR) or interrupt handler.
2. Polling
– The microcontroller continuously monitors the status of a
given device.
– When the conditions met, it performs the service.
– After that, it moves on to monitor the next device until every
one is serviced.
148
Interrupt Vs Polling
• The polling method is not efficient, since it wastes much of
the microcontroller’s time by polling devices that do not
need service.
• The advantage of interrupts is that the microcontroller can
serve many devices (not all at the same time).
• Each devices can get the attention of the microcontroller
based on the assigned priority.
• For the polling method, it is not possible to assign priority
since it checks all devices in a round-robin fashion.
– Timer 0 Overflow.
– Timer 1 Overflow.
– Reception/Transmission of Serial Character.
– External Event 0.
– External Event 1.
153
8051 Interrupt related Registers
• The various registers associated with the use of
interrupts are:
154
Enabling and Disabling an Interrupt
• Upon reset, all interrupts are disabled (masked),
meaning that none will be responded to by the
microcontroller if they are activated.
155
Interrupt Enable (IE) Register
--
• EA : Global enable/disable.
• --- : Reserved for additional interrupt hardware.
158
Interrupt Priority
• We can alter the sequence of interrupt priority by assigning a
higher priority to any one of the interrupts by programming a
register called IP (interrupt priority).
• To give a higher priority to any of the interrupts, we make the
corresponding bit in the IP register high.
159
Interrupt Priority (IP) Register
Serial Port
INT 0 Pin
Timer 1 Pin
161