Mackey 2017

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Optimization of a Z-Source, Ultra-Fast Mechanically

Switched, High Efficiency DC Circuit Breaker


Landon Mackey, Md Rifat Kaisar Rachi, Chang Peng, Iqbal Husain
FREEDM Systems Center - North Carolina State University
Raleigh, NC, USA
Email: [email protected]

Abstract—A novel modification of the Z-source circuit breaker


topology is presented for low voltage applications. An ultra-fast
mechanical switch has been used in place of the solid-state switch
(thyristor) in the Z-source circuit breaker to reduce the energy
loss utilizing the very low resistance of mechanical contactors.
The proposed modification also facilitates bi-directional current
flow for distributed energy resource integration and improves
ride through capabilities during downstream load transients.
Existing Z-source circuit breaker designs utilize an impedance
network to create a forced zero current crossing in the event of
a fault in commutating thyristor to isolate the fault from source.
However, all load current must flow through the thyristor during
normal operation resulting in high loss due to on-state voltage Fig. 1: Crossed Z-source Circuit Breaker
drop of the solid-state switch.
To validate the concept and develop proper control for this
circuit breaker, both simulations and experimental studies have
been carried out. The proposed breaker has been modelled in
PSCAD for analysis. Additionally, an analytical estimation model
of the system dynamics during fault has been developed to
validate the simulations. A test circuit rated for 400 V and 20 A
has been designed, constructed and tested.
Index Terms—Circuit breaker, z-source, fast mechanical
switch, microgrids, power system protection, renewable energy
sources, bidirectional power flow, energy efficiency Fig. 2: Parallel-Connected Z-source Circuit Breaker

I. Z- SOURCE DC C IRCUIT B REAKER


A. Background of Z-source B. Circuit Modifications
This paper presents a modified version of the parallel-
Z-source topology was first proposed as an input circuit for
connected Z-source DCCB where the thyristor in the Z-
a power electronics inverter [1]. Traditionally, a thyristor is
source breaker is replaced with an ultra-fast mechanical switch
used as the solid-state switch in this circuit. Fig. 1 illustrates
(UFMS) with sub-millisecond operation time [15, 16]. Further,
a crossed Z-source configuration developed for DC circuit
this paper explores the system dynamics to develop a control
breaker applications [2–4]. The presence of the inductors
scheme for this breaker topology as shown in Fig. 3. UFMS
on the main current conduction path ensures that during
designs are researched to improve many electromechanical
the event of an overcurrent condition, fault current will be
actuator designs to achieve greater operating speeds at low,
forced through the red capacitive path as shown in Fig. 1
medium and high voltage levels [17].
because current through the inductors cannot change instantly.
Key modifications incorporated in the proposed design from
However, this crossed impedance network is disadvantageous
previously published Z-source DCCBs include:
for the systems where a common ground path is preferred.
A parallel connected Z-source circuit breaker proposed in 1) Replace load current path thyristor with UFMS for
[5] is illustrated in Fig. 2 to address this concern. In both improved efficiency.
of these Z-source circuit breakers, the thyristor experiences 2) Optimization scheme for sizing of components for max-
a negative current during fault and thus commutates off to imum power density.
isolate the fault from the source [6, 7]. Fast operation and 3) Add transient inducing thyristor in parallel with load
ability to force a current zero gives rise to Z-source Direct to facilitate protection for high impedance faults and
Current Circuit Breakers (DCCBs) being of high interest manual operation.
in DC microgrids, electric ship implementation, and future 4) Generate bidirectional protection scheme for use in dis-
transportation protection [8–14]. tributed energy systems with bidirectional current flow.

978-1-5090-2998-3/17/$31.00 ©2017 IEEE 3764


Fig. 3: Mechanically Switched Z-source Circuit Breaker
Schematic
Fig. 4: Mechanical Switch Current and Voltage Transient
during 10 A Circuit Interruption in 0.8 ms
C. Designed Circuit Parameters
The Z-source DCCB is well suited for low voltage, low
current applications in DC distribution systems. At higher cur-
rents, the inductors in the main current path become large and
costly to prevent saturation. In this research, a mechanically
switched Z-source DCCB for operation up to 1000 V and
100 A is evaluated. The design parameters shown in Table 1
correspond to the components shown in Fig. 3.

TABLE I: Circuit Design Parameters


Parameters Value Fig. 5: Mechanical Switch Current and Voltage transient
DC source Voltage 400 V during 22 A Circuit Interruption in 38 ms
Load Current 20A
Capacitors (C1 , C2 ) 380μF
Z-source Inductors (L1 , L2 ) 5mH Fig. 7 illustrates test data collected from a 10 A load current
source Inductor (L0 ) 2.5mH and 400 V source voltage test condition with fault initia-
tion through an ideal current source without any inductance.
D. Mechanical Switch Testing Although this arrangement provides a forced zero crossing
Mechanical switches offer orders of magnitude lower resis- and could commutate off a thyristor, the time window is not
tance than power electronic switches such as a thyristor thus adequate to be utilized by a mechanical switch. Additionally,
minimizing on-state losses. The mechanical switch used in the a system with zero source inductance would have a very high
prototype Z-source DCCB is a solenoid operated relay man- rate of current increase in the event of fault, which could result
ufactured by TE connectivity. Current flow in the system sig- in system damage prior to protective action being carried out.
nificantly affects operation time of the switch; which is much To improve the timing characteristics of the current-zero
faster when the interrupting current is below 10 A. When a crossing and to allow a timing delay adequate enough for the
fault occurs, the current flowing through the mechanical switch control system to determine if protective action is required, an
experiences forced zero crossings due to the arrangement of inductor is added in series with the source. It also limits the
the impedance network. The forced zero crossings allow the current rise rate in the event of a bolted fault. The source
switch to open at approximately zero current flow, minimizing inductance L0 shown in Fig. 3 provides sufficient time to
arcing and improving operation time of the mechanical switch. detect fault current and send the control signal to open the
Fig. 4 and Fig. 5 show two waveforms of current interruptions mechanical switch. Fig. 8 shows the PSCAD simulation result
at 10 A and 22 A, which are approximately 0.8 ms and 38 for a 400 V, 20 A pre-fault current system. The figure is scaled
ms for 10 A and 22 A respectively. Evidence in the waveform to show the significant current-zero crossings t1 and t2 . The
of voltage and current oscillations suggest significant arcing time difference between t1 and t2 is around 1 ms.
between the contacts during the 22 A interruption cycle. The
test data shows that once minimal current is achieved below II. A NALYTICAL M ODEL D EVELOPMENT
10 A in the mechanical switch the DCCB will interrupt fault The governing mechanism of this breaker is explored in
current in sub-millisecond periods. this section. First, an approximate analytical model for the
system dynamics during bolted fault is derived that expresses
E. Source Inductance Coordination the magnitude of source current as a function of source voltage
A relatively instantaneous forced drop in the DCCB current and passive component values of the impedance network. The
can be seen in the absence of adequate source inductance as behaviour of the current derivative during the step change in
represented in Fig. 6. The resulting switch current shown in load is studied next. Finally, an expression for relationship

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as L0 which has a value L. The source inductor is smaller in
magnitude compared to the impedance network inductors L1
and L2 . When the fault initiates, current through the Z-source
inductors cannot change instantly. However, low inductance
of L0 allows transient current to go through it towards the
capacitive path via the two capacitors C1 and C2 in the
impedance network. The breaker observes a negative current
generating the forced zero current crossings.
Fig. 6: Mechanically Switched Z-source Circuit Breaker To model the current supplied from the source during this
Schematic without Source Inductor first two zero crossings in the DCCB current, it is assumed
that current through the Z-source inductors does not change
within this time. The analysis assumes zero pre-fault current.
An approximate equivalent circuit for this period is shown
in Fig. 9. The line parameters are ignored for this analysis
since the line lengths in the distribution system are assumed
to be short. Even if the lines introduce a small resistance to
the system, they can be lumped with the load and thus will
not affect the transient behavior significantly. The model is
comprised of the series connection of LEQ and CEQ . Here,
LEQ depicts the source inductor and CEQ depicts the series
connection of impedance network capacitors C1 and C2 as
seen by the transient current during bolted fault. Therefore,
LEQ has value L and if we assume both C1 and C2 has value
Fig. 7: Switch Current without Source Inductor C, then CEQ = C2 . The fault is initiated at t = 0.
The current from the source, IL (t) and the voltage
across the equivalent capacitor, VC (t) is related to each
between time available before zero-current crossing during a other by the following equation IL (t) = C2 dVdt C (t)
. source
bolted fault is determined. This analytical approach gives the Voltage is VS therefore applying Kirchhoffs voltage law,
relationship between the available time window and the values L (t)
L dIdt + VC (t) = VS . Replacing IL (t) and simplifying it is
for the passive components. This helps the design of circuit 2

parameters for a given system and also the development of reduced to d VdtC2(t) + LC
2 2
VC (t) = LC VS . Analysis is for zero
control and protection algorithm for isolating the source from pre-fault current therefore applying initial condition VC (t) = 0
C (t)
the fault in fastest possible time with minimum stress on the and dVdt = 0 for t = 0. The final results for capacitor
mechanical switch. voltage (Eq. 1) and inductor current (Eq. 2) can be derived
based on these assumptions and the source current derivative
A. System Dynamics during Fault is given by Eq. 3.
System dynamics during the fault have been derived and  
an approximate analytical formulation is presented here. The 2
VC (t) = −VS ∗ cos ∗t + VS (1)
timing of the inductive transient must be coordinated to LC
facilitate the UFMS opening corresponding to a zero-crossing  

time [18–20] The source inductor shown in Fig. 3 is depicted VS C 2
IL (t) = √ ∗ sin ∗t (2)
2L LC

Fig. 9: Z-source Circuit Breaker Simplified Analytical


Fig. 8: Switch Current with Source Inductor Schematic

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  load changes from Ri to Rf where Rf = Rni . During the
VS 2 transient period, the current will flow through the source
IL (t) = ∗ cos ∗t (3)
L LC inductor and the impedance network capacitors as the large
impedance network inductors do not allow sudden change in
This solution is only applicable to time period for the current through them. The capacitors can be assumed to act
first two zero current crossings as shown in Fig. 8 because like a short circuit to this transient current. It can be shown
the assumption that current through the Z-source inductors that the source current during this step change is given by
remain constant is not strictly valid after that. However, this Eq. 4 and the derivative of current is given by Eq. 5.
is the most significant time window and of interest because
   
to utilize the ultra-fast opening of the mechanical switch, the VS VS VS −Rf t
IL (t) = − − ∗ exp (4)
optimum signal initiating time is shortly before the second zero Rf Rf Ri L
crossing. This ensures that the mechanical switch interrupts    
very low current as well as it will be subject to a zero-  Rf VS VS −Rf t
IL (t) = − ∗ exp (5)
crossing immediately which minimizes the arcing followed L Rf Ri L
by the breaking operation. If this is not done accordingly, Evaluating this at t = 0, it can be shown that the peak value
the source current keeps on increasing in a rising√ sinusoidal of the derivative is VLS ∗ (1 − n1 ). For a bolted fault, n = ∞.
manner. The peak of the current is given by V√ S C
2L
for a zero- In that case, the peak value of derivative will be VLS which
pre-fault current for this time window. If the pre-fault current matches with Eq. 3. This relationship is later used to develop
is I0 , the
√ peak current for this period can be expressed as by a control scheme that can differentiate between the transients
I0 + 2L . The peak current value as well as the width of
V√S C
created due to step change in load and the transients due to
this time window is directly related to the passive component fault thereby preventing false operation of the breaker. Also,
values. it helps set the tolerable threshold for the rate of change in
Fig. 10 shows the PSCAD simulation results when the current with a particular pre-fault current as this threshold will
pre-fault current is 0 A and 20 A respectively for a system vary with the pre-fault current. Based on that, a tripping signal
with the parameters shown in Table 1. For a 0 A pre-fault is sent to the breaker to isolate the source from the fault.
current, the model gives a value of 110.27 A for source
current peak whereas the simulation gives 111.3 A. For a 20 C. Zero-Crossing Time Calculation
A pre-fault current, the model gives a peak of 130.27 A in
If there is a bolted fault, the current through the mechanical
this case whereas the simulation gives 131.3 A. Therefore,
breaker experiences zero-crossing as shown in Fig. 8. Evalu-
the simulations shows that the approximated model gives
ating those zero-crossing time is essential to determine when
fairly accurate results as simulation for this time window
to turn off the breaker. It ensures that the breaker sees a zero-
of concern thereby validating the analytical approach. This
crossing during resulting in safe interruption of current. If the
simple analytical model provides a way to choose the passive
pre-fault current is given by Ipre , then we define parameter r
components for a given system and develop the optimum I
as r = Ipre Here, Ip is given by Eq. 6.
control system. p

VS C
Ip = √ (6)
2L
Equating (2) with Ipre we get two solutions for zero-
crossings which are denoted as t1 in Eq. 7 and t2 in Eq. 8
respectively.

−1 LC
t1 = sin (r) ∗ (7)
2

 −1
 LC
t2 = π − sin (r) ∗ (8)
2
Fig. 10: Source Current during Bolted Fault Here, t2 denotes the second zero-crossing. The goal is to
open the switch before this time. However, these solutions are
derived assuming that current through the impedance network
B. Step Change in Load does not change during the fault. However, there will be
If there is a step change in load for a system with this some deviation from this assumption because by the time the
breaker arrangement, the derivative of the current is dictated breaker current reaches second zero-crossing, there will be
by the supply voltage and source inductance. Let us assume, some change in the current through the impedance network
the initial current is Ii and the final current is If and they inductors. So, a correction factor is applied to t2 . The modified
are related as If = n ∗ Ii . It happens when the resistive equation for second zero-crossing is given as Eq. 9.

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  Vs Ip Ipre t2 (ms) t2 (ms) t2s (ms)
L 200 87.178 40 1.16 1.04 1.01
t2 = t2 ∗ 1 − (9)
L 1 + L2 300 130.767 50 1.2 1.08 1.05
The analytical results show that the impedance network 400 174.356 40 1.26 1.13 1.11
parameters and source inductance contribute significantly to It can be seen that with the correction applied, the zero-
the negative current peak and zero-crossing time. Depending crossing time can be calculated quite accurately using the
on the range of voltage and current of a system, it is possible analytical model. It ensures that the breaker can be opened in
to optimize the inductors and capacitors accordingly. Fig. 11 the vicinity of zero-crossing to minimize arcing if the tripping
shows the second zero-crossing time variation with the ratio of signal is sent utilizing this timing information.
source inductance to impedance network capacitor values. The
curves illustrated in Fig. 11 allow a system designer to select E. Test Prototype Validation
the ideal inductor and capacitor values to coordinate the se- In addition to simulation validation of the analytical method,
lected UFMS control for the voltage and current specifications a mechanical Z-source DCCB test prototype has been con-
of the system. structed and tested under load as shown in Fig. 12. The
experimental results validating the theory and simulation
analysis are given in Fig. 13. The experimental data with
the test prototype reconciles with the analytical model and
simulation through validation of timing, zero crossing and
system dynamics during transient. It shows that the zero-
crossing time is dictated by the passive components and the
current derivative changes as a function of supply voltage and
source inductance.

Fig. 11: Variation in Zero-Crossing Time with L/C Ratio

D. Simulation Validation
Analytical results for zero-crossing are validated with simu-
lation for the two different set of inductor and capacitor values Fig. 12: Z-source Circuit Breaker Test Prototype
which are given in Table. 2 and Table. 3. Here, t2s denotes
the zero-crossing time as obtained from simulation.
Fig. 12 shows the preliminary test prototype rated for 400
V and 20 A. The test load applied was a combination of pure
resistive loading in the form of wire wound, ceramic core re-
sistors and a 5.2 kW programmable load operating in constant
current mode to allow for a precise load current control. A
metal-oxide varistor is used to protect the mechanical switch
from over voltage during interruption. The parameter values
of the test prototype were given earlier in Table 1.

TABLE II: Simulation Results for


L = 2 mH, L1 = L2 = 5 mH and C = 380 μF
Vs Ip Ipre t2 (ms) t2 (ms) t2s (ms)
200 61.644 40 1.5 1.2 1.14
300 92.466 50 1.6 1.28 1.22
400 123.288 40 1.7 1.36 1.36

TABLE III: Simulation Results for Fig. 13: Z-source Circuit Breaker Test Prototype Waveform
L = 1 mH, L1 = L2 = 5 mH and C = 380 μF

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III. C ONTROL AND P ROTECTION L OGIC
The control logic is implemented via the flow chart shown in
Fig. 14. A delay is provided during the start to avoid tripping
due to inrush current. IT hreshold and IT hreshold depict the
threshold value for the current and rate of current change
respectively. The IT hreshold is set dynamically based on the
steady state current of the system. The status of the transient is
determined from the current derivative calculated in the digital
signal processor based on the feedback from the from the
current and voltage sensors. The controller logic differentiates
between a fault current and normal operation load change
using the current derivative information. This allows for a Fig. 15: Comparison of Various Direct Current Circuit Break-
highly customizable circuit breaker control to provide optimal ers
protection with minimal spurious trips.

V. B I - DIRECTIONAL Z- SOURCE DCCB


The proposed breaker introduces a mechanical switch in-
stead of thyristor, which allows for bidirectional DC power-
flow with no additional power loss and minimal design
modification as shown in Fig. 16. The additional component
needed is a thyristor with its associated control. Traditionally,
bi-directionality of solid state circuit breakers is achievable
through adding parallel diode paths for reverse current flow
through the switches [21] which contributes to additional
power consumption and reduced system efficiency. The me-
chanically switched Z-source DCCB removes all solid state
switches from the main line current flow path in both direc-
tions.Bidirectional current flow capability helps to facilitate
usage of distributed renewable energy resources while ensuring
system protection as shown in Fig. 16.
VI. C ONCLUSION
Replacing the thyristor in a parallel-connect Z-source Cir-
cuit Breaker with an ultra-fast mechanical switch reduces on
state power consumption of the device significantly, nearly
1500 kWh per year in the proposed 400 V 100 A prototype
compared to prior art thyristor based Z-source circuit breakers.
Fig. 14: Logic Flow Diagram of Protective Action Coordination and optimization of the control scheme to iden-
tify faults and trigger appropriate protective action have been
analyzed mathematically, simulated in PSCAD and verified
IV. C OMPARISON WITH OTHER D IRECT C URRENT
with a test prototype circuit breaker. The analytical method
C IRCUIT B REAKERS
developed provide the basis for the design and selection of
Emerging technologies are offering a variety of possibilities the various parameters of the UFMS, source inductance L0 ,
in low voltage direct current circuit protection. Each of these network inductance L1 and L2 , and network capacitance C1
technologies has their advantages and drawbacks which are and C2 .
highlighted at a high level in Fig. 15. The key characteristics The system protection logic is derived from differential cur-
reviewed for the available DCCBs to include cost, expected rent, overcurrent, and manual operation of the DCCB ensuring
system reliability, power density, operation time and system full functionality as a protection system. The analysis of DC
efficiency. The high level qualitative review of several low system dynamics and control logic allow for coordination of
voltage DCCB technologies shows that Z-source and mechan- DC system protection for cascaded protection in a distribution
ically switched Z-source DCCBs perform well in all reviewed grid.
categories.
A quantitative review of all available DCCB technologies, ACKNOWLEDGMENT
designs and optimizations would provide a more complete The authors would like to acknowledge the support of the
review of the pros and cons of each design, but such a study University of North Carolina Coastal Studies Institute for
is outside of the scope of this paper. carrying out this research.

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Fig. 16: Bi-directional, Ultra-Fast Mechanically Switched, Z-source Circuit Breaker Schematic

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