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Sheet 4 Assimbly Lec

The document discusses x86 assembly language and memory addressing modes. It describes the D, W, and Mod fields that provide information for string and data operations. It also outlines the primary 32-bit registers used in Intel Pentium processors and identifies common memory addressing modes like direct, register indirect, base+displacement, and base+index+displacement addressing.

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52 views5 pages

Sheet 4 Assimbly Lec

The document discusses x86 assembly language and memory addressing modes. It describes the D, W, and Mod fields that provide information for string and data operations. It also outlines the primary 32-bit registers used in Intel Pentium processors and identifies common memory addressing modes like direct, register indirect, base+displacement, and base+index+displacement addressing.

Uploaded by

hamzaelsherif406
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Hamza Ahmed Moustafa 2021030122

Sheet 4
1. x86 assembly language
2. D & W
➢ D-bit (Direction Bit):
• The D-bit is used in string manipulation
instructions like MOVS (Move String) and CMPS
(Compare String).
• When the D-bit is set (D=1), it indicates that the
string operations are to be performed in the forward
direction, where the source and destination operands
are incremented after each operation.
• When the D-bit is cleared (D=0), it indicates that
the string operations are to be performed in the
backward direction, where the source and destination
operands are decremented after each operation.
➢ W-bit (Word Bit):
• The W-bit indicates the operand size or the width of
the data being operated on.
• In 16-bit mode (W=0), instructions operate on 16-bit
data.
• In 32-bit mode (W=1), instructions operate on 32-bit
data.
• This bit influences the size of registers used for
arithmetic and data manipulation operations.
• For example, in instructions like MOV (Move), ADD
(Addition), SUB (Subtraction), the W-bit determines
whether the operation is performed on 16-bit or 32-
bit data.
• It's important to note that in modern x86
processors, operating in 64-bit mode, the W-bit is
implied by the processor mode and operand size
prefixes rather than being explicitly specified in
instructions.
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3. Mod (Mode) Field (bits 7-6):
• This field specifies the addressing mode used by the
instruction.
• It can take on values ranging from 00 to 11
(binary), each representing a different addressing
mode.
• Common modes include direct addressing, indirect
addressing, and various forms of register
addressing.

4. In x86 assembly language, specifically in 16-bit


mode, if the register field (REG) of an instruction
contains the binary value 010, it corresponds to the
register BX (Base register Extended).
➢ Here's a breakdown:
• In 16-bit mode, the register BX (Base register
Extended) is encoded as 010 in binary.
• The register BX is one of the general-purpose
registers available in x86 architecture.
• It is commonly used for addressing memory in certain
addressing modes or as a general-purpose register
for data manipulation.
5. in the Intel Pentium 4 microprocessor architecture,
32-bit registers are selected using register names
that are consistent with the x86 architecture
convention. The Pentium 4 processor follows the same
register naming conventions as its predecessors,
including the 32-bit registers available in the x86
architecture.
➢ Here are the primary 32-bit registers used in
the Intel Pentium 4 microprocessor:
• General-Purpose Registers:
▪ EAX: Accumulator Register
▪ EBX: Base Register
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▪ ECX: Count Register
▪ EDX: Data Register
• Index Registers:
▪ ESI: Source Index
▪ EDI: Destination Index
• Pointer and Stack Registers:
▪ ESP: Stack Pointer
▪ EBP: Base Pointer
• Segment Registers:
▪ CS: Code Segment
▪ DS: Data Segment
▪ SS: Stack Segment
▪ ES: Extra Segment
▪ FS, GS: Additional Segment Registers (in 32-bit
mode)
• Instruction Pointer:
▪ EIP: Instruction Pointer
▪ Flags Register:
• EFLAGS: Flags Register
▪ The "E" prefix in front of these register names
signifies that they are 32-bit extended registers
compared to their 16-bit counterparts in older x86
processors. These registers are used for various
purposes such as arithmetic and logic operations,
memory addressing, stack manipulation, and control
flow management.
6. memory-addressing mode
• Direct Addressing Mode (MOD = 00):
▪ In this mode, the operand's memory address is
directly encoded in the instruction.
▪ Example: MOV AX, [1234H]
• Register Indirect Addressing Mode (MOD = 01):
▪ In this mode, the operand's memory address is
specified indirectly through a register.
▪ Example: MOV AX, [BX]
• Base + Displacement Addressing Mode (MOD = 10):

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▪ In this mode, the operand's memory address is
calculated by adding a base register value and a
displacement value.
▪ Example: MOV AX, [BX + 10]
• Base + Index + Displacement Addressing Mode (MOD =
10):
▪ In this mode, the operand's memory address is
calculated by adding a base register value, an index
register value, and a displacement value.
▪ Example: MOV AX, [BX + SI + 10]
• Register Addressing Mode (MOD = 11):
▪ In this mode, the operand is directly accessed using
a register.
▪ Example: MOV AX, BX
7. Identify :
➢ SP: is a special-purpose register that holds the
memory address of the top of the stack. The
stack is a region of memory used for temporary
storage of data, particularly during subroutine
calls, parameter passing, and local variable
allocation.
➢ EBX: is one of the four general-purpose
registers available in the x86 architecture
(alongside EAX, ECX, and EDX). It's commonly
used for various purposes.
➢ DI: It is a 16-bit general-purpose register and
is part of the x86 processor's architecture. The
Destination Index register is commonly used in
string manipulation operations, such as copying
or comparing strings.
➢ EBP: It is a 32-bit general-purpose register
available in the x86 processor architecture. The
"E" prefix in "EBP" denotes that it's the 32-bit
version of the register (as opposed to its 16-
bit counterpart, "BP").

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➢ Sl: it is typically doesn't refer to a specific
register or instruction mnemonic in the Intel
processor architecture. It seems like "SL" might
be a typo or an abbreviation used in a specific
context.
8. MOV AL, [BX+DI] ; Move the contents of the memory
location pointed to by BX+DI into AL register.
9. MOV BX, [SI+76] ; Move the word from the memory
location pointed to by SI+76 into BX register.
10. the machine language equivalent of the assembly
instruction MOV SI, [BX+2]
11. In 16-bit instruction mode on a Core2
microprocessor, the instruction MOV ESI, [EAX]
12. is used in 64-bit mode on x86-64 processors
(such as Intel Core2, AMD Ryzen, etc.) to extend the
functionality of the instruction set architecture.
Its primary purpose is to allow access to additional
registers and provide support for 64-bit operations.
"Register Extension"
13. The CS (Code Segment) register is a segment
register that contains the segment selector for the
current code segment. On x86 processors, the CS
register is not directly writable using typical
instructions like MOV. Instead, the CS register can
only be modified implicitly through control transfer
instructions like CALL, RET, or by loading a new
value from the descriptor table during task
switches.

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