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    Assignment 3

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    dedehendada
    The document describes an assignment to implement a half-adder and full-adder using SystemC. It provides the schematics and requirements to create the modules, test them in sc_main, and provide a makefile to compile the code.

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    Assignment 3

    Uploaded by

    dedehendada
    12 views2 pages
    The document describes an assignment to implement a half-adder and full-adder using SystemC. It provides the schematics and requirements to create the modules, test them in sc_main, and provide a makefile to compile the code.

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    Assignment3

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    The document describes an assignment to implement a half-adder and full-adder using SystemC. It provides the schematics and requirements to create the modules, test them in sc_main, and provide a makefile to compile the code.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    12 views2 pages

    Assignment 3

    Uploaded by

    dedehendada
    The document describes an assignment to implement a half-adder and full-adder using SystemC. It provides the schematics and requirements to create the modules, test them in sc_main, and provide a makefile to compile the code.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    SystemC and Electronic System Level Design Methodology

    Assignment 3, 2024-03-18

    Abstract
    Implement a half-adder. Then use two (2) half-adders to implement a
    full adder.

    Please read carefully. All outputs required are described in the text. Five (5)
    points will be taken for each bug, missing required output and behavior.

    The half-adder SC_METHOD module


    Description

    1. A half-adder schematic is given below

    2. Use above schematic as the specification and implement a


    SC_MODULE with a SC_METHOD process, for which the module must be
    named as HalfAdder. All input and output ports must be named
    exactly the same as in the schematic.
    3. You must name the SystemC files as HalfAdder.h and
    HalfAdder.cpp. This is to make it easier to compile your code using
    my makefile. Fail to do so will be penalized with 5 pts.

    The full-adder SC_METHOD module


    Description

    1. A full-adder schematic is given below

    2. Use above schematic as the specification and implement a


    SC_MODULE with a SC_METHOD process, for which the module must be
    named as FullAdder. You must instantiate two (2) half-adders
    developed above to implement this full-adder. Again, all input and
    output ports are named exactly the same as in the schematic. Cin
    should be named as Cin and Cout should be named as Cout.
    3. You must name the SystemC files as FullAdder.h and
    FullAdder.cpp. Fail to do so will be penalized with 5 pts.

    sc_main
    Description

    1. Create two test suites in one sc_main, and you must name the file
    main.cpp, that
    o Instantiate both half-adder and full-adder modules
    o Provide all possible combinations to these modules, i.e. 4 input
    vectors to the half-adder and 8 input vectors to the full-adder.
    2. Create a trace file named RESULT.vcd. And trace ports are shown as
    follows:
     Half-adder A
     Half-adder B
     Half-adder Sum
     Half-adder Carry
     Full-adder A
     Full-adder B
     Full-adder Cin
     Full-adder S
     Full-adder Cout

    makefile
    Description

    1. A makefile must be provided, with proper modifications to your


    environment.

    Please turn in the source codes and makefile only. Combine all the files
    using zip, gzip, or tar. Please do not use rar. Do not turn in the executable.

    Due date
    2:00 PM, March 25, 2024

    Score weight (towards the final grade) 5%

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