Memory Organization 1 Lecture 43

Overview

 Memory Hierarchy

 Main Memory

 Auxiliary Memory

 Associative Memory

 Cache Memory

 Virtual Memory

 Memory Mgt Hardware

CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Memory Organization 2 Lecture 43

Virtual Memory
Give the programmer the illusion that the system has a very large memory, even though the
computer actually has a relatively small main memory

Address Space(Logical) and Memory Space(Physical)

address space memory space

virtual address Mapping

(logical address) physical address

address generated by programs actual main memory address

Address Mapping
Memory Mapping Table for Virtual Address -> Physical Address
Virtual address

Virtual Memory Main memory

address address Main
mapping memory
register table register

Physical
Address
Memory table Main memory
buffer register buffer register

CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Memory Organization 3 Lecture 43

Address Mapping
Address Space and Memory Space are each divided into fixed size group of
words called blocks or pages
Page 0
1K words group Page 1
Page 2
Address space Memory space Block 0
Page 3
N = 8K = 213 M = 4K = 212 Block 1
Page 4
Block 2
Page 5
Block 3
Page 6
Page 7
Organization of memory Mapping Table in a paged system
Page no. Line number
1 0 1 0 1 0 1 0 1 0 0 1 1 Virtual address

Table Presence
address bit
000 0 Main memory
001 11 1 Block 0
010 00 1 Block 1
011 0 01 0101010011 Block 2
100 0 Block 3
Main memory
101 01 1 address register
Memory page table 110 10 1
111 0 MBR

01 1

CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Memory Organization 4 Lecture 43

Associative Memory Page Table

Assume that
Number of Blocks in memory = m
Number of Pages in Virtual Address Space = n
Page Table
- Straight forward design -> n entry table in memory Inefficient storage space utilization
<- n-m entries of the table is empty

- More efficient method is m-entry Page Table

Page Table made of an Associative Memory
m words; (Page Number:Block Number)
Virtual address
Page no.
1 0 1 Line number Argument register

1 0 1 0 0 Key register

0 0 1 1 1
0 1 0 0 0 Associative memory
1 0 1 0 1
1 1 0 1 0
Page no. Block no.
Page Fault
Page number cannot be found in the Page Table
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Memory Organization 5 Lecture 43

Page Fault
1. Trap to the OS OS
2. Save the user registers and program state
3. Determine that the interrupt was a page fault 2 trap
4. Check that the page reference was legal and
determine the location of the page on the
backing store(disk) 1 Reference
LOAD M
5. Issue a read from the backing store to a free 0
frame 6
restart
a. Wait in a queue for this device until serviced instruction 4

b. Wait for the device seek and/or latency time bring in

free frame
missing
c. Begin the transfer of the page to a free frame 5 page
reset
6. While waiting, the CPU may be allocated to page
table
some other process
7. Interrupt from the backing store (I/O completed)
main memory
8. Save the registers and program state for the other user
9. Determine that the interrupt was from the backing store
10. Correct the page tables (the desired page is now in memory)
11. Wait for the CPU to be allocated to this process again
12. Restore the user registers, program state, and new page table, then
resume the interrupted instruction.

Processor architecture should provide the ability

to restart any instruction after a page fault.
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Memory Organization 6 Lecture 43

Page Replacement
Decision on which page to displace to make room for
an incoming page when no free frame is available
Modified page fault service routine
1. Find the location of the desired page on the backing store
2. Find a free frame
- If there is a free frame, use it
- Otherwise, use a page-replacement algorithm to select a victim frame
- Write the victim page to the backing store
3. Read the desired page into the (newly) free frame
4. Restart the user process valid/
frame invalid bit swap
out
1 victim
page
2 change to
f 0 v i invalid victim
3
4 swap
f v reset page
table for desired
new page page in
backing store
page table

physical memory
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Memory Organization 7 Lecture 43

Page Replacement Algorithms

FIFO Reference string
7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0 1 7 0 1
7 7 7 2 2 2 4 4 4 0 0 0 7 7 7
0 0 0 3 3 3 2 2 2 1 1 1 0 0
1 1 1 0 0 0 3 3 3 2 2 2 1
Page frames

FIFO algorithm selects the page that has been in memory the longest time
Using a queue - every time a page is loaded, its
- identification is inserted in the queue
Easy to implement
May result in a frequent page fault

Optimal Replacement (OPT) - Lowest page fault rate of all algorithms

Replace that page which will not be used for the longest period of time
Reference string
7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0 1 7 0 1
7 7 7 2 2 2 2 2 7
0 0 0 0 4 0 0 0
1 1 3 3 3 1 1
Page frames
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Memory Organization 8 Lecture 43

Page Replacement Algorithms

LRU
- OPT is difficult to implement since it requires future knowledge
- LRU uses the recent past as an approximation of near future.

Replace that page which has not been

used for the longest period of time

Reference string
7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0 1 7 0 1
7 7 7 2 2 4 4 4 0 1 1 1
0 0 0 0 0 0 3 3 3 0 0
1 1 3 3 2 2 2 2 2 7
Page frames

- LRU may require substantial hardware assistance

- The problem is to determine an order for the frames
defined by the time of last use

CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Memory Organization 9 Lecture 43

Page Replacement Algorithms

LRU Implementation Methods
• Counters
- For each page table entry - time-of-use register
- Incremented for every memory reference
- Page with the smallest value in time-of-use register is replaced
• Stack
- Stack of page numbers
- Whenever a page is referenced its page number is removed from the stack and
pushed on top
- Least recently used page number is at the bottom
Reference string
4 7 0 7 1 0 1 2 1 2 7 1 2

2 7
1 2
0 1
7 0
LRU Approximation 4 4

- Reference (or use) bit is used to approximate the LRU

- Turned on when the corresponding page is referenced after its initial loading
- Additional reference bits may be used
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT