ACS724 Datasheet

ACS724
Automotive-Grade, Galvanically Isolated Current Sensor IC

With Common-Mode Field Rejection in a Small-Footprint SOIC8 Package
FEATURES AND BENEFITS DESCRIPTION
• AEC-Q100 qualified The Allegro™ ACS724 current sensor IC is an economical and
• Differential Hall sensing rejects common-mode fields precise solution for AC or DC current sensing in industrial,
• 1.2 mΩ primary conductor resistance for low power loss automotive, commercial, and communications systems. The
and high inrush current withstand capability small package is ideal for space-constrained applications
• Integrated shield virtually eliminates capacitive while also saving costs due to reduced board area. Typical
coupling from current conductor to die, greatly applications include motor control, load detection and
suppressing output noise due to high dv/dt transients management, switched-mode power supplies, and overcurrent
• Industry-leading noise performance with greatly fault protection.
improved bandwidth through proprietary amplifier and
The device consists of a precise, low-offset, linear Hall
filter design techniques
sensor circuit with a copper conduction path located near the
• High-bandwidth 120 kHz analog output for faster
surface of the die. Applied current flowing through this copper
response times in control applications
conduction path generates a magnetic field which is sensed
• Filter pin allows user to filter the output for improved
by the integrated Hall IC and converted into a proportional
resolution at lower bandwidth
voltage. The current is sensed differentially in order to reject
• Patented integrated digital temperature compensation
common-mode fields, improving accuracy in magnetically
circuitry allows for near closed loop accuracy over
noisy environments. The inherent device accuracy is optimized
temperature in an open loop sensor
through the close proximity of the magnetic field to the Hall
• Small-footprint, low-profile SOIC8 package suitable for
transducer. A precise, proportional voltage is provided by the
space-constrained applications
low-offset, chopper-stabilized BiCMOS Hall IC, which is
• Filter pin simplifies bandwidth limiting for better
programmed for accuracy after packaging. The output of the
resolution at lower frequencies
device has a positive slope when an increasing current flows
Continued on the next page… through the primary copper conduction path (from pins 1 and
2, to pins 3 and 4), which is the path used for current sensing.
pe d
Ty ste
TÜV America The internal resistance of this conductive path is 1.2 mΩ typical,
te
Certificate Number:
U8V 18 02 54214 041 providing low power loss.
CB 14 11 54214 031 CB Certificate Number:
US-32848-UL The terminals of the conductive path are electrically isolated
from the sensor leads (pins 5 through 8). This allows the
PACKAGE: 8-Pin SOIC (suffix LC) ACS724 current sensor IC to be used in high-side current sense
applications without the use of high-side differential amplifiers
or other costly isolation techniques.
Not to scale Continued on the next page…
1 8
IP+ VCC
+IP
ACS724 The ACS724 outputs an
analog signal, VIOUT , that
2 7
IP+ VIOUT changes proportionally
with the bidirectional AC
IP or DC primary sensed
CBYPASS
6 current, IP , within the
3 0.1 µF
IP– FILTER specified measurement
–IP range. The FILTER pin
CF CLOAD can be used to decrease
4 5 the bandwidth in order
IP– GND 1 nF to optimize the noise
performance.
Typical Application
ACS724-DS, Rev. 14 December 13, 2018

MCO-0000227
ACS724 With Common-Mode Field Rejection in a Small-Footprint SOIC8 Package
FEATURES AND BENEFITS (continued) DESCRIPTION (continued)

• 5 V, single supply operation The ACS724 is provided in a small, low-profile surface-mount
• Output voltage proportional to AC or DC current SOIC8 package. The leadframe is plated with 100% matte tin,
• Factory-trimmed sensitivity and quiescent output voltage for which is compatible with standard lead (Pb) free printed circuit
improved accuracy board assembly processes. Internally, the device is Pb-free, except
• Chopper stabilization results in extremely stable quiescent for flip-chip high-temperature Pb-based solder balls, currently
output voltage exempt from RoHS. The device is fully calibrated prior to shipment
• Nearly zero magnetic hysteresis from the factory.
• Ratiometric output from supply voltage
SELECTION GUIDE
Sens(Typ)
IPR TA
Part Number at VCC = 5 V Packing*
(A) (°C)
(mV/A)
ACS724LLCTR-2P5AB-T ±2.5 800
ACS724LLCTR-05AB-T ±5 400
ACS724LLCTR-10AU-T 10 400
ACS724LLCTR-10AB-T ±10
200
ACS724LLCTR-20AU-T 20
–40 to 150 Tape and Reel, 3000 pieces per reel
*Contact Allegro for additional packing options.
Allegro MicroSystems, LLC 2

955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS

Characteristic Symbol Notes Rating Units
Supply Voltage VCC 6 V
Reverse Supply Voltage VRCC –0.1 V
Output Voltage VIOUT VCC + 0.5 V
Reverse Output Voltage VRIOUT –0.1 V
Operating Ambient Temperature TA Range L –40 to 150 °C
Junction Temperature TJ(max) 165 °C
Storage Temperature Tstg –65 to 165 °C
ISOLATION CHARACTERISTICS
Characteristic Symbol Notes Rating Unit
Tested ±5 pulses at 2/minute in compliance to IEC 61000-4-5
Dielectric Surge Strength Test Voltage VSURGE 6000 V
1.2 µs (rise) / 50 µs (width).
Agency type-tested for 60 seconds per UL standard 60950-
Dielectric Strength Test Voltage VISO 1 (edition 2); production-tested at VISO for 1 second, in 2400 VRMS
accordance with UL 60950-1 (edition 2).
Maximum approved working voltage for basic (single) 420 Vpk or VDC
Working Voltage for Basic Isolation VWVBI
isolation according to UL 60950-1 (edition 2) 297 Vrms
Clearance Dcl Minimum distance through air from IP leads to signal leads. 4.2 mm
Minimum distance along package body from IP leads to
Creepage Dcr 4.2 mm
signal leads.
THERMAL CHARACTERISTICS
Characteristic Symbol Test Conditions* Value Units
Mounted on the Allegro 85-0740 evaluation board with
800 mm2 of 4 oz. copper on each side, connected to pins 1
Package Thermal Resistance
RθJA and 2, and to pins 3 and 4, with thermal vias connecting 23 °C/W
(Junction to Ambient)
the layers. Performance values include the power
consumed by the PCB.
Package Thermal Resistance
RθJL Mounted on the Allegro ASEK724 evaluation board. 5 °C/W
(Junction to Lead)
*Additional thermal information available on the Allegro website.

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VCC
VCC
Master Current To All Subcircuits

Supply Programming
Control
POR
Hall
Current EEPROM and CBYPASS
Temperature
Drive Sensor Control Logic 0.1 µF
Offset
IP+ Control
Sensitivity
IP+ Control
Dynamic Offset
+
Cancellation
+
– VIOUT
RF(int)
–
IP–
IP–
GND CF FILTER
Functional Block Diagram
PINOUT DIAGRAM AND TERMINAL LIST TABLE
Terminal List Table

IP+ 1 8 VCC
Number Name Description
IP+ 2 7 VIOUT
1, 2 IP+ Terminals for current being sensed; fused internally
IP– 3 6 FILTER
3, 4 IP– Terminals for current being sensed; fused internally
IP– 4 5 GND
5 GND Signal ground terminal
6 FILTER Terminal for external capacitor that sets bandwidth
Package LC, 8-Pin SOICN 7 VIOUT Analog output signal
Pinout Diagram 8 VCC Device power supply terminal

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COMMON ELECTRICAL CHARACTERISTICS [1]: Valid through the full range of TA , VCC = 5 V, CF = 0,
unless otherwise specified
Characteristic Symbol Test Conditions Min. Typ. Max. Unit
Supply Voltage VCC 4.5 – 5.5 V
Supply Current ICC VCC = 5 V, output open – 10 14 mA
Output Capacitance Load CL VIOUT to GND – – 10 nF
Output Resistive Load RL VIOUT to GND 4.7 – – kΩ
Primary Conductor Resistance RIP TA = 25°C – 1.2 – mΩ
Internal Filter Resistance [2] RF(int) – 1.8 – kΩ
Common Mode Field Rejection Ratio CMFRR Uniform external magnetic field – 40 – dB
Primary Hall Coupling Factor G1 TA = 25°C – 11 – G/A
Secondary Hall Coupling Factor G2 TA = 25°C – 2.8 – G/A
Hall Plate Sensitivity Matching Sensmatch TA = 25°C – ±1 – %
Rise Time tr IP = IP(max), TA = 25°C, CL = 1 nF – 3 – μs
Propagation Delay tpd IP = IP(max), TA = 25°C, CL = 1 nF – 2 – μs
Response Time tRESPONSE IP = IP(max), TA = 25°C, CL = 1 nF – 4 – μs
Bandwidth BW Small signal –3 dB; CL = 1 nF – 120 – kHz
Input-referenced noise density; µA(rms)/
Noise Density IND – 150 –
TA = 25°C, CL = 1 nF √Hz
Input-referenced noise: CF = 4.7 nF,
Noise IN – 20 – mA(rms)
CL = 1 nF, BW = 18 kHz, TA = 25°C
Nonlinearity ELIN Through full range of IP –1.5 – +1.5 %
SENS_RAT_
Sensitivity Ratiometry Coefficient VCC = 4.5 to 5.5 V, TA = 25°C – 1.3 – –
COEF
QVO_RAT_
Zero-Current Output Ratiometry Coefficient VCC = 4.5 to 5.5 V, TA = 25°C – 1 – –
COEF
VOH RL = 4.7 kΩ – VCC – 0.3 – V
Saturation Voltage [3]
VOL RL = 4.7 kΩ – 0.3 – V
Output reaches 90% of steady-state
Power-On Time tPO – 80 – μs
level, TA = 25°C, IP = IPR(max) applied
Shorted Output-to-Ground Current ISC(GND) TA = 25°C – 3.3 – mA
Shorted Output-to-VCC Current ISC(VCC) TA = 25°C – 45 – mA
[1] Device may be operated at higher primary current levels, IP , ambient temperatures, TA , and internal leadframe temperatures, provided the Maximum Junction Tempera-
ture, TJ(max), is not exceeded.
[2] R
F(int) forms an RC circuit via the FILTER pin.
[3] The sensor IC will continue to respond to current beyond the range of I until the high or low saturation voltage; however, the nonlinearity in this region will be worse than
P
through the rest of the measurement range.

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xLLCTR-2P5AB PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

Characteristic Symbol Test Conditions Min. Typ.[1] Max. Unit
NOMINAL PERFORMANCE
Current Sensing Range IPR –2.5 – 2.5 A
Sensitivity Sens IPR(min) < IP < IPR(max) – 800 – mV/A
VCC ×
Zero-Current Output Voltage VIOUT(Q) Bidirectional, IP = 0 A – – V
0.5
ACCURACY PERFORMANCE
IP = IPR(max), TA = 25°C to 150°C –2.5 ±1.5 2.5 %
Total Output Error [2] ETOT
IP = IPR(max), TA = –40°C to 25°C –6.5 ±4.5 6.5 %
TOTAL OUTPUT ERROR COMPONENTS [3] ETOT = ESENS + 100 × VOE/(Sens × IP)
IP = IPR(max), TA = 25°C to 150°C –2 ±1 2 %
Sensitivity Error Esens
IP = IPR(max), TA = –40°C to 25°C –6 ±4.5 6 %
IP = 0 A, TA = 25°C to 150°C –20 ±7 20 mV
Offset Voltage VOE
IP = 0 A, TA = –40°C to 25°C –40 ±13 40 mV
LIFETIME DRIFT CHARACTERISTICS
Sensitivity Error Lifetime Drift Esens_drift –3 ±1 3 %
Total Output Error Lifetime Drift Etot_drift –3 ±1 3 %
[1] Typical values with +/- are 3 sigma values.

[2] Percentage of IP , with IP = IPR(max).
[3] A single part will not have both the maximum/minimum sensitivity error and maximum/minimum offset voltage, as that would violate the maximum/minimum total output
error specification. Also, 3 sigma distribution values are combined by taking the square root of the sum of the squares. See Application Information section.

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xLLCTR-05AB PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

NOMINAL PERFORMANCE
Current Sensing Range IPR –5 – 5 A
VCC ×
0.5
IP = IPR(max), TA = 25°C to 150°C –2.5 ±1.5 2.5 %
IP = IPR(max), TA = –40°C to 25°C –6 ±4.5 6 %
IP = IPR(max), TA = 25°C to 150°C –2 ±1 2 %
IP = IPR(max), TA = –40°C to 25°C –5.5 ±4.5 5.5 %
IP = 0 A, TA = 25°C to 150°C –15 ±7 15 mV
Offset Voltage VOE
IP = 0 A, TA = –40°C to 25°C –30 ±13 30 mV


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xLLCTR-10AU PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

NOMINAL PERFORMANCE
Current-Sensing Range IPR 0 – 10 A
VCC ×
Zero-Current Output Voltage VIOUT(Q) Unidirectional, IP = 0 A – – V
0.1
IP = IPR(max), TA = 25°C to 150°C –2.5 ±1.5 2.5 %
IP = IPR(max), TA = –40°C to 25°C –6 ±4.5 6 %
IP = IPR(max), TA = 25°C to 150°C –2 ±1 2 %
IP = IPR(max), TA = –40°C to 25°C –5.5 ±4.5 5.5 %
IP = 0 A, TA = 25°C to 150°C –15 ±7 15 mV
Offset Voltage VOE
IP = 0 A, TA = –40°C to 25°C –30 ±13 30 mV


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Characteristic Symbol Test Conditions Min. Typ.1 Max. Unit
NOMINAL PERFORMANCE
Current-Sensing Range IPR –10 – 10 A
VCC ×
0.5
IP = IPR(max), TA = 25°C to 150°C –2 ±1 2 %
Total Output Error2 ETOT
IP = IPR(max), TA = –40°C to 25°C –6 ±4.5 6 %
TOTAL OUTPUT ERROR COMPONENTS3 ETOT = ESENS + 100 × VOE/(Sens × IP)
IP = IPR(max), TA = 25°C to 150°C –1.5 ±1 1.5 %
IP = IPR(max), TA = –40°C to 25°C –5.5 ±4.5 5.5 %
IP = 0 A, TA = 25°C to 150°C –10 ±6 10 mV
Offset Voltage VOE
IP = 0 A, TA = –40°C to 25°C –30 ±8 30 mV


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Characteristic Symbol Test Conditions Min. Typ. [1] Max. Unit
NOMINAL PERFORMANCE
VCC ×
0.1
IP = IPR(max), TA = 25°C to 150°C –2 ±0.7 2 %
IP = IPR(max), TA = –40°C to 25°C –6 ±4 6 %
IP = IPR(max), TA = 25°C to 150°C –1.5 ±0.7 1.5 %
IP = IPR(max), TA = –40°C to 25°C –5.5 ±4 5.5 %
IP = 0 A, TA = 25°C to 150°C –10 ±6 10 mV
Offset Voltage VOE
IP = 0 A, TA = –40°C to 25°C –30 ±8 30 mV


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NOMINAL PERFORMANCE
VCC ×
0.5
IP = IPR(max), TA = 25°C to 150°C –2 ±0.8 2 %
IP = IPR(max), TA = –40°C to 25°C –6 ±4 6 %
IP = IPR(max), TA = 25°C to 150°C –1.5 ±0.6 1.5 %
IP = IPR(max), TA = –40°C to 25°C –5.5 ±4 5.5 %
IP = 0 A, TA = 25°C to 150°C –10 ±5 10 mV
Offset Voltage VOE
IP = 0 A, TA = –40°C to 25°C –30 ±6 30 mV


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NOMINAL PERFORMANCE
VCC ×
0.1
IP = IPR(max), TA = 25°C to 150°C –2 ±0.7 2 %
IP = IPR(max), TA = –40°C to 25°C –6 ±4 6 %
IP = IPR(max), TA = 25°C to 150°C –1.5 ±0.7 1.5 %
IP = IPR(max), TA = –40°C to 25°C –5.5 ±4 5.5 %
IP = 0 A, TA = 25°C to 150°C –10 ±6 10 mV
Offset Voltage VOE
IP = 0 A, TA = –40°C to 25°C –30 ±7 30 mV


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NOMINAL PERFORMANCE
VCC ×
0.5
IP = IPR(max), TA = 25°C to 150°C –2 ±0.8 2 %
IP = IPR(max), TA = –40°C to 25°C –6 ±4 6 %
IP = IPR(max), TA = 25°C to 150°C –1.5 ±0.8 1.5 %
IP = IPR(max), TA = –40°C to 25°C –5.5 ±4 5.5 %
IP = 0 A, TA = 25°C to 150°C –10 ±6 10 mV
Offset Voltage VOE
IP = 0 A, TA = –40°C to 25°C –30 ±6 30 mV


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NOMINAL PERFORMANCE
VCC ×
0.1
IP = IPR(max), TA = 25°C to 150°C –2 ±0.7 2 %
IP = IPR(max), TA = –40°C to 25°C –6 ±4 6 %
IP = IPR(max), TA = 25°C to 150°C –1.5 ±0.7 1.5 %
IP = IPR(max), TA = –40°C to 25°C –5.5 ±4 5.5 %
IP = 0 A, TA = 25°C to 150°C –10 ±6 10 mV
Offset Voltage VOE
IP = 0 A, TA = –40°C to 25°C –30 ±7 30 mV


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xLLCTR-50AB PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V, CF = 0,

NOMINAL PERFORMANCE
VCC ×
0.5
IP = IPR(max), TA = 25°C to 150°C –2 ±0.8 2 %
IP = IPR(max), TA = –40°C to 25°C –6 ±4 6 %
IP = IPR(max), TA = 25°C to 150°C –1.5 ±0.8 1.5 %
IP = IPR(max), TA = –40°C to 25°C –5.5 ±4 5.5 %
IP = 0 A, TA = 25°C to 150°C –10 ±6 10 mV
Offset Voltage VOE
IP = 0 A, TA = –40°C to 25°C –30 ±6 30 mV


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CHARACTERISTIC PERFORMANCE
xLLCTR-2P5AB
Zero Current Output Voltage vs. Temperature Offset Voltage vs. Temperature
2525 20.00
2520 15.00
2515
Offset Voltage (mV)

10.00
2510
VIOUT(Q) (mV)
5.00
2505
0.00
2500
-5.00
2495
-10.00
2490
2485 -15.00
2480 -20.00
-50 0 50 100 150 -50 0 50 100 150
Temperature (°C) Temperature (°C)
Sensitivity vs. Temperature Sensitivity Error vs. Temperature

820 6
810 4
Sensitivity Error (%)
Sensitivity (mV/A)
800 2
790 0
780 -2
770 -4
760 -6
-50 0 50 100 150 -50 0 50 100 150
Nonlinearity vs. Temperature Total Error at IPR(max) vs. Temperature

1.5 6
1.25
1 4
0.75
Nonlinearity (%)
0.5
Total Error (%)
2
0.25
0 0
-0.25
-0.5 -2
-0.75
-1 -4
-1.25
-1.5 -6
-50 0 50 100 150 -50 0 50 100 150
+3 Sigma Average -3 Sigma

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xLLCTR-05AB
2515 15.00
2510 10.00
Offset Voltage (mV)

2505 5.00
VIOUT(Q) (mV)
2500 0.00
2495 -5.00
2490 -10.00
2485 -15.00
-50 0 50 100 150 -50 0 50 100 150

425 8.00
420 6.00
415
4.00
Sensitivity (mV/A)
410
405 2.00
400 0.00
395 -2.00
390
-4.00
385
380 -6.00
375 -8.00
-50 0 50 100 150 -50 0 50 100 150

1.00 8.00
0.75 6.00
0.50 4.00
Nonlinearity (%)
Total Error (%)
0.25 2.00
0.00 0.00
-0.25 -2.00
-0.50 -4.00
-0.75 -6.00
-1.00 -8.00
-50 0 50 100 150 -50 0 50 100 150

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xLLCTR-10AU
515 15
510 10
Offset Voltage (mV)

505 5
VIOUT(Q) (mV)
500 0
495 -5
490 -10
485 -15
-50 0 50 100 150 -50 0 50 100 150
Temperature (ºC) Temperature (ºC)

415 4
410 3
2
405
Sensitivity (mV/A)
1
400 0
395 -1
-2
390
-3
385
-4
380 -5
375 -6
-50 0 50 100 150 -50 0 50 100 150

1.00 4
0.80 3
0.60 2
Nonlinearity (%)
0.40 1
Total Error (%)
0.20 0
0.00 -1
-0.20 -2
-0.40 -3
-0.60 -4
-0.80 -5
-1.00 -6
-50 0 50 100 150 -50 0 50 100 150

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xLLCTR-10AB
2510 10
2508 8
2506 6
Offset Voltage (mV)

2504 4
VIOUT(Q) (mV)
2502 2
2500 0
2498 -2
2496 -4
2494 -6
2492 -8
-50 0 50 100 150 -50 0 50 100 150

210 5
208 4
206 3
Sensitivity (mV/A)
204 2
202 1
200 0
198 -1
196 -2
193 -3
192 -4
190 -5
188 -6
-50 0 50 100 150 -50 0 50 100 150

1.00 5
0.80 4
0.60 3
2
Nonlinearity (%)
0.40
Total Error (%)
1
0.20
0
0.00
-1
-0.20
-2
-0.40
-3
-0.60 -4
-0.80 -5
-1.00 -6
-50 0 50 100 150 -50 0 50 100 150

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xLLCTR-20AU
508 8
506 6
504 4
Offset Voltage (mV)

502 2
VIOUT(Q) (mV)
500 0
498 -2
496 -4
494 -6
492 -8
490 -10
-50 0 50 100 150 -50 0 50 100 150

208 4
206 3
204 2
Sensitivity (mV/A)
202 1
200 0
198 -1
196 -2
194 -3
192 -4
190 -5
-50 0 50 100 150 -50 0 50 100 150

1.00 4
0.80 3
0.60 2
Nonlinearity (%)
0.40
Total Error (%)
1
0.20
0
0.00
-1
-0.20
-2
-0.40
-0.60 -3
-0.80 -4
-1.00 -5
-50 0 50 100 150 -50 0 50 100 150

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xLLCTR-20AB
2510 10
2508 8
Offset Voltage (mV)

2506 6
VIOUT(Q) (mV)
2504 4
2502 2
2500 0
2498 -2
2496 -4
2494 -6
-50 0 50 100 150 -50 0 50 100 150

104 4
103 3
102 2
Sensitivity (mV/A)
101 1
100 0
99 -1
98 -2
97 -3
96 -4
95 -5
-50 0 50 100 150 -50 0 50 100 150

1.00 4
0.80 3
0.60 2
Nonlinearity (%)
0.40
Total Error (%)
1
0.20
0
0.00
-1
-0.20
-2
-0.40
-0.60 -3
-0.80 -4
-1.00 -5
-50 0 50 100 150 -50 0 50 100 150

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xLLCTR-30AU
508 8
506 6
Offset Voltage (mV)

504 4
VIOUT(Q) (mV)
502 2
500 0
498 -2
496 -4
494 -6
492 -8
-50 0 50 100 150 -50 0 50 100 150

138 4
3
136
2
Sensitivity (mV/A)
134 1
0
132
-1
130 -2
-3
128
-4
126 -5
-50 0 50 100 150 -50 0 50 100 150

1.00 4
0.80 3
0.60 2
Nonlinearity (%)
0.40
Total Error (%)
1
0.20
0
0.00
-1
-0.20
-2
-0.40
-0.60 -3
-0.80 -4
-1.00 -5
-50 0 50 100 150 -50 0 50 100 150

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xLLCTR-30AB
2510 10
2508 8
2506 6
Offset Voltage (mV)

2504 4
VIOUT(Q) (mV)
2502 2
2500 0
2498 -2
2496 -4
2494 -6
2492 -8
-50 0 50 100 150 -50 0 50 100 150

69 4
3
68
2
Sensitivity (mV/A)
67
1
66 0
65 -1
-2
64
-3
63
-4
62 -5
-50 0 50 100 150 -50 0 50 100 150

1.00 4
0.80 3
0.60 2
Nonlinearity (%)
0.40
Total Error (%)
1
0.20
0
0.00
-1
-0.20
-2
-0.40
-3
-0.60
-0.80 -4
-1.00 -5
-50 0 50 100 150 -50 0 50 100 150

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xLLCTR-40AU
510 8.00
508 6.00
506
Offset Voltage (mV)

4.00
504
VIOUT(Q) (mV)
2.00
502
0.00
500
-2.00
498
496 -4.00
494 -6.00
492 -8.00
-50 0 50 100 150 -50 0 50 100 150

104 6
103
4
102
Sensitivity (mV/A)
101 2
100
0
99
98 -2
97
-4
96
95 -6
-50 0 50 100 150 -50 0 50 100 150

0.5 6
4
0.25
Nonlinearity (%)
Total Error (%)
0 0
-2
-0.25
-4
-0.5 -6
-50 0 50 100 150 -50 0 50 100 150

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xLLCTR-50AB
2508 8.00
2506 6.00
Offset Voltage (mV)

2504 4.00
VIOUT(Q) (mV)
2502 2.00
2500 0.00
2498 -2.00
2496 -4.00
2494 -6.00
2492 -8.00
-50 0 50 100 150 -50 0 50 100 150

44 6.00
43
4.00
42
Sensitivity (mV/A)
2.00
41
40 0.00
39
-2.00
38
-4.00
37
36 -6.00
-50 0 50 100 150 -50 0 50 100 150

0.50 6.00
4.00
0.25
Nonlinearity (%)
Total Error (%)
2.00
0.00 0.00
-2.00
-0.25
-4.00
-0.50 -6.00
-50 0 50 100 150 -50 0 50 100 150

955 Perimeter Road
ACS724 TYPICAL FREQUENCY RESPONSE
ACS724 Frequency Response

5
Magnitude [dB]
-5
-10
10 1 10 2 10 3 10 4 10 5
Frequency [Hz]
50
0
Phase [°]
-50
-100
-150
10 1 10 2 10 3 10 4 10 5
Frequency [Hz]

955 Perimeter Road
APPLICATION INFORMATION
Estimating Total Error vs. Sensed Current Here, ESENS and VOE are the ±3 sigma values for those error
terms. If there is an average sensitivity error or average offset
The Performance Characteristics tables give distribution (±3 voltage, then the average Total Error is estimated as:
sigma) values for Total Error at IPR(max); however, one often
wants to know what error to expect at a particular current. This 100 × VOEAVG
ETOTAVG (IP) = ESENSAVG +
can be estimated by using the distribution data for the compo- Sens × IP
nents of Total Error, Sensitivity Error, and Offset Voltage. The
±3 sigma value for Total Error (ETOT) as a function of the sensed The resulting total error will be a sum of ETOT and ETOT_AVG.
current (IP) is estimated as: Using these equations and the 3 sigma distributions for Sensitiv-
ity Error and Offset Voltage, the Total Error versus sensed current
(IP) is below for the ACS724LLCTR-20AB. As expected, as one
2
ETOT (IP) = ESENS +

2
( 100 × VOE
Sens × IP ) goes towards zero current, the error in percent goes towards infin-
ity due to division by zero.
8
Total Error (% of Current Measured)
4 -40ºC + 3σ
-40ºC – 3σ
2
25ºC + 3σ
0
25ºC – 3σ
-2
85ºC + 3σ
-4 85ºC – 3σ
-6
-8
0 5 10 15 20
Current (A)
Figure 1: Predicted Total Error as a Function of the Sensed Current for the ACS724LLCTR-20AB

955 Perimeter Road
Thermal Rise vs. Primary Current ASEK724/5 Evaluation Board Layout

Self-heating due to the flow-off current should be considered dur- Thermal data shown in Figure 2 was collected using the
ing the design of any current sensing system. The sensor, printed ASEK724/5 Evaluation Board (TED-85-0740-003). This board
circuit board (PCB), and contacts to the PCB will generate heat includes 1500 mm2 of 2 oz. copper (0.0694 mm) connected to
as current moves through the system. pins 1 and 2, and to pins 3 and 4, with thermal vias connecting
the layers. Top and bottom layers of the PCB are shown below in
The thermal response is highly dependent on PCB layout, copper
Figure 3.
thickness, cooling techniques, and the profile of the injected cur-
rent. The current profile includes peak current, current “on-time”,
and duty cycle. While the data presented in this section was
collected with direct current (DC), these numbers may be used
to approximate thermal response for both AC signals and current
pulses.
The plot in Figure 2 shows the measured rise in steady-state die
temperature of the ACS724 versus DC input current at an ambi-
ent temperature, TA, of 25 °C. The thermal offset curves may be
directly applied to other values of TA.
Figure 3: Top and Bottom Layers

Figure 2: Self Heating in the LA Package for ASEK724/5 Evaluation Board
Due to Current Flow
Gerber files for the ASEK724/5 evaluation board are available for
The thermal capacity of the ACS724 should be verified by the download from our website. See the technical documents section
end user in the application’s specific conditions. The maximum of the ACS724 device webpage.
junction temperature, TJ(MAX) (165°C), should not be exceeded.
Further information on this application testing is available in
the DC and Transient Current Capability application note on the
Allegro website.

955 Perimeter Road
DEFINITIONS OF ACCURACY CHARACTERISTICS

Sensitivity (Sens). The change in sensor IC output in response to Accuracy Across
a 1 A change through the primary conductor. The sensitivity is the Increasing
Temperature
product of the magnetic circuit sensitivity (G / A) (1 G = 0.1 mT) VIOUT (V)

Accuracy at
and the linear IC amplifier gain (mV/G). The linear IC ampli- 25°C Only
fier gain is programmed at the factory to optimize the sensitivity
Ideal VIOUT
(mV/A) for the full-scale current of the device. Accuracy Across
Temperature
Nonlinearity (ELIN). The nonlinearity is a measure of how linear
the output of the sensor IC is over the full current measurement Accuracy at
25°C Only
range. The nonlinearity is calculated as:
VIOUT(IPR(max)) – VIOUT(Q) IPR(min) VIOUT(Q) +IP (A)
ELIN = 1– • 100(%)
2 • VIOUT(IPR(max)/2) – VIOUT(Q) –IP (A)
where VIOUT(IPR(max)) is the output of the sensor IC with the

maximum measurement current flowing through it and
Full Scale IP
VIOUT(IPR(max)/2) is the output of the sensor IC with half of the IPR(max)
maximum measurement current flowing through it.
0A
Zero-Current Output Voltage (VIOUT(Q)). The output of the
sensor when the primary current is zero. For a unipolar supply Accuracy at
voltage, it nominally remains at 0.5 × VCC for a bidirectional 25°C Only
Decreasing
device and 0.1 × VCC for a unidirectional device. For example, Accuracy Across VIOUT (V)
Temperature
in the case of a bidirectional output device, VCC = 5 V translates
into VIOUT(Q) = 2.5 V. Variation in VIOUT(Q) can be attributed to Figure 4: Output Voltage versus Sensed Current
the resolution of the Allegro linear IC quiescent voltage trim and
thermal drift.
+ETOT
Offset Voltage (VOE). The deviation of the device output from
its ideal quiescent value of 0.5 × VCC (bidirectional) or 0.1 × VCC
(unidirectional) due to nonmagnetic causes. To convert this volt-
age to amperes, divide by the device sensitivity, Sens.
Total Output Error (ETOT). The difference between the cur-
Across Temperature
rent measurement from the sensor IC and the actual current (IP),
relative to the actual current. This is equivalent to the difference 25°C Only
between the ideal output voltage and the actual output voltage,
divided by the ideal sensitivity, relative to the current flowing
through the primary conduction path: –IP +IP
VIOUT_ideal(IP) – VIOUT (IP)

ETOT (IP) = • 100 (%)
Sensideal(IP) • IP
The Total Output Error incorporates all sources of error and is a

function of IP . At relatively high currents, ETOT will be mostly
due to sensitivity error, and at relatively low currents, ETOT will
be mostly due to Offset Voltage (VOE ). In fact, at IP = 0, ETOT
approaches infinity due to the offset. This is illustrated in Figure –ETOT
4 and Figure 5. Figure 4 shows a distribution of output voltages

versus IP at 25°C and across temperature. Figure 5 shows the cor-
responding ETOT versus IP . Figure 5: Total Output Error versus Sensed Current

955 Perimeter Road
Sensitivity Ratiometry Coefficient (SENS_RAT_COEF). The Zero-Current Output Ratiometry Coefficient (QVO_RAT_
coefficient defining how the sensitivity scales with VCC. The COEF). The coefficient defining how the zero-current output
ideal coefficient is 1, meaning the sensitivity scales proportion- voltage scales with VCC. The ideal coefficient is 1, meaning the
ally with VCC. A 10% increase in VCC results in a 10% increase output voltage scales proportionally with VCC, always being
in sensitivity. A coefficient of 1.1 means that the sensitivity equal to VCC/2. A coefficient of 1.1 means that the zero-current
increases by 10% more than the ideal proportionality case. This output voltage increases by 10% more than the ideal proportion-
means that a 10% increase in VCC results in an 11% increase in ality case. This means that a 10% increase in VCC results in an
sensitivity. This relationship is described by the following equa- 11% increase in the zero-current output voltage. This relationship
tion: is described by the following equation:
(VCC – 5 V) • SENS_RAT_COEF (VCC – 5 V) • QVO_RAT_COEF
Sens(VCC ) = Sens(5 V) 1+ VIOUTQ(VCC ) = VIOUTQ(5 V) 1+
5V 5V
This can be rearranged to define the sensitivity ratiometry coef- This can be rearranged to define the zero-current output ratiom-
ficient as: etry coefficient as:
Sens(VCC ) 5V VIOUTQ(VCC ) 5V
SENS_RAT_COEF = –1 • QVO_RAT_COEF = –1 •
Sens(5 V) (VCC – 5 V) VIOUTQ(5 V) (VCC – 5 V)

955 Perimeter Road
DEFINITIONS OF DYNAMIC RESPONSE CHARACTERISTICS

Power-On Time (tPO). When the supply is ramped to its operat- V
ing voltage, the device requires a finite time to power its internal VCC
components before responding to an input magnetic field. VCC(typ.)
Power-On Time, tPO , is defined as the time it takes for the output
90% VIOUT VIOUT
voltage to settle within ±10% of its steady-state value under an
applied magnetic field, after the power supply has reached its
minimum specified operating voltage, VCC(min), as shown in the
chart at right.
VCC(min.)
tPO
t1 t2
t1= time at which power supply reaches

minimum specified operating voltage
t2= time at which output voltage settles

within ±10% of its steady state value
under an applied magnetic field
0
t
Figure 6: Power-On Time (tPO)
Rise Time (tr). The time interval between a) when the sensor IC
reaches 10% of its full-scale value, and b) when it reaches 90% (%) Primary Current
of its full-scale value. The rise time to a step response is used to
derive the bandwidth of the current sensor IC, in which ƒ(–3 dB) 90
VIOUT
= 0.35 / tr. Both tr and tRESPONSE are detrimentally affected by
eddy-current losses observed in the conductive IC ground plane.
Rise Time, tr
Propagation Delay (tpd ). The propagation delay is measured
as the time interval a) when the primary current signal reaches 20
10
20% of its final value, and b) when the device reaches 20% of its 0
output corresponding to the applied current. Propagation Delay, tpd t
Figure 7: Rise Time (tr) and Propagation Delay (tpd)
Response Time (tRESPONSE). The time interval between a) when

the primary current signal reaches 90% of its final value, and b) (%) Primary Current
when the device reaches 90% of its output corresponding to the
applied current. 90
VIOUT
Response Time, tRESPONSE
0
t
Figure 8: Response Time (tRESPONSE)

955 Perimeter Road
PACKAGE OUTLING DRAWING

For Reference Only – Not for Tooling Use
(Reference MS-012AA)
Dimensions in millimeters – NOT TO SCALE
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
4.90 ±0.10 8°
0°
D 1.67 ±0.10
8
0.25
0.17
D1
D2
NNNNNNN
3.90 ±0.10 6.00 ±0.20 PPT-AAA
A LLLLL
D 1.71 ±0.10
1.04 REF
1
1 2
1.27
B Standard Branding Reference View
D
0.40 N = Device part number
2.45 ±0.10 P = Package Designator
T = Device temperature range
0.25 BSC A = Amperage
L = Lot number
Belly Brand = Country of Origin
SEATING PLANE
Branded Face
GAUGE PLANE
8X C
A Terminal #1 mark area
1.75 MAX
0.10 C
SEATING B Branding scale and appearance at supplier discretion
PLANE
C Reference land pattern layout (reference IPC7351 SOIC127P600X175-8M);

0.51 0.25 all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
0.31 0.10 to meet application process requirements and PCB layout tolerances.
1.27 BSC
D Hall elements (D1, D2); not to scale
0.65 1.27 Package Outline 0.65 1.27

8 8
1.27 5.60 7.35 4.20 7.35
1.75 1.575
1 2 1 2
Slot in PCB to maintain
C PCB Layout Reference View 1 4.2 mm creepage once
C PCB Layout Reference View 2
part is on PCB
For PCB assemblies that cannot support a slotted design,
the above stretched footprint may be used.
Figure 9: Package LC, 8-pin SOICN

955 Perimeter Road
Revision History
Number Descriptioon Pages Responsible Date
Added Characteristic Performance graphs and Application Information to
– All A. Latham January 16, 2015
Preliminary draft to create Final draft
1 Corrected Features and Benefits 2 A. Latham June 19, 2015
2 Added ACS724LLCTR-50AB-T variant with electrical characteristics 2, 9 A. Latham June 23, 2015
Corrected Characteristic Performance graph legends; updated Lifetime Drift A. Latham,
3 6-18 August 12, 2015
Characteristics and added Error Over Lifetime electrical characteristics S. Milano
4 Added ACS724LLCTR-05AB-T variant with electrical characteristics 2, 6 W. Bussing August 8, 2016
5 Added AEC-Q100 qualified status 1 W. Bussing June 28, 2017
Added ACS724LLCTR-05AB-T and ACS724LLCTR-50AB-T Characteristic
6 14, 21 W. Bussing August 3, 2017
Performance graphs
7 Updated Clearance and Creepage rating values 3 W. Bussing January 10, 2018
Added Dielectric Surge Strength Test Voltage characteristic 2
8 W. Bussing January 23, 2018
Added Common Mode Field Rejection Ratio characteristic 5
Added ACS724LLCTR-2P5AB-T variant with electrical characteristics 2, 6
9 W. Bussing April 13, 2018
Updated PCB Layout References in Package Outline Drawing 27
Added Hall dimensions in Package Outline Drawing 27
10 Added ACS724LLCTR-40AU-T variant with electrical characteristics and W. Bussing May 14, 2018
2, 14, 23
performance graphs
Added ACS724LLCTR-2P5AB-T performance graphs 16 M. McNally
11 June 22, 2018
Added Typical Frequency Response plots 26 W. Bussing
Added “Thermal Rise vs. Primary Current” and “ASEK724/5 Evaluation Board
12 28 W. Bussing July 3, 2018
Layout” to the Applications Information section
13 Corrected ACS724LLCTR-40AU-T Total Output Error and Sensitivity Error values 14 M. McNally November 15, 2018
14 Updated certificate numbers 1 V. Mach December 13, 2018
Copyright ©2018, Allegro MicroSystems, LLC

Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.
For the latest version of this document, visit our website:


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ACS724

Automotive-Grade, Galvanically Isolated Current Sensor IC

Not to scale Continued on the next page…

ACS724-DS, Rev. 14 December 13, 2018

FEATURES AND BENEFITS (continued) DESCRIPTION (continued)

*Contact Allegro for additional packing options.

Allegro MicroSystems, LLC 2

ABSOLUTE MAXIMUM RATINGS

*Additional thermal information available on the Allegro website.

Allegro MicroSystems, LLC 3

Master Current To All Subcircuits

Functional Block Diagram

PINOUT DIAGRAM AND TERMINAL LIST TABLE

Terminal List Table

Allegro MicroSystems, LLC 4

Allegro MicroSystems, LLC 5

xLLCTR-2P5AB PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

[1] Typical values with +/- are 3 sigma values.

Allegro MicroSystems, LLC 6

xLLCTR-05AB PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

[1] Typical values with +/- are 3 sigma values.

Allegro MicroSystems, LLC 7

xLLCTR-10AU PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

[1] Typical values with +/- are 3 sigma values.

Allegro MicroSystems, LLC 8

xLLCTR-10AB PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

[1] Typical values with +/- are 3 sigma values.

Allegro MicroSystems, LLC 9

xLLCTR-20AU PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

[1] Typical values with +/- are 3 sigma values.

Allegro MicroSystems, LLC 10

xLLCTR-20AB PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

[1] Typical values with +/- are 3 sigma values.

Allegro MicroSystems, LLC 11

xLLCTR-30AU PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

[1] Typical values with +/- are 3 sigma values.

Allegro MicroSystems, LLC 12

xLLCTR-30AB PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

[1] Typical values with +/- are 3 sigma values.

Allegro MicroSystems, LLC 13

xLLCTR-40AU PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V,

[1] Typical values with +/- are 3 sigma values.

Allegro MicroSystems, LLC 14

xLLCTR-50AB PERFORMANCE CHARACTERISTICS: TA Range L, valid at TA = – 40°C to 150°C, VCC = 5 V, CF = 0,

[1] Typical values with +/- are 3 sigma values.

Allegro MicroSystems, LLC 15

Offset Voltage (mV)

Sensitivity vs. Temperature Sensitivity Error vs. Temperature

Nonlinearity vs. Temperature Total Error at IPR(max) vs. Temperature

+3 Sigma Average -3 Sigma

Allegro MicroSystems, LLC 16

Offset Voltage (mV)

Sensitivity vs. Temperature Sensitivity Error vs. Temperature

Nonlinearity vs. Temperature Total Error at IPR(max) vs. Temperature

Total Error (%)

+3 Sigma Average -3 Sigma

Allegro MicroSystems, LLC 17

Offset Voltage (mV)

Temperature (ºC) Temperature (ºC)