Realization using Universal Gates

Content

• Digital Logic Gates and its electrical characteristics

• Basic and Compound Gates
• Characteristics
• TTL and CMOS logic families.
• Description
• Comparison
Binary Logic
• Binary variables assigns two discrete values.
• Binary logic deals with binary variables and operates with
logical meaning.
• The two values of binary variables are
• True and False (or)
• Yes and No (or)
• High and Low (or)
• 1 and 0.
Binary Logic
• Binary Logic consists of binary variables and a set
of logical operations.
• The variables are generally designated by alphabets
such as A, B, x, y, z…
• Each variable assigns a value of 0 or 1. (Two
distinct states).
• Three basic logic operations
• AND
• OR
• NOT
Logical Operations
AND operation:
• Represented using a dot or by absence of an operator.
• Example 𝑧 = 𝑥 ⋅ 𝑦 𝑜𝑟 𝑧 = 𝑥𝑦 (read it as z equal to x AND y).
OR operation:
• Represented using a + symbol.
• Example 𝑧 = 𝑥 + 𝑦 (read it as z equal to x OR y).
NOT operation
• Represented using a prime (sometimes using a overbar).
• Also called as complement operation.
• Example 𝑧 = 𝑥 ′ 𝑜𝑟 𝑧 = 𝑥.ҧ (read as z not equal to x).
Binary Logic operations
• Binary logic operation resembles arithmatic
operations.
• In fact, AND is similar to multiplication and OR is
similar to addition.
• The logic operations
AND are given
OR in a compact
NOT form
S. No z=x +
known as
x Truth
y Table.
z= x. y x y
y
x z=x’

1 0 0 0 0 0 0
0 1
2 0 1 0 0 1 1
3 1 0 0 1 0 1
1 0
4 1 1 1 1 1 1
Logic Gates

• Logic gates are electronic circuits that operate on one or more input
signals to produce an output signal.
• Electrical signals such as voltage and currents are actually analog
signals and having a certain range. (say 0 to 3v)
• But in digital systems they are interpreted as either 0 or 1.
• Voltage controlled logic circuits response to separate voltage levels
that represent logic 0 or logic1.
• Example 0v as Logic 0 and 3v as Logic 1.
• The input terminals of a logic gate accepts the inputs within the
allowable range and produces an output within the specified range.
Logic Gates
• The gates are blocks of hardware that produce the
equivalent of logic‐1 or logic‐0 output signals if
input logic requirements are satisfied.
• The graphical symbols are
Logic Gates
Gates are classified into 3 different groups.
1. Basic Gates (OR, AND & NOT gates)
2. Compound Gates
1. Universal Gates (NAND and NOR Gates)
2. Special Gates (Ex-OR, and Ex-NOR)
• Gates with multiple inputs also possible
OR Gate
• A 2 input logic gate accepts two inputs and produces 1 output.
• The output is 0 if and only if both the inputs are equal to 0.
• The logical expression is 𝑂𝑢𝑡𝑝𝑢𝑡 𝑌 = 𝐴 + 𝐵
• The logic symbol and truth table is Waveform

Truth Table
A B A+B
0 0 0
0 1 1
1 0 1
1 1 1
AND Gate
• A 2 input logic gate accepts two inputs and produces 1 output.
• The output is 1 if and only if both the inputs are equal to 1.
• The logical expression is 𝑂𝑢𝑡𝑝𝑢𝑡 𝑌 = 𝐴. 𝐵
• The logic symbol and truth table is Waveform

Truth Table
A B A.B
0 0 0
0 1 0
1 0 0
1 1 1
NOT Gate
• Not Gate accepts one input and produces 1 output.
• The output is 1 if the input is not equal to 1.
• The logical expression is 𝑂𝑢𝑡𝑝𝑢𝑡 𝑌 = 𝐴′ 𝑜𝑟 𝑌 = 𝐴.ҧ
• The logic symbol and truth table is Waveform

Truth Table
A 𝑌 = 𝐴ҧ
0 1

1 0
NOR Gate
• Known as Universal gate.
• A 2 input NOR gate accepts two inputs and produces 1 output.
• Combination of OR+NOT Gates.
• The logical expression is 𝑂𝑢𝑡𝑝𝑢𝑡 𝑌 = 𝐴 + 𝐵 ′ 𝑜𝑟 𝑨 + 𝑩 Waveform

• The output is complemented form of OR output.

Truth Table
A B 𝑨+𝑩
0 0 1
0 1 0
1 0 0
1 1 0
NAND Gate
• Known as Universal gate.
• A 2 input NAND gate accepts two inputs and produces 1 output.
• Combination of AND+NOT Gates.
• The logical expression is 𝑂𝑢𝑡𝑝𝑢𝑡 𝑌 = 𝐴. 𝐵 ′ 𝑜𝑟 𝑨. 𝑩 Waveform

• The output is complemented form of AND output.

Truth Table
A B 𝑨. 𝑩
0 0 1
0 1 1
1 0 1
1 1 0
Ex-OR Gate
• A Special gate called as Exclusive-OR gate.
• A 2 input Ex-OR gate accepts two inputs and produces 1 output.
• The logical expression is 𝑂𝑢𝑡𝑝𝑢𝑡 𝑌 = 𝐴 ⊕ 𝐵 = 𝐴′ 𝐵 + 𝐵′ 𝐴
• Also called as XOR gate.
Waveform
Truth Table
A B 𝐴⊕𝐵
0 0 0
0 1 1
1 0 1
1 1 0
Ex-NOR Gate
• A Special gate called as Exclusive-NOR gate.
• A 2 input Ex-NOR gate accepts two inputs and produces 1 output.
• The logical expression is 𝑂𝑢𝑡𝑝𝑢𝑡 𝑌 = 𝐴 ⊕ 𝐵 = 𝐴𝐵 + 𝐴′ 𝐵′
• Also called as XNOR gate.
Waveform
Truth Table
A B 𝐴⊕𝐵
0 0 1
0 1 0
1 0 0
1 1 1
Logic Gates using only NAND Gates
Logic Gates using only NOR Gates
Standard Procedure – NAND Realization
Standard Procedure – NAND Realization
Standard Procedure – NAND Realization
Standard Procedure – NOR Realization
Standard Procedure – NOR Realization
Standard Procedure – NOR Realization
Boolean Logic Realization using NAND Gates

Multi level NAND implementation.

• Consider the following Boolean function in non-standard
form 𝐹 = 𝐴 𝐶𝐷 + 𝐵 + 𝐵𝐶′

Level 1 Level 2 Level 3 Level 4

Boolean Logic Realization using NAND Gates

Multi level NAND implementation.

• Consider the following Boolean function in non-standard
form

Level 1 Level 2 Level 3 Level 4

Boolean Logic Realization using NAND Gates

Multi level NAND implementation.

• Consider the following Boolean function in non-standard
form 𝐹 = (𝐴𝐵′ + 𝐴′ 𝐵)(𝐶 + 𝐷′)
𝐹 = (𝐴𝐵′ + 𝐴′ 𝐵)(𝐶 + 𝐷′)

Level 1 Level 2 Level 3

Boolean Logic Realization using NAND Gates

Multi level NAND implementation.

• Consider the following Boolean function in non-standard
form
𝐹 = (𝐴𝐵′ + 𝐴′ 𝐵)(𝐶 + 𝐷′)

Level 1 Level 2 Level 3 Level 4

Complementary MOS
• Complementary MOS (CMOS) circuits take advantage
of the fact that both n ‐channel and p ‐channel devices
can be fabricated on the same substrate.
• CMOS circuits consist of both types of MOS devices,
interconnected to form logic functions.
• The basic circuit is the inverter, which consists of one p
‐channel transistor and one n ‐channel transistor.
• The source terminal of the p ‐channel device is at VDD,(5
to 15V) and the source terminal of the n ‐channel device
is at ground.
• The two voltage levels are 0 V for the low level and VDD
for the high level (typically, 5 V).
Complementary MOS-NOT Gate

Three rules to understand CMOS are

1. The n ‐channel MOS conducts when its
gate‐to‐source voltage is positive.
2. The p ‐channel MOS conducts when its
gate‐to‐source voltage is negative.
3. Either type of device is turned off if its
gate‐to‐source voltage is zero.
 Complementary MOS-NOT Gate

1. When the input is low, both gates are at zero potential. The input
is at-VDD relative to the source of the p ‐channel device and at
0 V relative to the source of the n ‐channel device.
2. The result is that the p‐channel device is turned on and the
n‐channel device is turned off.
3. Under these conditions, there is a low‐impedance path from
VDD to the output and a very high impedance path from output
to ground. Therefore, the output voltage approaches the high
level VDD under normal loading conditions.
4. When the input is high, both gates are at VDD and the situation
is reversed: The p ‐channel device is off and the n ‐channel
device is on. The result is that the output approaches the low
level of 0 V
Complementary MOS-NAND
Gate
Complementary MOS-NOR Gate
References
• https://www.youtube.com/watch?v=ycPH_DRIfHQ
• https://www.youtube.com/watch?v=GZ8V3M6PXkg