Dr. Rajesh Tewari: B.Tech. (Vi-Semester) Theory Examination 2017-18 Compiler Design 2
Dr. Rajesh Tewari: B.Tech. (Vi-Semester) Theory Examination 2017-18 Compiler Design 2
B.TECH.
(VI-SEMESTER) THEORY EXAMINATION 2017-18
COMPILER DESIGN
Time: 3 Hours Total Marks: 100
Note: 1. Attempt all Sections. If require any missing data; then choose suitably.
2. Any special paper specific instruction.
SECTION A
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c. What is YACC & LEX tools?
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e. Explain Error detection in Symbol Table.
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f. Explain Back patching using suitable example.
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g. What is DAG?
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h.
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What is the difference between Syntax Analyzer & Symantec Analyzer?
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j. Explain the difference between Top Down Parsing & Bottom Up Parsing.
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SECTION B
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a. What are the Phases and Passes of compiler? Explain the function of each
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Phases briefly.
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d. What is role of Symbol Table? Discuss Data Structures used for Symbol Table.
e. Construct the DAG for the expression:
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a+a*(b-c)+(b-c)*d+ e+e*(f-g)+(f-g)*h
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SECTION C
3. Attempt any one part of the following: 10 x 1 = 10
(a) i) Remove left factoring of the following grammar:
S→aAB | aA | aAC
ii) Remove left Recursion of the following grammar:
S→Ab | B, A→Ac | Sb | ε
(b) i) Explain the role of precedence & associativity for the conversion of
ambiguous grammar to unambiguous grammar.
P.T.O
4. Attempt any one part of the following: 10 x 1 = 10
(a) Check that the following grammar is LR(1) or LALR(1) or not by using their
table:
S → Aa | bAc | Bc | bBa
A→d
B→d
(b) Explain Recursive Descent Parsing using one suitable example. How it differ
from Operator Precedence Parsing.
5. Attempt any one part of the following: 10 x 1 = 10
(a) Consider the following three address code segment:
1. If i ≤ 10 goto 3
2. goto 7
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3. t1 = j * 4
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4. t2 = t1 + 10
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5. a = t2
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6. j = j + 1
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7. stop
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find the basic block & flow graph of above sequence.
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(b) Generate Three Address Code,Quadraple,Triple & Indirect Triple for the
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(a) What are lexical phase errors, syntactic phase errors & semantic phase errors?
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