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Practical Report 2 EDS125A

The document describes a digital systems practical report on latches and flip-flops. It includes objectives, equipment, methods to design an SR latch, test a D flip-flop, and build a 3-bit counter using JK flip-flops. Truth tables and diagrams are provided for each part of the experiment.

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95 views9 pages

Practical Report 2 EDS125A

The document describes a digital systems practical report on latches and flip-flops. It includes objectives, equipment, methods to design an SR latch, test a D flip-flop, and build a 3-bit counter using JK flip-flops. Truth tables and diagrams are provided for each part of the experiment.

Uploaded by

tseisimoleboheng
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Digital Systems 2

EDS125B

Practical report 2 _

Mark form group member /10


Student Nr Initials and Surname 1 2 3 4 5

1. 223060501 MP TSEISI

Pre-Laboratory Work Comments Marks


Preparation report
In-Laboratory Work
Total Marks 100%
____________________ _______________
Assessor signature Date
Latches and Flip-Flops Objective After the completion of this practical
the student should be able to understand the basic operation of
latches/flip-flops and simple

Equipment: LabVIEW
Method 1 Design an SR latch using NAND gates.

• Create a truth table and prove the circuit’s operation.

2. Construct, using a 74LS74 D flip-flop, ̅̅ a circuit to


̅
test and analyse the working of the ̅𝑃𝑅𝐸𝑆𝐸𝑇̅̅̅̅̅̅̅̅̅̅̅ and ̅𝐶𝐿𝐸𝐴𝑅̅̅̅
̅
pins.
• Determine the output Q for the waveforms given
below.

3. Design an asynchronous 3-bit counter using the


74LS112 JK flip-flop.
• Draw the resulting circuit diagram.
• Demonstrate on a 7 Segment LED display the
functioning of the circuit.
Truth Tables

1 SR latch

S R Q !Q COMMENT
0 0 latch latch invalid
0 1 0 1 reset
1 0 1 0 set
1 1 o o No change

2 74LS74 D flip-flop

PRE CLR CLK D Q !Q


0 1 X X 1 0
1 0 X X 0 1
0 0 X X 1 1
1 1 ^ 1 1 0
1 1 ^ 0 0 1
1 1 0 X Q !Q

3 3 Bit counter using a JK flip flop

Current Q3 Q2 Q
state
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1

4. 7 Segment display

Input Segment

Q3 Q2 Q a b c d e f g
0 0 0 1 1 1 1 1 1 0
0 0 1 0 1 1 0 0 0 0
0 1 0 1 1 0 1 1 0 1
0 1 1 1 1 1 1 0 0 1
1 0 0 0 1 1 0 0 1 1
1 0 1 1 0 1 1 0 1 1
1 1 0 1 0 1 1 1 1 1
1 1 1 1 0 1 0 0 0 0
0 0 0 1 1 1 1 1 1 1
0 0 1 1 1 1 1 0 1 1
!S!R LATCH

D FLIP FLOP
3Bit counter

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