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Fpgartl Verilog Coding For Sequential Circuit

The document provides examples of RTL Verilog code for sequential circuits such as counters, RAM, and bi-directional I/O ports. It includes code snippets for a D flip-flop, 4-bit up counter, 4-bit up-down counter, counter with data loading, 4-bit shift register, and 128x8 RAM.

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Duda Yamuna
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21 views

Fpgartl Verilog Coding For Sequential Circuit

The document provides examples of RTL Verilog code for sequential circuits such as counters, RAM, and bi-directional I/O ports. It includes code snippets for a D flip-flop, 4-bit up counter, 4-bit up-down counter, counter with data loading, 4-bit shift register, and 128x8 RAM.

Uploaded by

Duda Yamuna
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Verilog HDL

RTL Verilog coding for sequential circuit

• RTL Verilog coding for sequential circuit.


• Examples of RTL verilog code for sequential circuit
like counter, RAM, bi-directional I/O Ports.

Prepared By-
Mohammed Abdul Kader
Lecturer, EEE, IIUC
RTL Verilog Coding for sequential circuit
• Usually procedural assignment structure is used in designing sequential circuit.
• Declaration of ‘module’, ‘input’, ‘output’, ‘reg’, ‘always’ and ‘endmodule’ are same as used in RTL
Verilog code using procedural assignment for combinational circuit.
• The positive edge and negative edge of the clock and other signal (rst) are indicated using the
keyword ‘posedge’ and ‘negedge’ respectively.
Examples of RTL Verilog Coding for sequential circuit
Example 1: D type flip-flop with Reset (Active Low)

2
Lecture Materials on "RTL Verilog Coding for sequential circuit", By- Mohammed Abdul Kader, Lecturer, EEE, IIUC
Examples of RTL Verilog Coding for sequential circuit (Continued)
Example 2: Design of a 4-bit binary up counter.

Exercise 1: Write a RTL Verilog code to design a T-FF with Reset input.
Exercise 2: Write a RTL Verilog code to design an 8-bit down counter.

3 Lecture Materials on "RTL Verilog Coding for sequential circuit", By- Mohammed Abdul Kader, Lecturer, EEE, IIUC
Examples of RTL Verilog Coding for sequential circuit (Continued)
Example 3: Design of a 4-bit binary up-down counter.

4 Lecture Materials on "RTL Verilog Coding for sequential circuit", By- Mohammed Abdul Kader, Lecturer, EEE, IIUC
Examples of RTL Verilog Coding for sequential circuit (Continued)
Example 4: Design of a counter having data loading facility.
Note: In some applications, it is necessary to have a counter to start counting from a particular value (not
from zero). In this case the starting value needs to be loaded in the counter.

5 Lecture Materials on "RTL Verilog Coding for sequential circuit", By- Mohammed Abdul Kader, Lecturer, EEE, IIUC
Examples of RTL Verilog Coding for sequential circuit (Continued)
Example 5: Design a 4-bit Shift Register

Module shift_4 (IN, OUT, clk, rst); O=0;


input IN, clk, rst; end
output OUT; else begin
reg M, N, O, OUT; OUT=M;
always @(posedge clk or posedge rst) begin M=N;
if(rst) begin N=O;
OUT=0; O=IN;
M=0; end
N=0; end
endmodule
6
Lecture Materials on "RTL Verilog Coding for sequential circuit", By- Mohammed Abdul Kader, Lecturer, EEE, IIUC
Examples of RTL Verilog Coding for sequential circuit (Continued)
Example 6: Design of a 128X8 bit RAM

7
Lecture Materials on "RTL Verilog Coding for sequential circuit", By- Mohammed Abdul Kader, Lecturer, EEE, IIUC
Examples of RTL Verilog Coding for sequential circuit (Continued)
Example 7 : Verilog code of a circuit having Bi-directional Input/Output Ports.

Figure above shows an example circuit with bidirectional input-output. In this circuit, when rw=1
then the data in the ‘w[7:0]’ will pass to ‘din[7:0]’ which is the input of a latch. After that when the
latch will be enable then it will pass to the output of the latch. Here, W acts as an input. During this
time the signal ‘Sig_dat[7:0]’ will be high impedance state so that data in ‘Sig_dat [7:0]’ does not
conflict with the data in ‘din [7:0]’
When rw=0 then the data in Sig [7:0] will pass to W [7:0] through Sig_dat [7:0]. Here, W acts as
output. Hence W is overall a bi-directional input-output port.
8 Lecture Materials on "RTL Verilog Coding for sequential circuit", By- Mohammed Abdul Kader, Lecturer, EEE, IIUC
Examples of RTL Verilog Coding for sequential circuit (Continued)

Verilog code for Bi-directional Input-Output Ports

9 Lecture Materials on "RTL Verilog Coding for sequential circuit", By- Mohammed Abdul Kader, Lecturer, EEE, IIUC

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