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Cst206 Draft Scheme

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0% found this document useful (0 votes)
80 views9 pages

Cst206 Draft Scheme

Uploaded by

examlab57
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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02000CST206062206

Total Pages: 9
Draft Scheme of Valuation/Answer Key
(Scheme of evaluation (marks in brackets) and answers of problems/key)
APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
FOURTH SEMESTER B.TECH DEGREE (R,S) EXAMINATION, JUNE 2022 (2019 Scheme)
Course Code: CST206
Course Name: OPERATING SYSTEMS
Max. Marks: 100 Duration: 3 Hours

PART A
(Answer all questions; each question carries 3 marks) Marks

1 Bootstrap loader, located in ROM, can perform various tasks – run diagnostics to 3
determine the state of the system, initializes all aspects of the system, locate the
kernel in memory, loads it into memory and starts its execution.
2 Using dual mode of operations – user mode and kernel mode 3
3 3 child processes will be created and hence together with parent, it will print 3
Forked 4 times.
4 Blocking send. Non blocking send, Blocking receive, Non blocking receive 3
5 When several processes access and manipulate the same data concurrently and the 3
outcome of the execution depends on the particular order in which the access
takes place, is called a race condition.
Race condition definition/explanation- 1.5 marks
Example - 1.5 marks
6 Process termination , Resource preemption 3
Listing - 1 mark
explanation - 2 marks
7 If you know at compile time where the process will reside in memory, then 3
absolute code can be generated at compile time - compile time binding
If it is not known at compile time where the process will reside in memory, then
the compiler must generate relocatable code. In this case, final binding is delayed
until load time. - load time binding.
1.5 marks each
8 Logical memory size = 256 * 4KB = 2^20 B. Logical address has 20 bits.
Physical memory size = 64 * 4KB = 2^18 B. Physical address has 18 bits.

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Offset - depends upon page size. Hence 4KB = 2^12 B. So offset = 12 bits
1 mark each
9 The seek time is the time for the disk arm to move the heads to the cylinder 3
containing the desired sector. The rotational latency is the additional time for the
disk to rotate the desired sector to the disk head. The disk bandwidth is the total
number of bytes transferred, divided by the total time between the first request for
service and the completion of the last transfer.
1 mark each
10 3

diagram - 1 mark
explanation - 2 marks
PART B
(Answer one full question from each module, each question carries 14 marks)

Module -1
11 a) System call explanation – 3 marks 7
Explaining system calls using APIs and system call interface – 4 marks
b) Micro-kernel architecture – diagram – 2 marks 7
Explanation – 4 marks
Communication – through message passing – 1 mark
12 a) Functions of OS – Process Management, Memory Management, Storage 12
Management, Protection and security
Each 3 marks
b) Increased throughput, Economy of scale, Increased reliability 2
Module -2
13 a) Context switching explanation - 3 marks 6
Diagram and explanation – 3 marks

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b) Explain each scheduler – 2 marks each 8


14 a) 9

Process Arrival CPU Burst Priority


Time(ms) Time(ms)

P0 0 4 3

P1 2 5 2

P2 3 1 1

P3 4 3 4

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02000CST206062206

3 marks each for correct chart and calculations


b) 5

Diagram - 2 marks
Explanation - 3 marks
Module -3
15 a) Critical section - 1.5 marks 6
3 conditions and explanations - 4.5 marks
b) Deadlock detection - with cycle (single instance, multiple instance cases.) - 4 8
marks
Deadlock avoidance - draw claim edges and describe cycles (single instance case)
- 4 marks

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16 a) 5

Pseudocode - 3 marks
Deadlock and starvation possible with this code; - explanation 2 marks
b) 9

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Checking for the safe state : 4 Marks

State at time T0 is safe.


Request arrives : P1 <0,4,2,0>
1. Check whether Request(P1) <= Need1. <0,4,2,0> <= <0 7 5 0> .
Request is valid.
2. Check whether Request(P1) <= Available. <0,4,2,0> <= <1 5 2 0>. Hence
can try to allocate.
3. Pretend to allocate resources and arrive at the new state.
State at time T1. (Pretend Resource is allocated)
Allocation (P1) : <1 0 0 0> + <0 4 2 0> = <1 4 2 0>
Need (P1) : <0 7 5 0> - <0 4 2 0> = < 0 3 3 0>
Available : <1 5 2 0> - <0 4 2 0> = < 1 1 0 0>

<P0, P2, P3, P1, P4> is a safe sequence. Hence request can be granted.

Executing Resource request Algorithm and then checking for safe state : 5 marks

Module -4

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17 a) 9

3 marks each
b) Pure paging - results in internal fragmentation. 5
Pure segmentation - results in external fragmentation
with explanation.
2.5 marks each.
18 a) Virtual memory concept - 3 marks 6
Demand paging explanation - 3 marks
b) 8

Diagram - 3 marks
Explanation - TLB acts as cache, associative memory, address translation - 5
marks
Module -5

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19 a) Access methods - sequential , direct with explanations. 4


2 marks each
b) Linked allocation - 5 marks 10
Indexed allocation - 5 marks.
Explanations with required diagrams.
20 a) FCFS: 100 -> 20->89 -> 130 ->45 -> 120 -> 180 9
Head movement : 410 cylinders
SSTF: 100 -> 89 -> 120 -> 130 -> 180 -> 45 ->20
Head movement: 262 cylinders
CSCAN : 100 -> 120 -> 130 -> 180 -> 20 -> 45 -> 89
Head movement: 309 cylinders
3 marks each for explanation and answer.
b) Owner, Group, Universe 5
Explanation – 3 marks
Example - 2 marks
*********

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