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Microprocessor Prelim & End Sem Exam Question Bank

The document contains a question bank for a microprocessor prelim and end semester exam. It is organized into 6 modules covering topics like 8086 CPU architecture, memory addressing modes, interrupt structures, 8255 PPI, 80386 architecture, Pentium architecture, and comparisons of different processor models. The questions range from explaining CPU blocks to designing CPU systems to specific instruction sets.

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142 views3 pages

Microprocessor Prelim & End Sem Exam Question Bank

The document contains a question bank for a microprocessor prelim and end semester exam. It is organized into 6 modules covering topics like 8086 CPU architecture, memory addressing modes, interrupt structures, 8255 PPI, 80386 architecture, Pentium architecture, and comparisons of different processor models. The questions range from explaining CPU blocks to designing CPU systems to specific instruction sets.

Uploaded by

anu1529ravina
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Microprocessor Prelim & End Sem Exam Question Bank

Module 1 Marks
Q1 Explain 8086 CPU architecture with diagram 10mks.
OR
Explain (any 1) block of 8086 CPU.
5mks.
Q2 What is the advantage of Memory Banking in 8086 5mks.
Processor? Justify with example.
Q3 Give advantages of memory segmentation 5mks.
Q4 Draw and explain the write operation timing diagram 10mks.
of 8086 processor in maximum mode.
Q5 Explain minimum mode configuration of 8086 CPU. 10mks.

Q6 Explain the concept of memory banking in 8086 CPU. 10 mks./5


mks.
Q7 Explain type of interrupts of 8086 CPU or interrupts 10mks/5mks.
structure of 8086 CPU

Module 2
Q1 Explain different addressing modes of 8086 CPU. 5mks.
Q2 Explain Macros and procedure with an example 5mks.
Q3 Explain the following instructions 10mks/ 5 mks.
1)MOV AL, [BX+SI] 2) AND CL, [2000]
3) ADD AX, [BX+SI+2000] 4) IN AL, DX
5) POP BX 6) LAHF & STOSB 7) XLAT
8)DAA 9) LAHF 10) AAA
Q4. Write an ALP for 8086 to reverse a string characters. 10mks.
Q5 Write an ALP for 8086 to arrange 10 numbers in 10mks.
ascending order.

Module 3
Q1 Explain the operating modes of 8255 PPI 5 mks.
Q2 Explain the operation of three 8259 PIC in cascaded 10mks.
mode.
Q3 Explain different data transfer modes of 8257 DMA 10mks.
controller
Q4. Discuss control word format for Bit Set Reset (BSR) 5 mks.
mode of 8255 PPI
Q5 Explain mode 2 of 8255 PPI with a neat block diagram 10mks.
and show the CWR initialization
Q5. Design 8086 CPU based on the following spec:
I) MP 8086 working at 10 Mhz minimum mode 10mks
II) 64KB ROM using 16 KB devices
III) 32KB RAM using 16KB chips
Q6 Design 8086 CPU based on the following spec: 10mks.
1) MP 8086 working at 10 Mhz minimum mode
2)8KB ROM using 2KB chips
3) 16KB RAM using 8KB chips
Q7 Design 8086 CPU based on the following spec: 10mks.
1) MP 8086 working at 8 Mhz in minimum mode
2) 32KB EPROM using 16KB devices
3) 64KB SRAM using 32KB devices

Module 4
Q1 Explain the architecture of 80386 CPU 10mks.
Q2 Explain any 1 block of 80386 CPU 5mks.
Q3 Explain the segment descriptor table of 80386 CPU 10mks.
Q4 Explain EFlag registers of 80386 CPU OR 10mks.
Explain VM, RF, IOPL, NT flags of 80386 CPU
Q5 Differentiate between real mode, virtual mode and 5mks.
protected mode of 80386 processor.
Q6 Explain the memory management of 80386 in 10mks/5mks
protected mode OR Discuss the protection
mechanism of 80386 CPU for memory management.

Module 5
Q1 Explain superscalar architecture of Pentium 10mks.
processor describing in brief the pipelining stages.
Q2 Discuss the integer and floating-point pipelining 5mks./10mks.
stages of Pentium processor.
Q3 Discuss data cache organization of Pentium 10mks.
processor.
Q4 Explain MESI protocol 10mks.
Q5 Discuss Branch Prediction logic w.r.t Pentium 10mks.
processors.

Module 6
Q1 Compare/Differentiate 8086,80386, Pentium I, II,II 5mks.
processors (any 5 points)
Q2 ERxplain Hyper-threading technology and its use in 10mks.
Penitum 4.

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