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Sub-Threshold Operation of MOSFET Circuits For Ultra-Low Power Circuits

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0% found this document useful (0 votes)
22 views13 pages

Sub-Threshold Operation of MOSFET Circuits For Ultra-Low Power Circuits

Uploaded by

PauloConstantino
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Sub-threshold operation of MOSFET circuits

for ultra-low power circuits

by

Paulo Constantino

Supervisor: Dr. Naser Sedghi


Assessor: Dr. Yihua Hu

[email protected]

Department of Electrical Engineering, Electronics & Computer Science


University of Liverpool, Liverpool, UK
What is sub-threshold operation?
The operation of a MOS transistor depends on the charge concentration on its channel region.
This concentration can vary from small to large amounts.

MOS transistors are usually operated with a large charge concentration on the channel. This is
known as strong inversion operation.

The large concentration of charge leads to higher currents and thus better performance.

Strong inversion is reached when the magnitude of the gate to source voltage is higher than the
threshold voltage.

However, the MOSFET is not dead


if operated with VGS < VT .

But the I/V characteristics no longer


follow the simple quadratic relationship :

2
W V DS
I DS = μ C ox ((V GS −V T )V DS − )
L 2 MOS capacitor band diagram[1]
What is sub-threshold operation?
The characteristics behave exponentially, following this equation instead:

I DS =2mμ C ox V 2th
W
L (V −V T +ηV DS
exp GS
mV th )( ( ))
1−exp
−V DS
V th

m = the sub-threshold slope parameter,


u = charge mobility
Cox = oxide capacitance per unit area
Vth = thermal voltage, approximately 25mV
Why operate the transistor like this ?
Short answer: Energy saving.
By operating the transistor at weak inversion levels, less energy is dissipated with each
operation.

But it comes at a cost: Performance.


Because less current is available, it makes more time to charge the gate capacitances of the
following stages, which leads to a slow down.

Interesting research opportunities like: Energy harvesting

By operating circuits at such low energy levels, it becomes possible to harvest energy instead of
using batteries: Solar, Thermoelectric, Piezoelectric or Electromagnetic energy.
Using ambient energy to power circuits is also a sustainable energy solution.

Low energy circuits make energy harvesting effective, and can operate indefinitely without
need to use or change batteries.

Interesting future applications: Nano-scale robots, that use body heat as the energy source and
could navigate the body permanently and fix problems such as cleaning veins, or in the future
even fixing cells or destroying bad cells.

This of course needs very small small, and low power electronics, combined with energy
harvesting.
How to minimize energy?
We can find the minimum energy point for a given circuit, and we find that the lowest energy
point occurs in the sub-threshold region.

The total dynamic and leakage energies are given by:

CDYN = gate + shirt-circuit :


E DYN =C DYN V 2DD

I AVG
C DYN =
( )
E LEAK = I LEAK V DD T D = N LEAK I S exp
−V T
V Lτ
mV th DD d
f V DD

Where: λ C g V DD
τd =

(
I S exp
V DD −V T
mV th )
Gives the propagation delay of a reference inverter.
How to minimize energy?

The total energy is the sum of dynamic energy + leakage


energy:

E TOTAL = E DYN +E LEAK

(
= V DD C DYN + N LEAK L λ C g exp
( ))−V DD
mV th

Differentiate to find minimum. Solution:

( ( ))
2 MOSFET circuit Energies[2].
−2 e C DYN
V DD = mV th 2−LambertW
λ C g L N LEAK

This gives the approximate value of supply potential for the minimum energy point.

LambertW function argument's magnitude needs to be less than 1/e = 0.36.


How to minimize energy?

The function found can be graphed in a semi-logarithmic scale as a function of the argument:
Example A 11-stage CMOS ring oscillator was simulated in SPICE to search for the
minimum energy point.
The previous circuit was too small. Not enough leakage energy. A larger one was built.

And a minimum was found at


approx. 120mV...
The sub-threshold CMOS inverter

Propagation delay,
Power, Frequency =
strongly exponential
at weak inversion
levels.

Factor of 10 decrease
in energy from 0.4V
to 0.1V.
Sub-threshold D-Flip-Flop
Sub-threshold ripple-carry adder
At VDD = 0.4V:
3MHz = 3000,000
additions per second.
Energy per addition:
40fJ
Hence: 3000,000Hz *
40fJ = 120nW
= Power

At VDD = 0.2V:
10KHz = 10,000
additions per second.
Energy per addition:
10fJ.
Power: 100pW

Factor of 1000 in
power saving.

Factor of 0.001 in
speed.
Conclusions

Sub-threshold operation consists of operating the transistor with the supply potential
being smaller than the threshold potential of the transistor.

This leads to exponential savings in power.

But also exponential losses in speed.

Design has to be carefully tuned in order to balance energy and performance.

Interesting applications: energy harvesting, nanobots!

Thank you!

References
[1] S. M. Sze, K, N. K. Kwok, “Physics of semiconductor devices”, Wiley, 2007, New Jersey.
[2] J. Meindl, R. Swanson, "Potential improvements in power-speed performance of digital circuits", Proceedings of the IEEE, 1971, vol. 59,
no. 5, pp. 815-816.

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