ALU

Arithmetic Logic Unit (ALU)

An Arithmetic Logic Unit (ALU) is capable of performing logical operations (e.g.
AND, OR, Ex-OR, Invert etc.) in addition to the arithmetic operations (e.g.
Addition, Subtraction etc.). The control unit supplies the data required by the ALU
from memory, or from input devices, and directs the ALU to perform a specific
operation based on the instruction fetched from the memory. ALU is the
“calculator” portion of the computer.
An arithmetic logic unit(ALU) is a major component of the central processing unit of the
a computer system. It does all processes related to arithmetic and logic operations that
need to be done on instruction words. In some microprocessor architectures, the ALU
is divided into the arithmetic unit (AU) and the logic unit (LU).
An ALU can be designed by engineers to calculate many different operations. When
the operations become more and more complex, then the ALU will also become more
and more expensive and also takes up more space in the CPU and dissipates more
heat. That is why engineers make the ALU powerful enough to ensure that the CPU is
also powerful and fast, but not so complex as to become prohibitive in terms of cost
and other disadvantages.
ALU is also known as an Integer Unit (IU). The arithmetic logic unit is that part of
the CPU that handles all the calculations the CPU may need. Most of these
operations are logical in nature. Depending on how the ALU is designed, it can
make the CPU more powerful, but it also consumes more energy and creates
more heat. Therefore, there must be a balance between how powerful and
complex the ALU is and how expensive the whole unit becomes. This is why faster
CPUs are more expensive, consume more power and dissipate more heat.
Different operation as carried out by ALU can be categorized as:

● logical operations − These include operations like AND, OR, NOT,

XOR, NOR, NAND, etc.
● Bit-Shifting Operations − This pertains to shifting the positions of the
bits by a certain number of places either towards the right or left, which
is considered a multiplication or division operations.
● Arithmetic operations − This refers to bit addition and subtraction.
Although multiplication and division are sometimes used, these
operations are more expensive to make. Multiplication and subtraction
can also be done by repetitive additions and subtractions respectively.
How does an ALU work?
An arithmetic logic unit (ALU) is a digital circuit used to perform arithmetic and
logic operations. It represents the fundamental building block of the central
processing unit (CPU) of a computer. Modern CPUs contain very powerful and
complex ALUs. In addition to ALUs, modern CPUs contain a control unit (CU).
Most of the operations of a CPU are performed by one or more ALUs, which load
data from input registers. A register is a small amount of storage available as part of
a CPU. The control unit tells the ALU what operation to perform on that data and the
ALU stores the result in an output register. The control unit moves the data between
these registers, the ALU, and memory.
ALU Design
1 Introduction
● The ALU will take in two 32-bit values, and 2 control lines. Depending on the value of the control lines, the output
will be the addition, subtraction, bitwise AND or bitwise OR of the inputs.
● Schematically, here is what we want to build:
Note!
● This is an interface for the ALU: what goes in, what comes out. It also shows the ALU
as an abstraction: you can't see how it works, but you do know what it does.
● Also note that there are three status outputs as well as the main result: is the result
zero, was there a carry, and did the operation result in an overflow?
● Note: just a reminder on the difference between a carry and an overflow:
○ Carry: was there a carry in the most-significant bit which we could not output
in the given number of bits (32 bits, above).
○ Overflow: does the sign of the output differ from the inputs, indicating (for
example) that a sum of two positive numbers has overflowed and is now a
negative result!
● Some of the data and control lines are shown with a slash and a number like 32
● This indicates that the line is actually 32 lines in parallel, e.g. the result is 32-bits wide.
If you don't see a slash in the diagrams below, you can assume that the line is only 1-bit
wide.
1.1 Basic Components

● This multiplexor is a 1-bit wide

2-way multiplexor: 2 inputs, 1
bit wide each. If you add extra
control lines, you can choose
more inputs: 2 control lines is
used in a 4-way multiplexor, 3
control lines in an 8-way
multiplexor etc.
● And by using multiple
multiplexors in parallel, you can
make N-bit wide multiplexors.

The job of the multiplexor is to choose

one of several inputs, based on a control
line, and send the chosen input to the
output.
1.2 Bitwise AND
● Bitwise AND is very useful, for example to calculate an IP network's identity
● Building the logic to do 32-bit AND on two inputs: as each bit is independent, we
just need 32 AND gates in parallel
1.3 Bitwise OR

32-bit bitwise OR —- we just need 32 OR gates in parallel

1.4 Addition

● When we add bits, this may produce a carry. Columns further up need to accept a carry as input, along with two
inputs, and produce the 1-bit output and another carry for the next column up.
● The component which will perform a 1-bit ADD, receiving a carry in and producing a 1-bit output and a carry out is
called a full adder. Its interface looks like the following

full adder
● To make a 32-bit full adder, we simply have to string 32 of these 1-bit
full adders together.
● Except for the least-significant adder, each one is going to receive its
carry from the one below and pass up its own carry to the one above.
● For the most significant bit, if the carry is a 1, then we ran out of bits
to store the result.
● When the final carry output is 1, this indicates that the result was too
big to fit into 32 bits.
1.5 Subtraction
1.7 Negative Output

● When is the result negative? When its

most-significant bit is 1.
● We can wire this bit directly out of the ALU, so that it
indicates if the result is negative
1.8 Zero Output
1.9 Putting It All Together
● We now have three main units:
○ a 32-bit bitwise AND unit,
○ a 32-bit bitwise OR unit, and
○ a 32-bit ADD/SUBTRACT unit with a
control line.
○ the logic to output carry, overflow,
zero and negative.
● We can pass the inputs A and B to all three
units, and perform all three operations in
parallel: