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    22CB34 DD CO Module-2 Question Bank

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    Dattatreya mankame
    The document provides a question bank with 38 questions related to input and output organization, interrupts, DMA, and various I/O bus architectures including PCI, SCSI, and USB. The questions cover topics such as I/O interface diagrams, interrupt hardware, interrupt priority, DMA registers and operation, interrupt signaling with a single line, interrupt handling methods, bus arbitration, and read/write operations on different I/O buses.

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    22CB34 DD CO Module-2 Question Bank

    Uploaded by

    Dattatreya mankame
    24 views2 pages
    The document provides a question bank with 38 questions related to input and output organization, interrupts, DMA, and various I/O bus architectures including PCI, SCSI, and USB. The questions cover topics such as I/O interface diagrams, interrupt hardware, interrupt priority, DMA registers and operation, interrupt signaling with a single line, interrupt handling methods, bus arbitration, and read/write operations on different I/O buses.

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    22CB34_DD_CO_Module-2_Question_Bank

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    The document provides a question bank with 38 questions related to input and output organization, interrupts, DMA, and various I/O bus architectures including PCI, SCSI, and USB. The questions cover topics such as I/O interface diagrams, interrupt hardware, interrupt priority, DMA registers and operation, interrupt signaling with a single line, interrupt handling methods, bus arbitration, and read/write operations on different I/O buses.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    24 views2 pages

    22CB34 DD CO Module-2 Question Bank

    Uploaded by

    Dattatreya mankame
    The document provides a question bank with 38 questions related to input and output organization, interrupts, DMA, and various I/O bus architectures including PCI, SCSI, and USB. The questions cover topics such as I/O interface diagrams, interrupt hardware, interrupt priority, DMA registers and operation, interrupt signaling with a single line, interrupt handling methods, bus arbitration, and read/write operations on different I/O buses.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    DAYANANDA SAGAR COLLEGE OF ENGINEERING

    Department of Computer Science and Business Systems

    Course: DIGITAL DESIGN & COMPUTER ORGANIZATION


    Course Code: 22CB34
    Sem: 3
    Academic Year : 2023-24
    No of Credits: 4
    ==========================================================================
    QUESTION BANK
    ==========================================================================
    MODULE -2: INPUT & PUTPUT ORGANIZATION
    ==========================================================================
    1. With the help of a diagram explain I/o interface for an input device ( 6 M)
    2. With necessary diagram explain Interrupt hardware ( 6 M)
    3. In a situation where multiple devices capable of initiating interrupts are connected to the
    processor, explain the implementation of interrupt priority, using individual INTER and
    INTA and a common INTR line to all devices. (10 M)
    2. Define the terms ‘cycle stealing and ‘block mode’. (2 M)
    3. What is bus arbitration? Explain centralized bus arbitration. (8 M)
    4. Define memory mapped I/O and I/O mapped I/O with examples (5 M)
    5. Explain registers involved in DMA data transfer. Explain the DMA data transfer process.(8 M)
    6. Explain how interrupt requests from several IO devices can be communicated to a processor
    through a single INTR line (10M)
    7. With neat sketches, explain the various methods for handling multiple interrupt requests. (12 M)
    8. Draw the arrangement of a single bus structure and brief about memory mapped I/O. (5 M)
    9. Explain: i) Interrupt enabling; ii) Interrupt disabling; iii) Edge triggering, with respect to
    Interrupts. (10 M)
    10. With the necessary diagram explain distributed bus arbitration. Show the bus mastership
    process for the devices having ID 5 and 6 contending for bus master. (5 M)
    11. Explain the following with respect to interrupts and neat diagrams.
    i. Vectored interrupt ii. Interrupt Nesting. iii. Simultaneous request
    12. Explain the following terms:
    i) Interrupt service routine ii) Interrupt latency iii) interrupt disabling. (6 M)
    13. Explain following methods of handling interrupts from multiple devices.
    a. daisy chaining technique.
    b. Interrupt nesting/priority structure (6 M)
    15. What is an interrupt? With example illustrate the concept of interrupts. (6 M)
    16. Explain in detail, the situations where a number of devices capable of initiating interrupts
    are connected to the processor? How to resolve the problems? (8 M)
    18. Briefly discuss the main phases involved in the operation of SCSI bus. (6 M)
    19. Explain tree structure (architecture) of USB with split bus operation. (6 M)
    20. Explain with a neat block diagram, the hardware components needed for connecting a
    ........................................................................................................................................................................................................................................
    ........
    PREPARED BY: DR. DATTATREYA P M, Professor & HOD, Dept. Of CSBS, DSCE, Bangalore
    DAYANANDA SAGAR COLLEGE OF ENGINEERING
    Department of Computer Science and Business Systems

    keyboard to a processor. (8 M)
    21. Explain the architecture and protocols of USB (8 M)
    22. With necessary diagram explain READ operation on PCI bus
    23. With a neat diagram, explain in detail the input interface circuit (10M)
    24. List the functions of an I/O interface (3 M)
    25. Discuss briefly the protocols (packets) of universal serial bus (7 M)
    26. Explain the use of PCI bus in a computer system with necessary figure. (5M)
    27. List the SCSI bus signals with their functionalities. (8 M)
    28. With a block diagram, explain how the printer is interfaced to the processor (8 M)
    29. Explain the architecture and addressing scheme of USB (8 M)
    30. List the sequence of events that takes place when a processor sends a command to SCSI
    controller. Take an example for reading data from disk where the data are not stored in
    contiguous memory. (10 M)
    31. Distinguish between the following: (6 M)
    i) Subroutine ii) Interrupt service routine
    32. Write a note on different types of exceptions (6 M)
    33. With the help of a neat diagram explain use of DMA controllers in a computer system ( 10 M)
    34. Explain input transfer on synchronous bus ( 8 M)
    35. Explain input transfer on Asynchronous bus ( 8 M)
    36. List and explain data transfer signals used on PCI Bus ( 6 M)
    37. Write a note on USB packet formats ( 6 M)
    38. Draw the timing diagram for USB output transfer ( 6M )

    ........................................................................................................................................................................................................................................
    ........
    PREPARED BY: DR. DATTATREYA P M, Professor & HOD, Dept. Of CSBS, DSCE, Bangalore

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