USN COURSE BEE303

Fifth Semester B.E. / B. Arch. / MCA / M.Tech. Semester End Examination, MAR/APR. 2023-24
ANALOG ELECTRONIC CIRCUITS (Model Question Paper)
Time: 3 Hours Max. Marks: 100
Instructions: 1. Answer any Five full questions choosing ONE from each unit.

UNIT - I L CO PO M
1 a. Explain the working of negative clamper circuit. Draw the required waveforms
(2) (1) ( 1 ) ( 5)
b. Design a fixed bias circuit for the following specifications:
𝑉𝐶𝐶= 12𝑉, 𝐼𝐶 = 3𝑚𝐴, 𝑉𝐶𝐸= 6𝑉, 𝛽 = 100
(2) (1) ( 1 ) ( 5)
c. For the voltage divider bias circuit, derive an expression for stability factor 𝑆𝐼𝑐0 and explain the
variation of 𝑆𝐼𝑐0 for different cases.
( 3) (1 ) (2 ) (10)
2 a. Explain the working of series clipping circuit to clip the input sinusoidal signal above reference
level. Draw the waveforms and transfer characteristics.
( 1) (1) ( 1 ) ( 5)
b. For the emitter stabilized bias circuit, calculate the location of operating point Q and the voltages
𝑉𝐵 , 𝑉𝐶 , 𝑉𝐵𝐶 if 𝑅𝐶 = 3.3𝑘Ω, 𝑅𝐵 = 220𝑘Ω, 𝑅𝐸 = 1𝑘Ω, 𝑉𝐶𝐶 = 10𝑉, 𝛽 = 150.
( 3) (1) ( 2 ) ( 5)
c. For the fixed bias circuit, derive an expression for stability factors 𝑆𝐼𝑐𝑜, 𝑆𝑉𝐵𝐸 , 𝑆𝛽 and also obtain
the relation between (i) 𝑆𝐼𝑐𝑜, 𝑎𝑛𝑑 𝑆𝑉𝐵𝐸 , (ii) 𝑆𝐼𝑐𝑜, 𝑎𝑛𝑑 𝑆𝛽 .
(3) (1) (2 ) ( 10)
UNIT – II L CO PO M
3 a. Draw the hybrid parameter model for common base and common emitter modes along with the
suitable equations.
( 3) (2) ( 1) ( 6)
b. For the common collector amplifier, calculate current gain, input resistance, voltage gain and
output impedance if 𝑉𝐶𝐶 = 10𝑉, 𝑅1 = 6𝑘Ω, 𝑅2 = 6𝑘Ω, 𝑅𝑆 = 600Ω, 𝑅𝐸 = 1𝑘Ω, 𝑅L = 10kΩ. h-
25𝜇𝐴
parameters are ℎ𝑜𝑐 = 𝑉 , ℎ𝑟𝑐 = 1, ℎ𝑓𝑐 = −101, ℎ𝑖𝑐 = 1.2𝑘Ω . Use exact h-parameter model.
( 3) (2) (2 ) (10)
c. Compare common base, common collector and common emitter modes.
(1) (2) (1) ( 4)
4 a. Explain the effect of input RC network, output RC network and bypass network on the low
frequency response of RC coupled amplifier.
( 3) (2 ) (1 ) (10)
b. Using hybrid pi model, derive an expression for common emitter short circuit current gain and its
variation on frequency. Also obtain expressions for 𝑓𝛽 𝑎𝑛𝑑 𝑓𝑇 .
( 4) (2) (2 ) (10)
UNIT - III L CO PO M
5 a. For the Darlington connection, derive an expression for current gain and input resistance for first
and second stage. Also calculate overall current gain.
(3) (3) (1 ) (10)
b. For the two stage CE-CE , RC coupled amplifier, 𝑅1 = 220𝑘Ω, 𝑅2 = 22𝑘Ω, 𝑅𝐶 = 3.3𝑘Ω. 𝑅𝐸 =
470Ω, 𝑅𝑆 = 600Ω , 𝐶𝐸 = 47𝜇𝐹, 𝐶1 = 𝐶2 = 0.1𝜇𝐹 𝑓𝑜𝑟 𝑡ℎ𝑒 𝑓𝑖𝑟𝑠𝑡 𝑠𝑡𝑎𝑔𝑒. For the second stage
the component values are 𝑅1′ = 33𝑘Ω, 𝑅2′ = 3.3𝑘Ω, 𝑅𝐶′ = 4.7𝑘Ω, 𝑅𝐸′ = 330Ω, 𝐶𝐸′ =
10𝜇𝐹, 𝑉𝐶𝐶 = 10𝑉, ℎ𝑖𝑒 = 1.2𝑘Ω, ℎ𝑓𝑒 = 50 . Calculate the overall voltage gain taking source
Note: L (Level), CO (Course Outcome), PO (Programme Outcome), M (Marks)
 resistance into account, input resistance and output resistance. Draw the circuit diagram and use
approximate hybrid model.
( 4) (3) (2 ) (10)
6 a. Explain the features of following feedback amplifiers:
(i)Voltage series feedback amplifiers
(ii)Current shunt feedback amplifiers
( 2) (3) (1 ) (10)
b. For the current series feedback amplifier, obtain an expression for input resistance with feedback
and output resistance with feedback.
( 2) (3) (1 ) (10)
UNIT - IV L CO PO M
7 a. Define total harmonic distortion in power amplifiers. Hence derive an expression for second
harmonic distortion in Class-A power amplifier.
( 2) (4) (1) (10)
b. Compare push-pull and complementary symmetry Class B power amplifiers.
( 1) (4) (1) ( 5)
c. In class B push-pull amplifier, show that efficiency at maximum power dissipation is only 50 %.
(2) (4) (1 ) (5)
8 a. Explain Barkhausen criteria for sustained oscillations.
( 2) (4) (1 ) (5)
b. For Wien bridge oscillator, derive an expression for frequency of oscillations. Also calculate the
minimum value of 𝐴 𝑎𝑛𝑑 𝛽.
( 4) (4) (2) (10)
c. Calculate the frequency of oscillations in Colpitt’s oscillator if 𝐶1 = 𝐶2 = 3𝑛𝐹, 𝐿 = 200𝜇𝐻.
Draw the circuit diagram.
( 3) (4) (2) ( 5)
UNIT -V L CO PO M
9 a. Compare BJT and FET on different parameters.
( 2) (5) (1 ) (5)
b. Explain the construction of JFET and its characteristics.
( 2) (5) (1 ) (10)
c. Explain the dc analysis and working of fixed bias circuit of JFET.
( 2) (5) (1 ) ( 5)
10 a. Consider JFET in common source configuration working with self bias , bypassed source
resistance mode. Obtain expressions for input impedance, output impedance and voltage gain.
Draw the small signal model
( 3) (5) ( 2) ( 6)
b. For the voltage divider bias circuit of JFET, 𝑅1 = 22𝑘Ω, 𝑅2 = 12𝑘Ω, 𝑅𝐷 = 1𝑘Ω, 𝑅𝑆 =
2.2𝑘Ω, 𝑉𝐷𝐷 = 10𝑉, 𝐼𝐷𝑆𝑆 = 10 𝑚𝐴, 𝑉𝑝 = −3𝑉 . Calculate the drain current, voltage between gate
and source, voltage between drain and source, voltage at the gate and source.
( 3) ( 5) ( 2) (10)
c. Compare D-MOSFET and E-MOSFET devices.
(2) (5) (1 ) ( 4)

Note: L (Level), CO (Course Outcome), PO (Programme Outcome), M (Marks)