Ic Overview Session3 Kmap
Ic Overview Session3 Kmap
Optimize Boolean
Functions and 1. K-map
Sequential Circuits
LOGIC GATE
KARNAUGH MAP
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LOGIC GATE
KARNAUGH MAP – 2 VARIABLES
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LOGIC GATE
KARNAUGH MAP – 2 VARIABLES
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LOGIC GATE
KARNAUGH MAP – 2 VARIABLES GROUPING
B 0 1 B 0 1
A A
0 1 1 0 1 1
1 1 1 1 1
B 0 1
A
0 1 1
1 1
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LOGIC GATE
KARNAUGH MAP – 2 VARIABLES
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LOGIC GATE
KARNAUGH MAP – 3 VARIABLES
BC 00 01 11 10 BC 00 01 11 10
A A
0 0
1 1
F(A,B,C)= F(A,B,C)=
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LOGIC GATE
KARNAUGH MAP – 3 VARIABLES
When the SOP Boolean functions is not enough (lack of variables to form a minterm).
For example: BC 00 01 11 10
F(A,B,C) = A’ + A.B’ + A.B.C’ A
m0 m1 m3 m2
A B C F 0
0 0 0 1
0 0 1 1
1 m4 m5 m7 m6
0 1 0 1
BC 00 01 11 10
0 1 1 1 A
1 0 0 1 1 1 1 1
1 0 1 1
0
1 1 0 1 1 1 1 1
1 1 1 0
F(A,B,C)= 12
LOGIC GATE
KARNAUGH MAP – 3 VARIABLES
When the SOP Boolean functions is not enough (lack of variables to form a minterm).
For example: BC 00 01 11 10
F(A,B,C) = A’ + A.B’ + A.B.C’ A
m0 m1 m3 m2
A B C minterms 0
0 0 0 1
0 0 1 1
1 m4 m5 m7 m6
0 1 0 1
BC 00 01 11 10
0 1 1 1 A
1 0 0 1 1 1 1 1
1 0 1 1
0
1 1 0 1 1 1 1 1
1 1 1
F(A,B,C)= A’ + B’ + C’ 13
LOGIC GATE
HOMEWORK
Homework:
❑ Prove that the
F(A,B,C) = A’ + A.B’ + A.B.C’ = A’ + B’ + C’
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LOGIC GATE
KARNAUGH MAP – 4 VARIABLES
CD 00 01 11 10 CD 00 01 11 10
AB AB
00 1 1 1 1 00 1 1 1 1
01 1 1 01 1 1
11 1 1 11 1 1
10 1 1 10 1 1 1 1
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LOGIC GATE
KARNAUGH MAP – 4 VARIABLES
F(A,B,C,D) = σ(0,2,5,9,15)
CD 00 01 11 10 CD 00 01 11 10
AB AB
m0 m1 m3 m2 00 1 1
00
01 m4 m5 m7 m6 01 1
10 m8 m9 m11 m10 10 1 1
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LOGIC GATE
KARNAUGH MAP – 4 VARIABLES
F(A,B,C,D) = σ(0,2,5,9,15)
CD 00 01 11 10 CD 00 01 11 10
AB AB
m0 m1 m3 m2 00 1 1
00
01 m4 m5 m7 m6 01 1
10 m8 m9 m11 m10 10 1 1
F(A,B,C,D) = A’.B’.D’+A’.B.C’.D+A.B’.C’.D+A.B’.C’.D
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LOGIC GATE
KARNAUGH MAP – 4 VARIABLES
F(A,B,C,D) = σ(4,5,6,7,9,13,14,15)
CD 00 01 11 10 CD 00 01
AB 11 10
AB
00 m0 m1 m3 m2
00
01 m4 m5 m7 m6 01 1 1 1 1
10 m8 m9 m11 m10 10 1
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LOGIC GATE
KARNAUGH MAP – 4 VARIABLES
F(A,B,C,D) = σ(4,5,6,7,9,13,14,15)
CD 00 01 11 10 CD 00 01
AB 11 10
AB
00 m0 m1 m3 m2
00
01 m4 m5 m7 m6 01 1 1 1 1
10 m8 m9 m11 m10 10 1
01 m4 m5 m7 m6 01
10 m8 m9 m11 m10 10
F(A,B,C,D) =
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LOGIC GATE
KARNAUGH MAP – 4 VARIABLES
01 m4 m5 m7 m6 01
10 m8 m9 m11 m10 10
F(A,B,C,D) =
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LOGIC GATE
KARNAUGH MAP – 4 VARIABLES
01 m4 m5 m7 m6 01
10 m8 m9 m11 m10 10
F(A,B,C,D) =
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LOGIC GATE
SUMMARY
SUMMARY:
❑ Transistor acts as a switch to turn ON or turn OFF a circuit.
Transistor N-type typical usage Transistor P-type typical usage
S is connected to GND (Logic 0) D is connected to VDD (Logic 1)
G = 1 => switch is ON => Transistor is conducting G = 1 => switch is OFF => Transistor is NOT conducting
G = 0 => switch is OFF => Transistor is NOT conducting G = 0 => switch is ON => Transistor is conducting
❑ NOT, NOR, NAND are basic gates and can be used to express any other elements.
❑ Boolean algebra is used for designing and analyzing digital circuits and algorithms.
❑ There are 2 type of Boolean function: SOP & POS.
❑ Karnaugh map is a very effective way to simplify Boolean functions.
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LOGIC GATE
HOMEWORK
Homework:
❑ A circuit has 4 inputs A,B,C,D and 1 output Y. Design a combinational logic for
Y to set Y to 1 whenever 2 or more inputs are equal to 1. Otherwise, Y is 0.
❑ *Investigate 5 variable K-map and do the same requirement as above
homework
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COMBINATIONAL CIRCUIT
Below is some characteristics of combinational circuit:
❑ No feedback: do not have feedback paths, meaning there are no elements that store information
about previous inputs or outputs.
❑ Instantaneous Output: The output is a function only of the current input values, and there is no
concept of time or sequence.
❑ Truth Table: The behavior of a combinational circuit is fully described by a truth table, which lists all
possible combinations of input values and their corresponding output values.
❑ Logic Gates: Combinational circuits are constructed using basic logic gates such as AND, OR, NOT, XOR,
and others.
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SEQUENTIAL CIRCUIT
Below is some characteristics of combinational circuit:
❑ Memory Elements: Sequential circuits include memory elements (such as flip-flops or latches) that store
information about the past states of the circuit.
❑ Feedback Paths: Sequential circuits have feedback paths that allow the output to influence the input, creating a
loop that enables the circuit to maintain and update its state.
❑ Clock Signal: The clock signal determines when the circuit should update its state, ensuring that changes happen
at specific intervals.
❑ State Transition: The behavior of a sequential circuit is often described using a state diagram, which illustrates
how the circuit transitions from one state to another based on input and clock signals.
❑ Finite State Machines: Sequential circuits are often implemented as finite state machines, where the circuit can
exist in a finite number of states, and transitions between states are governed by specified conditions.
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SUMMARY
SUMMARY:
❑ Karnaugh map is a very effective way to simplify Boolean functions.
❑ Combinational logic has no feedback path, the output changes immediately based
on input.
❑ Sequential logic has feedback path to store the current state.
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