MPMC - Mid-1 - Question Bank 2023-24
MPMC - Mid-1 - Question Bank 2023-24
MPMC - Mid-1 - Question Bank 2023-24
A) With a neat sketch explain the internal architecture of 8085 microprocessor. 7 CO1 Understand
1
B) With a neat sketch explain the internal architecture of 8086 microprocessor. 8 CO1 Understand
5 A) Explain the following signals i) NMI ii)RESET iii) HOLD iV) INTA' 8 CO1 Understand
UNIT-II
A) Write an assembly language program in 8086 to find the average of an array of numbers. 7 CO2 Apply
1
Explain the following instructions used with the 8086 Microprocessor:
B) 8 CO2 Understand
i) DAA ii) SAR iii) XCHG iv) PUSH v) POP vi)AAA
A) Describe briefly about different addressing modes of 8086. 8 CO2 Understand
2
B) Write an assembly language program in 8086 to find the factorial of a given number. 7 CO2 Apply
A) What are assembler directives? Explain any 5 assembler directives with suitable examples. 5 CO2 Understand
3
B) Write an 8086 assembly language program to find out the largest number in the given array 10 CO2 Apply
A) Explain the following branch instructions of 8086: i) JNZ ii) JC iii) JO iv) CALL v) RET 6 CO2 Understand
5 Write an 8086 assembly language program to count the positive and negative numbers from
B) 9 CO2 Apply
an 8-bit array.
UNIT-III
A) Explain the BSR mode of operation of 8255 programmable peripheral interface. 7 CO4 Understand
1
B) Explain the architecture of 8255 PPI. 8 CO4 Understand
Build the control word register content of 8255 Programmable Peripheral Interface chip to
A) initialize all ports work in Mode 0, Port A as input port, Port B as output port and Port C as 5 CO3 Apply
output port.
2
Design an interface between 8086 CPU and two chips of 16K X 8 EPROM and two chips
B) of 32K X 8 RAM. Select the starting address of EPROM suitably. The RAM address must 10 CO3 Analyze
start at 00000H.
A) Mention the format of CWR register of 8255 PPI. 5 CO3 Understand
It is required to interface two chips of 32K X 8 ROM and four chips of 32K X 8 RAM with
3 8086, according to the following map. ROM 1 and 2: F0000H – FFFFFH, RAM 1 and 2:
B) D0000H – DFFFFH, RAM 3 and 4: E0000H – EFFFFH 10 CO3 Analyze
Show the implementation of this memory system.