8085 Lab Book
8085 Lab Book
MTK85SE,
8085 MICROPROCESSOR
TRAINING KIT
Wichit Sirichote
© 2016 Rev 1.0 April, 2016
1
CONTENTS
2
Program 1: Writing data to output port
We can use debugging LED that connected to GPIO1 port to display the Accumulator
content easily. This code will bring the internal 8-bit data in CPU to the real-world.
GPIO1 is 8-bit data flip-flop latch. The GPIO1 latch enable signal, LE is decoded at I/O space
location 00.
The output Q1 to Q8 drives small LED. Logic '1' will make LED lit, logic '0' no light.
Let us see how the code brings the Accumulator content to the real-world.
A constant is loaded to the Accumulator register A. Then write it to GPIO1 location. RST 7 will
make the program control back to monitor program.
Procedure
3
2. Press key HOME, then GO.
Exercise
1. Modify the code to send another byte? And see the result on GPIO1 LED.
Summary
Using the LED indicator at the output port register is the simple method for program testing. The
kit has 8-bit LED. The byte that needed to check must be loaded into the Accumulator then
uses OUT 0, instruction to write it to the 8-bit binary display.
4
Program 2: Binary number counting
Procedure
We can see the counting in binary from 0000 0000 to 0000 0001, 0000 0010 and so on.
STEP key will let CPU execute single instruction. If we press key GO. What is happening?
All LED will look like turn on, like 1111 1111.
5
0009 8105 CD 0B 81 CALL DELAY
0010 8108 C3 02 81 JMP LOOP1
0011 810B
0012 810B 11 FF FF DELAY LXI D,-1
0013 810E 21 00 30 LXI H,3000H
0014 8111 19 LOOP2 DAD D
0015 8112 DA 11 81 JC LOOP2
0016 8115 C9 RET
0017 8116
0018 8116 .END
tasm: Number of errors = 0
Enter the hex code and now press key HOME, GO.
We see that such small delay will make us see the binary counting.
Can you modify the code to make it run faster or slower? How?
Summary
The small delay is very useful subroutine for program debugging. Its functioning is to do counting
until the initial value becomes zero.
6
Program 3: LED running
With a bit modification of Program 2, we can show the LED running light with new instruction
easily.
Now, INR A instruction was replaced with RLC, Rotate left through carry.
Procedure
Exercise
1. Modify the initial load value from 1 to any number. Test it.
Summary
8085 has left and right rotation instructions. We can learn theirs operation with the GPIO1 LED and
with delay subroutine.
7
Program 4: Fill constant to RAM
We will use memory pointer and write the constant with a number of byte counted by loop
counter.
The 8085 CPU uses HL as the 16-bit memory pointer (H for High address and L for Low address).
The instruction MOV M,A will use HL as the pointer, register A content will copy to memory
pointed to by HL. This is called indirect addressing.
Register B uses as the loop counter. The example will write 0 to memory from location 9000H to
9007H, 8 bytes.
Procedure
4. Check and write down the contents of memory location 9000 to 9007.
Exercise
1. Modify code to fill constant FF to location 9000 to 90FF. Show the result.
8
Summary
Indirect addressing using HL register provides a flexible memory access for many applications.
9
Program 5: 16-Bit Binary addition
This program shows how to add multiple bytes using ADI and ACI instructions.
The first number is stored in memory location 9000 (low byte) and 9001(high byte).
We can enter the first number at location 9000 (low byte) and 9001(high byte).
Adding is done by ADI instruction for low byte and ACI for high byte.
Result will put back to location 9000 (low byte) and 9001(high byte).
ADI, add with no carry will use for adding low order byte. For the next higher significant byte
we will use ACI, add with carry flag to include carry bit if there is.
Procedure
2. Suppose the first number is 1ABBH. Enter it to location 9000(low byte) and 9001(high byte).
5. Check the result that saved in RAM at location 9000(low byte) and 9001(high byte).
10
Program 6: BCD addition
By inserting DAA instruction after ADI and ACI instructions, we can add two 4-digit BCD
numbers easily.
We see that the code for BCD addition is similar to binary addition, only there are DAA after
ADI and ACI instruction.
Procedure
2. Suppose the first number is 1999H. Enter it to location 9000(low byte) and 9001(high byte).
5. Check the result that saved in RAM at location 9000(low byte) and 9001(high byte).
Exercise
1. Try another BCD number that saved in RAM at 9000 and 9001.
Summary
DAA can be used with binary adding instructions. It will adjust the result to BCD number
automatically.
11
Program 7: Reading button press
We can test button press with USER key that tied to PA7 of the system PPI, 8255. PA7 is bit7 of
PORTA. The input logic appears at PA7 is logic '1' with 10k pull-up resistor. When the button was
pressed PA7 will short to GND, the logic will be '0'.
We can read this status by instruction IN PORT directly. The byte will be read to the
Accumulator.
Our test program will read key press, then increment the byte at location 9000. We can see the
incrementing by writing the content of location 9000 to GPIO1 LED.
12
0025 811F D3 00 OUT GPIO1
0026 8121 C9 RET
0027 8122
0028 8122 06 00 DEBOUNCE MVI B,0
0029 8124 05 DELAY1 DCR B
0030 8125 C2 24 81 JNZ DELAY1
0031 8128 C9 RET
0032 8129
0033 8129 .END
tasm: Number of errors = 0
Yellow portions are key press checking. The first one is to wait if key has been pressed. The
status of logic at PA7 is checking by logical AND instruction with 80H. Bit position of PA7 is bit 7.
Thus we use 80H for bit testing. If logic is '0', Result from logical AND will give ZERO. Thus JZ
PRESSED will repeat checking it until it is logic '1', or key has been released.
Logic '1'
Logic '0'
Released
Key pressed
Tact switch is mechanical contact. It has elastic property, vibrate in a short period. The logic
signal seen by CPU execution would be spike signal. Simple method to get stable logic
readings is done by providing a short wait until the logic is stable. We thus insert small delay
called DEBOUNCE subroutine.
The second yellow portion is now checking until key was pressed. Again we also get the same
bouncing signal but in opposite direction.
Logic '1'
Logic '0'
No press
pressed
So we wait until the logic is stable, then execute the desired task. Our task is to increment
location 9000, then write it to GPIO1 LED.
Procedure
13
Exercise
14
Program 8: Producing tone signal
The kit has one bit that drives a small speaker. We can make a tone signal and hear it from the
loudspeaker. Q3 is PNP transistor switch. It can drive the speaker with logic input at SPEAKER
signal.
Logic low of SPEAKER signal will turn on Q3, and logic high will turn it off.
We can write a program that makes 50% duty cycle of tone signal.
15
Location 9000 stores a byte that will be sent to PORTC.
The data is loaded with FF. We see at the circuit of PORTC, the TRACE signal must be HIGH, to
prevent TRAP signal to be activated.
Toggle PC7 is done by logical Exclusive OR instruction with a mask byte, 80H or 10000000b.
Procedure
Exercise
Summary
The output bit at loudspeaker is one bit. So we can make a tone signal as the square wave
signal easily. For some applications that produces purely sinusoidal waveform, like sine wave
tone signal, we will need more output bits and may need Digital to Analog converter chip.
16
Program 9: Morse code keyer
Let us have some fun with Morse code keyer program. This program combines Program 7 and
8. It is a simple tone generator when we press key.
17
0019 8119
0020 8119 CD 30 81 CALL DEBOUNCE
0021 811C C3 05 81 JMP PRESSED
0022 811F
0023 811F 3A 00 90 TONE LDA 9000H
0024 8122 EE 80 XRI 10000000B
0025 8124 32 00 90 STA 9000H
0026 8127 D3 12 OUT PORTC
0027 8129
0028 8129 06 20 MVI B,20H
0029 812B 05 LOOP DCR B
0030 812C C2 2B 81 JNZ LOOP
0031 812F C9 RET
0032 8130
0033 8130
0034 8130 06 00 DEBOUNCE MVI B,0
0035 8132 05 DELAY1 DCR B
0036 8133 C2 32 81 JNZ DELAY1
0037 8136 C9 RET
0038 8137
0039 8137 .END
tasm: Number of errors = 0
We see that while the key has been pressed, tone signal will be produced.
Procedure
Exercise
Summary
More complicated program can translate the text to Morse code. However it is more fun to
learn Morse code and hit the key manually.
18
Here is the Morse code table for playing.
Source: http://rsgb.org/main/operating/morse/
19
Program 10: 7-Segment display
The kit display is made with common cathode 7-segment LED, LTC472. Segment a, b, c, d, e, f,
g, DP are driven by PORTB. All segments are common connected to all 8 digits (only 4-digit
shown). U12 is segment driver with R9 for limiting driving current. To activate a given digit, the
common cathode pin must be activated with logic LOW.
PORTC, PC0 to PC3 drives the 4-bit decoder, 74LS145 providing 8-digit for CC pin driver.
Segment designation for bit driven is shown below. For example, to display number '1',
segment B and C must be '1'. The bit pattern will be 03. We can find the bit pattern for a given
letter easily.
Such display is called multiplex display. At a given time, only one digit will be activated.
However if we switch each digit with corresponding segment fast enough, we will see all digits
with no blinking.
20
More features for this circuit, we can use PWM method to reduce the power consumption of
the LED thus longer theirs life. We can adjust duty cycle for the driving signal.
Here is 50% duty cycle driving pulse.
Smaller duty cycle will reduce power consumption, reduce the LED brightness as well. Proper
duty cycle will give nice display with less power.
The first example will display one digit with PWM method.
21
0031 8123 .END
tasm: Number of errors = 0
Yellow portion will make the first digit to display number '8', code pattern is 7FH.
Then all segments will be turned off with Time off subroutine for no light period.
Procedure
Exercise
22
0029 811D D3 11 OUT SEGMENT
0030 811F
0031 811F 1C INR E
0032 8120 23 INX H
0033 8121
0034 8121 0D DCR C
0035 8122 C2 0D 81 JNZ SCAN1
0036 8125 C9 RET
0037 8126
0038 8126
0039 8126 3F TEXT .BYTE 3FH ; '0'
0040 8127 06 .BYTE 06H ; '1'
0041 8128 5B .BYTE 5BH ; '2'
0042 8129 4F .BYTE 4FH ; '3'
0043 812A 66 .BYTE 66H ; '4'
0044 812B 6D .BYTE 6DH ; '5'
0045 812C 7D .BYTE 7DH ; '6'
0046 812D 07 .BYTE 07H ; '7'
0047 812E
0048 812E 7F .BYTE 7FH ; '8'
0049 812F 6F .BYTE 6FH ; '9'
0050 8130 77 .BYTE 77H ; 'A'
0051 8131 7C .BYTE 7CH ; 'b'
0052 8132 39 .BYTE 39H ; 'C'
0053 8133 5E .BYTE 5EH ; 'd'
0054 8134 79 .BYTE 79H ; 'E'
0055 8135 71 .BYTE 71H ; 'F'
0056 8136
0057 8136 .END
tasm: Number of errors = 0
Procedure
3. Observe the display, see the brightness of the LED. And the number being displayed.
Exercise
23
Program 11: Hardware interrupt
The kit provides test button that produces single pulse for interrupt experiment. SW2 is push
button, when press and release, the single pulse will send to interrupt pins.
For this test we will select RST6.5, so SW1 must set DIP switch position 2 ON.
24
tasm: Number of errors = 0
The interrupt vector for RST6.5 is located at 0034H. The kit relocate this vector to RAM space at
location 8034H. User can enter JUMP instruction at 8034H to the service routine for RST6.5 easily.
Since the RST6.5 is a maskable, so to enable it, we must set the mask bit for RST6.5 to '0'. And
use instruction SIM to to set it. That is all for main code then the control jump back to monitor
program.
When we press test button, the CPU will jump to RST6.5 vector and jump to 8106. The service
routine will write a byte 34H to GPIO1 LED. We can see the binary 34H on the GPIO1 LED
directly.
Procedure
3. Observe the display, push the test button to produce interrupt signal for RST6.5 pin.
Exercise
25
Program 12: Timer interrupt
The kit provides 33ms tick generated from 8254 timer. The input clock 2MHz supplied to 8254
chip will be divided by 65536 producing 33ms tick. This tick signal is fed to RST7.5.
The monitor program initializes such tick signal at the beginning when reset the CPU. User can
use this tick signal for many time trigger applications.
We will play with this tick by RST7.5 interrupt pin. The hardware ties RST7.5 to the output of 8254
directly. No jumper setting needed.
0001 0000
0002 803C .ORG 803CH
0003 803C C3 0D 81 JMP SERVICE_RST7.5
0004 803F
0005 8100 .ORG 8100H
0006 8100
0007 8100 F3 MAIN DI
0008 8101 3E 0B MVI A,1011B
0009 8103 30 SIM
0010 8104 FB EI
0011 8105
0012 8105 AF XRA A
0013 8106 32 00 90 STA SEC_33
0014 8109 32 01 90 STA SECOND
0015 810C
0016 810C FF RST 7
0017 810D
0018 810D SERVICE_RST7.5
0019 810D
0020 810D F5 PUSH PSW
0021 810E
0022 810E 3A 00 90 LDA SEC_33
0023 8111 3C INR A
0024 8112 32 00 90 STA SEC_33
26
0025 8115 FE 1E CPI 30
0026 8117 C2 29 81 JNZ SKIP
0027 811A
0028 811A AF XRA A
0029 811B 32 00 90 STA SEC_33
0030 811E
0031 811E 3A 01 90 LDA SECOND
0032 8121 C6 01 ADI 1
0033 8123 27 DAA
0034 8124 32 01 90 STA SECOND
0035 8127 D3 00 OUT 0
0036 8129
0037 8129 SKIP
0038 8129
0039 8129 F1 POP PSW
0040 812A FB EI
0041 812B C9 RET
0042 812C
0043 9000 .ORG 9000H
0044 9000
0045 9000 SEC_33 .BLOCK 1
0046 9001 SECOND .BLOCK 1
0047 9002
0048 9002
0049 9002 .END
0050 9002
0051 9002
tasm: Number of errors = 0
Main code initializes RST7.5 mask bit, clear two variables: SEC_33 and SECOND then enable
interrupt and return to monitor program.
The RST7.5 service routine will be entered every 33ms or approx. 30 cycles/second.
Every entering, the SEC_33 is incremented by one. When it was equal to 30, time has elapsed
for one second. We then increment the SEC variable and write it to GPIO1 LED. We can see
the BCD counting up every one second on the GPIO1 LED.
Procedure
Exercise
27
8085 Micro Architecture
Source: By Appaloosa - Own work, CC BY-SA 3.0,
https://commons.wikimedia.org/w/index.php?curid=5217009
28
8085 Instruction Hex Code
29
MOVE, LOAD and STORE 16 nn MVI D,byte
1E nn MVI E,byte
40 MOV B,B 26 nn MVI H,byte
41 MOV B,C 2E nn MVI L,byte
42 MOV B,D 36 nn MVI M,byte
43 MOV B,E
44 MOV B,H
45 MOV B,L 01 nnnn LXI B,dble
46 MOV B,M 11 nnnn LXI D,dble
47 MOV B,A 21 nnnn LXI H,dble
48 MOV C,B 31 nnnn LXI SP,dble
49 MOV C,C
4A MOV C,D 02 STAX B
4B MOV C,E 12 STAX D
4C MOV C,H 0A LDAX B
4D MOV C,L 1A LDAX D
4E MOV C,M 32 nnnn STA adr
4F MOV C,A 3A nnnn LDA adr
50 MOV D,B 22 nnnn SHLD adr
51 MOV D,C 2A nnnn LHLD adr
52 MOV D,D EB XCHG
53 MOV D,E
54 MOV D,H
55 MOV D,L COMPARE
56 MOV D,M
57 MOV D,A FE nn CPI byte
58 MOV E,B B8 CMP B
59 MOV E,C B9 CMP C
5A MOV E,D BA CMP D
5B MOV E,E BB CMP E
5C MOV E,H BC CMP H
5D MOV E,L BD CMP L
6B MOV L,E BE CMP M
6C MOV L,H BF CMP A
6D MOV L,L
6E MOV L,M ROTATE
6F MOV L,A
70 MOV M,B 07 RLC
71 MOV M,C 17 RAL
72 MOV M,D 0F RRC
73 MOV M,E 1F RAR
74 MOV M,H
75 MOV M,L
77 MOV M,A STACK
78 MOV A,B
79 MOV A,C C5 PUSH B
7A MOV A,D D5 PUSH D
7B MOV A,E E5 PUSH H
7C MOV A,H F5 PUSH PSW
7D MOV A,L
7E MOV A,M C1 POP B
7F MOV A,A D1 POP D
E1 POP H
3E nn MVI A,byte F1 POP PSW
06 nn MVI B,byte E3 XTHL
0E nn MVI C,byte F9 SPHL
30
33 INX SP F0 RP
3B DCX SP F8 RM
E8 RPE
E0 RPO
ARITHEMATICS
31
DA nnnn JC adr
D2 nnnn JNC adr
CA nnnn JZ adr
C2 nnnn JNZ adr
F2 nnnn JP adr
FA nnnn JM adr
EA nnnn JPE adr
E2 nnnn JPO adr
E9 PCHL
LOGICAL
E6 nn ANI byte
EE nn XRI byte
F6 nn ORI byte
A0 ANA B
A1 ANA C
A2 ANA D
A3 ANA E
A4 ANA H
A5 ANA L
A6 ANA M
A7 ANA A
A8 XRA B
A9 XRA C
AA XRA D
AB XRA E
AC XRA H
AD XRA L
AE XRA M
AF XRA A
B0 ORA B
B1 ORA C
B2 ORA D
B3 ORA E
B4 ORA H
B5 ORA L
B6 ORA M
B7 ORA A
32
5 4 3 2 1
D[0..7]
A[0..7]
0x0000-0x7FFF 0x8000-0xFFFF
32kB ROM 32kB SRAM U3
U1 U2
U4 A0 10 11 D0 A0 10 11 D0 D0 2 19
A1 A0 O0 D1 A1 A0 D0 D1 D1 1D 1Q
9 12 9 12 3 18
D0 A0 A2 A1 O1 D2 A2 A1 D1 D2 D2 2D 2Q
2 19 8 13 8 13 4 17
D D1 1D 1Q A1 A3 A2 O2 D3 A3 A2 D2 D3 D3 3D 3Q D
3 18 7 15 7 15 5 16
D2 2D 2Q A2 A4 A3 O3 D4 A4 A3 D3 D4 D4 4D 4Q
4 17 6 16 6 16 6 15
D3 3D 3Q A3 A5 A4 O4 D5 A5 A4 D4 D5 D5 5D 5Q
5 16 5 17 5 17 7 14
D4 4D 4Q A4 A6 A5 O5 D6 A6 A5 D5 D6 D6 6D 6Q
6 15 4 18 4 18 8 13
D5 5D 5Q A5 A7 A6 O6 D7 A7 A6 D6 D7 D7 7D 7Q
7 14 3 19 3 19 9 12
D6 6D 6Q A6 A8 A7 O7 A8 A7 D7 8D 8Q
8 13 25 25
D7 7D 7Q A7 A9 A8 A9 A8 GPIO1
9 12 24 24 11
8D 8Q A10 A9 A10 A9 LE
21 21 1
ALE A11 A10 A11 A10 +5V OE D0
11 23 23 D0
LE A12 A11 A12 A11 D1
1 2 2 20 D1
OE A13 A12 A13 A12 VCC D1 D2 D3 D4 D5 D6 D7 D8 D2
26 26 D2
A14 A13 A14 A13 D3
20 27 1 D3
+5V VCC A14 A14 74HC573 D4
ROM_CE RAM_CE D5 D4
20 20 D5
74HC573 /RD CE /RD CE D6
22 22 D6
OE /WR OE D7
1 27 D7
+5V VPP WE D9
27C256 HM62256B LED 3mm
A[8..14] 1N5237A
A0
A0
memory & i/o decoder
A1
C A1 C
U5
A2
S0 RAM_CE A2
U6 2 12
D0 S1 I I/O/Q ROM_CE
36 12 3 13
30pF C1 RST-IN AD0 D1 A4 I I/O/Q
13 4 14 SYSTEM_PPI
AD1 D2 A5 I I/O/Q
1 14 5 15 GPIO1
X1 AD2 D3 A6 I I/O/Q
15 6 16 CTC
4MHz AD3 D4 A7 I I/O/Q
16 7 17 USER_PPI
C2 Q1 AD4 D5 IO/M I I/O/Q
2 17 8 18 UART
X2 AD5 D6 A15 I I/O/Q
18 9 19 LCD_E
+5V SID AD6 D7 I I/O/Q +5V VCC
5 19
30pF TRAP SID AD7 A8 /RD
6 21 1
TRAP A8 A9 /WR I/CLK
22 11
R1 RST5.5 A9 A10 I/OE
9 23 U7A U7B VCC
10k RST6.5 RST 5.5 A10 A11
8 24 1 5
RST7.5 RST 6.5 A11
S1 RESET 7 25 A12 GAL16V8B 3 4 VSS
RST 7.5 A12 A13
26 2 6
INTR A13 A14
10 27
INTR A14 A15
28 4001 4001
R2 INTA A15
11
100 + C3 INTA ALE
30
10uF S0 ALE
29 31 WR U8A
S0 WR +5V
32 RD SW1
+5V S1 RD *RST5.5 RST5.5
B 33 34 1 8 1 2 B
S1 IO/M RESET_OUT *RST6.5
3 reset 2 7
RST-OT CLKOUT R3
39 37 CLKOUT 3 6
R4 10k HOLD CLKO SOD 10k
4 4 5 74LS14
SOD
3
D0 A0
+5V 10k D1 1 2 A1 SW2 4001 74LS14
D2 3 4 A2 2 U8C
D3 5 6 A3 1
SID D4 7 8 A4 RST7.5
3 5 6
D5 9 10 A5
D6 11 12 A6 SW SPDT
+5V D7 13 14 A7
U9 U7D 74LS14
/RD 15 16
1 3 OUT1 12 *RST7.5 U8D
A QA /WR 17 18
2 4 11
B QB
5 IO/M 19 20 *RST5.5 OUT2 13 *INTR 9 8 INTR
QC SID 21 22 *RST6.5
6
QD ALE 23 24 *RST7.5
10 4001
ALE QE SOD 25 26 *INTR R6
8 11 74LS14
CLK QF +5V S0 27 28 INTA 10k 330 +5V
12 U8E
A QG TRAP S1 29 30 +5V D10 R7 A
9 13
CLR QH CLKOUT 31 32
11 10
R8 READY 33 34 HOLD
74HC164
10k RESET_OUT 35 36 HLDA +5V
U8F
37 38 LED
74LS14
39 40 Title
12 13 TRACE
HEADER 20X2 8085 Microprocesor Kit
74LS14 Size Document Number Rev
B <Doc> 2
Designed by Wichit Sirichote, [email protected]
Date: Friday, April 15, 2016 Sheet 1 of 3
5 4 3 2 1
5 4 3 2 1
U10 U11
U12 R9
PB0 2 18 1 16 A 14 A 14
PB1 1A1 1Y1 B A B A
4 16 2 15 16 16
PB2 1A2 1Y2 C B C B
6 14 3 14 13 13
D PB3 1A3 1Y3 D C D C D
8 12 4 13 3 3
PB4 1A4 1Y4 E D E D
11 9 5 12 5 5
PB5 2A1 2Y1 F E F E
13 7 6 11 11 11
PB6 2A2 2Y2 G F G F
15 5 7 10 15 15
PB7 2A3 2Y3 DP G DP G
17 3 8 9 7 7
2A4 2Y4 DP DP
1 R-PACK
DIGIT1
DIGIT2
DIGIT3
DIGIT4
DIGIT1
DIGIT2
DIGIT3
DIGIT4
1G
19 4 4
2G L1L2L3 L1L2L3
74LS244
LTC-4727JR LTC-4727JR
1
8
U13
1
0
2
1
C 3 C
PC0 2
15 4
PC1 A 3
14 5
PC2 B 4
13 6
PC3 C 5
12 7
D 6
9
7
10
8
11
9
74LS145 SPEAKER
SW3
TRACE
D0 SW4 SW5 SW6 SW7 1 2 USER
D1 D0
D2 D1 8255
D2 1 2 1 2 1 2 1 2 OPTION
1
D3 25 PB7 R10
D4 D3 PB7 PB6 SPEAKER
24 C D E F SW8 2 Q3
D5 D4 PB6 PB5 BC557
D5 23
D6 PB5 PB4 SW9 SW10 SW11 SW12 PA6 4.7k
D6 22 1 2
D7 PB4 PB3
3
D7 21
PB3 PB2 VCC
20 1 2 1 2 1 2 1 2 MODE
PB2 PB1
19
PB1 PB0 R11
B 18 8 9 A B D11 LS1 B
PB0 SW13
10 PC7
PC7 PC6 SW14 SW15 SW16 SW17 PA7 330
11 1 2 TONE
PC6 PC5
SYSTEM_PPI 6 12 SPEAKER
CS PC5 PC4 +5V
A1 reset 35
RESET PC4
13
PC3
1 2 1 2 1 2 1 2 USER1 R12
8 17
A0 A1 PC3 PC2
9
A0 PC2
16
PC1
4 5 6 7
36 15
WR WR PC1 PC0 10
5 14
RD RD PC0
D7 27 37 PA7 SW18 SW19 SW20 SW21
D6 D7 PA7 PA6 10k RESISTOR SIP 9 R13 VCC
28 38
D5 D6 PA6 PA5 PA0
29 39 1 2 1 2 1 2 1 2 2 1
D4 D5 PA5 PA4 PA1
30 40 3
D3 D4 PA4 PA3 PA2
31
D3 PA3
1 0 1 2 3 4
D2 32 2 PA2 PA3 5 +5V VCC
D1 D2 PA2 PA1 PA4
33 3 6
D0 D1 PA1 PA0 PA5
34 4 7
D0 PA0 SW22 SW23 SW24 SW25 PA6 8 VCC
U14 PA7 9
1 2 1 2 1 2 1 2 C
VSS
A
INC DEC STEP HOME A
SW26 SW27 SW28 SW29 A0
A0
1 2 1 2 1 2 1 2 A1
A1
GO ALT ADDR DATA A2 Title
A2
8085 Microprocesssor Kit
Size Document Number Rev
B <Doc> 2
Date: Friday, April 15, 2016 Sheet 2 of 3
5 4 3 2 1
5 4 3 2 1
D[0..7]
16x2 text LCD interface
+5V
CLKOUT
D JR1 D
*RST7.5
U15 +5V
U16 +5V 12 34 16 R14 5
D0 CS0 OUT1 16
8 13 31 15
D1 D0 CS1 OUT2 15 D7
7 UART 14 30 14
D2 D1 CS2 INT 14 D6
6 9 13
D3 D2 CLK0 13 D5
5 11 21 12
D4 D3 G0 RD RD TXD 12 D4
4 10 18 11 11
D5 D4 OUT0 WR WR TXD RTS 11 D3
3 22 32 10
D6 D5 RD RTS 10 D2
2 15 19 33 9
D7 D6 CLK1 WR DTR 9 D1
1 14 8
D7 G1 A0 8 D0
13 OUT1 28 7
OUT1 A1 A0 RXD 7
22 27 10 6 LCD_E
RD RD A2 A1 RXD DCD 6 R/W A1
23 18 26 38 5
WR A0 WR CLK2 A2 DCD 5 RS A0
19 16 37 4
A1 A0 G2 D0 DSR 4
20 17 OUT2 1 36 3
A1 OUT2 D1 D0 CTS 3
2 39 2
D2 D1 RI 2
21 3 1
CTC CS D3 D2 1
4
D4 D3
8254 5
D5 D4 CONN RECT 16 +5V
6
D5
2
D6 7
D7 D6
8 1 3
D7
C 24 C
+5V VCC CSOUT
25 23
ADS DDIS R15
35 29
reset RESET NC 10K
VCC 16
XTAL1/CLK
17
D0 XTAL2
VSS D1 D0
D1 9 15
D2 RCLK BAUDOUT
D3 D2
D3 8250
D4
D5 D4
A0 D6 D5
+5V
A0 D7 D6
A1 D7
A1
10uF 10V 10uF C5
A2
+
C4
+
A2
U17
2 1
+5V +5V VB1 V+ C+ 10uF
3
C1-
5 6 4
C6 V- C2+
9 5
+ C2-
+
4 C7
B 8 10uF B
3 14 11 TXD
C8 C9 + C10 + C11 T1OUT T1IN RTS
7 7 10
100nF 100nF 10uF 10uF T2OUT T2IN
2 13 12 RXD
R1IN R1OUT DCD
6 8 9
R2IN R2OUT
1
SUB-D 9, Male (cross cable) MAX232A
D12 R16 2k
POWER
+5V
TP1 U18 J1
VCC LM7805/TO D13 DC input
+5V 3 1 2 1 1
1 VOUT VIN
C14 10uF 16V
GND
+ + 1N4007
2
C15 C16 C17 C18
C12 C19 C20 C13
0.1uF 0.1uF 0.1uF 0.1uF
TP2 0.1uF 0.1uF 1000uF 16V
2
A DC2 A
GND 1
0.1uF
Title
8085 Microprocessor Kit
Size Document Number Rev
B <Doc> 2
Date: Friday, April 15, 2016 Sheet 3 of 3
5 4 3 2 1