Amc 1311

Download as pdf or txt
Download as pdf or txt
You are on page 1of 38

AMC1311

SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

AMC1311x High-Impedance, 2-V Input, Reinforced Isolated Amplifiers

1 Features 3 Description
• 2-V, high-impedance input voltage range optimized The AMC1311 is a precision, isolated amplifier with
for isolated voltage measurement an output separated from the input circuitry by a
• Fixed gain: 1 capacitive isolation barrier that is highly resistant
• Low DC errors: to magnetic interference. This barrier is certified to
– AMC1311: provide reinforced galvanic isolation of up to 5 kVRMS
• Offset error: ±9.9 mV (maximum) according to DIN EN IEC 60747-17 (VDE 0884-17)
• Offset drift: ±20 μV/°C (typical) and UL1577 and supports a working voltage of up to
• Gain error: ±1% (maximum) 1500 VRMS.
• Gain drift: ±30 ppm/°C (typical) The isolation barrier separates parts of the system
– AMC1311B: that operate on different common-mode voltage levels
• Offset error: ±1.5 mV (maximum) and protects the low-voltage side from voltages that
• Offset drift: ±10 μV/°C (maximum) can cause electrical damage or be harmful to an
• Gain error: ±0.2% (maximum) operator.
• Gain drift: ±40 ppm/°C (maximum)
– Nonlinearity: 0.04% (maximum) The high-impedance input of the AMC1311 is
• 3.3-V operation on high-side (AMC1311B) optimized for connection to high-impedance resistive
• High CMTI: 100 kV/μs (minimum) (AMC1311B) dividers or any other high-impedance voltage
• Missing high-side supply indication signal source. The excellent DC accuracy and
• Safety-related certifications: low temperature drift support accurate, isolated
voltage sensing and control in closed-loop systems.
– 7000-VPK reinforced isolation per DIN EN IEC
The integrated missing high-side supply voltage
60747-17 (VDE 0884-17)
detection feature simplifies system-level design and
– 5000-VRMS isolation for 1 minute per UL1577
diagnostics.
– Fully specified over the extended industrial
The AMC1311 is offered with two performance grade
temperature range: –40°C to +125°C
options: the AMC1311B is specified over the extended
2 Applications industrial temperature range of –55°C to +125°C, and
the AMC1311 is specified for operation at –40°C to
• Isolated voltage sensing in:
+125°C.
– Motor drives
– Frequency inverters Device Information(1)
– Uninterruptible power supplies PART NUMBER PACKAGE BODY SIZE (NOM)
AMC1311
SOIC (8) 5.85 mm × 7.50 mm
AMC1311B

(1) For all available packages, see the orderable addendum at


the end of the data sheet.
VDC
High-side supply Low-side supply
(3.3 V or 5 V) (3.3 V or 5 V)
R1
VDD1
AMC1311B VDD2

R2
Reinforced Isolation

IN OUTP

0..2V
RSNS VCMout 2V ADC
SHTDN OUTN

GND1 GND2

Simplified Schematic

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

Table of Contents
1 Features............................................................................1 8.1 Overview................................................................... 20
2 Applications..................................................................... 1 8.2 Functional Block Diagram......................................... 20
3 Description.......................................................................1 8.3 Feature Description...................................................20
4 Revision History.............................................................. 2 8.4 Device Functional Modes..........................................22
5 Device Comparison Table...............................................4 9 Application and Implementation.................................. 23
6 Pin Configuration and Functions...................................5 9.1 Application Information............................................. 23
7 Specifications.................................................................. 6 9.2 Typical Application.................................................... 23
7.1 Absolute Maximum Ratings........................................ 6 9.3 What To Do and What Not To Do..............................26
7.2 ESD Ratings............................................................... 6 10 Power Supply Recommendations..............................27
7.3 Recommended Operating Conditions.........................6 11 Layout........................................................................... 28
7.4 Thermal Information....................................................7 11.1 Layout Guidelines................................................... 28
7.5 Power Ratings.............................................................7 11.2 Layout Example...................................................... 28
7.6 Insulation Specifications ............................................ 8 12 Device and Documentation Support..........................29
7.7 Safety-Related Certifications ..................................... 9 12.1 Documentation Support.......................................... 29
7.8 Safety Limiting Values ................................................9 12.2 Receiving Notification of Documentation Updates..29
7.9 Electrical Characteristics...........................................10 12.3 Support Resources................................................. 29
7.10 Switching Characteristics........................................12 12.4 Trademarks............................................................. 29
7.11 Timing Diagram....................................................... 12 12.5 Electrostatic Discharge Caution..............................29
7.12 Insulation Characteristics Curves........................... 13 12.6 Glossary..................................................................29
7.13 Typical Characteristics............................................ 14 13 Mechanical, Packaging, and Orderable
8 Detailed Description......................................................20 Information.................................................................... 29

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision B (May 2020) to Revision C (June 2022) Page


• Changed isolation standard from DIN VDE V 0884-11 (VDE V 0884-11) to DIN EN IEC 60747-17 (VDE
0884-17) and updated the Insulation Specifications and Safety-Related Certifications tables accordingly....... 1
• Changed Features section..................................................................................................................................1
• Changed pin names: VIN to IN, VOUTP to OUTP, and VOUTN to OUTN......................................................... 5
• Merged VOS specs for 4.5V ≤ VDD1 ≤ 5.5 V and 3.0 V ≤ VDD1 ≤ 5.5 V ranges (AMC1311B only)................. 10
• Changed VDD1 DC PSRR from –65 dB (typical) to –80 dB (typical)............................................................... 10
• Changed CMTI from 75 kV/µs (minimum), 140 kV/µs (typical) to 100 kV/µs (minimum), 150kV/µs (typical)
(AMC1311B only)..............................................................................................................................................10
• Changed VDD1UV (VDD1 falling) from 1.75 V / 2.53 V / 2.7 V to 2.4 V / 2.6 V / 2.8 V (minimum / typical /
maximum)......................................................................................................................................................... 10
• Changed Rise, Fall, and Delay Time Definition timing diagram....................................................................... 12
• Changed Reinforced Isolation Capacitor Lifetime Projection figure ................................................................ 13
• Changed functional block diagram................................................................................................................... 20
• Deleted Fail-Safe Output section, added Analog Output section..................................................................... 22
• Changed Typical Application section and subsections..................................................................................... 23
• Changed What To Do and What Not To Do section......................................................................................... 26
• Changed Layout section................................................................................................................................... 28

2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

Changes from Revision A (June 2018) to Revision B (May 2020) Page


• Changed AMC1311B offset drift from ±15 μV/°C (max) to 10 μV/°C (max) in Features section.........................1
• Changed AMC1311B gain error from ±0.3% (max) to ±0.2% (max) and changed AMC1311B gain drift from
±45 ppm/°C (max) to ±40 ppm/°C (max) in Features section............................................................................. 1
• Changed IEC 60950-1 and IEC60065 to IEC 62368-1 ......................................................................................1
• Changed AMC1311B values for TCVOS, EG, and TCEG in Device Comparison Table ......................................4
• Changed AMC1311B values for TCVOS, EG, and TCEG in Device Comparison Table ......................................6
• Added ESD classification levels to ESD Ratings table....................................................................................... 6
• Changed CLR and CPG values from 9 mm to 8.5 mm.......................................................................................6
• Changed Insulation Specifications table per ISO standard................................................................................ 6
• Changed Safety-Related Certification table per ISO standard........................................................................... 6
• Changed Safety Limiting Values description as per ISO standard..................................................................... 6
• Changed TCVOS parameter minimum value from –15 μV/°C to –10 μV/°C and maximum value from 15 μV/°C
to 10μV/°C for the AMC1311B in the Electrical Characteristics table................................................................. 6
• Changed EG parameter minimum value from –0.3% to –0.2% and maximum value from 0.3% to 0.2% for the
AMC1311B in the Electrical Characteristics table...............................................................................................6
• Changed TCEG parameter minimum value from –45 ppm/°C to –40 ppm/°C and maximum value from 45
ppm/°C to 40 ppm/°C for the AMC1311B in the Electrical Characteristics table................................................ 6
• Changed Step Response of the AMC1311 figure.............................................................................................26

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

5 Device Comparison Table


PARAMETER AMC1311B AMC1311
High-side supply voltage, VDD1 3.0 V to 5.5 V 4.5 V to 5.5 V
Specified ambient temperature, TA –55°C to +125°C –40°C to +125°C
4.5 V ≤ VDD1 ≤ 5.5 V ±1.5 mV ±9.9 mV
Input offset voltage, VOS
3.0 V ≤ VDD1 ≤ 5.5 V ±2.5 mV Not applicable
Input offset drift, TCVOS ±3 µV/°C (typ), ±10 µV/°C (max) ±20 µV/°C (typ)
Gain error, EG ±0.2% ±1%
Gain error drift, TCEG ±5 ppm/°C (typ), ±40 ppm/°C (max) ±30 ppm/°C (typ)
Common-mode transient immunity, CMTI 100 kV/µs (min) 15 kV/µs (min)

4 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

6 Pin Configuration and Functions

VDD1 1 8 VDD2

IN 2 7 OUTP

SHTDN 3 6 OUTN

GND1 4 5 GND2

Not to scale

Figure 6-1. DWV Package, 8-Pin SOIC (Top View)

Table 6-1. Pin Functions


PIN
TYPE DESCRIPTION
NO. NAME
1 VDD1 High-side power High-side power supply(1)
2 IN Analog input Analog input
3 SHTDN Digital input Shutdown input, active high, with internal pullup resistor (typical value: 100 kΩ)
4 GND1 High-side ground High-side analog ground
5 GND2 Low-side ground Low-side analog ground
6 OUTN Analog output Inverting analog output
7 OUTP Analog output Noninverting analog output
8 VDD2 Low-side power Low-side power supply(1)

(1) See the Power Supply Recommendations section for power-supply decoupling recommendations.

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 5


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

7 Specifications
7.1 Absolute Maximum Ratings
see(1)
MIN MAX UNIT
High-side VDD1 to GND1 –0.3 6.5
Power-supply voltage V
Low-side VDD2 to GND2 –0.3 6.5
IN GND1 – 6 VDD1 + 0.5
Input voltage V
SHTDN GND1 – 0.5 VDD1 + 0.5
Output voltage OUTP, OUTN GND2 – 0.5 VDD2 + 0.5 V
Input current Continuous, any pin except power-supply pins –10 10 mA
Junction, TJ 150
Temperature °C
Storage, Tstg –65 150

(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

7.2 ESD Ratings


VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) ±1000

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions


over operating ambient temperature range (unless otherwise noted)
MIN NOM MAX UNIT
POWER SUPPLY
VDD1 to GND1, AMC1311 4.5 5 5.5
High-side power supply V
VDD1 to GND1, AMC1311B 3 5 5.5
Low-side power supply VDD2 to GND2 3 3.3 5.5 V
ANALOG INPUT
VClipping Input voltage before clipping output IN to GND1 2.516 V
VFSR Specified linear full-scale voltage IN to GND1 –0.1 2 V
ANALOG OUTPUT
On OUTP or OUTN to GND2 500
CLOAD Capacitive load pF
OUTP to OUTN 250
RLOAD Resistive load On OUTP or OUTN to GND2 10 1 kΩ
DIGITAL INPUT
Input voltage SHTDN to GND1 0 VDD1 V
TEMPERATURE RANGE
AMC1311 –40 125
TA Specified ambient temperature °C
AMC1311B –55 125

6 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

7.4 Thermal Information


DWV (SOIC)
THERMAL METRIC(1) UNIT
8 PINS
RθJA Junction-to-ambient thermal resistance 84.6 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 28.3 °C/W
RθJB Junction-to-board thermal resistance 41.1 °C/W
ΨJT Junction-to-top characterization parameter 4.9 °C/W
ΨJB Junction-to-board characterization parameter 39.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

7.5 Power Ratings


PARAMETER TEST CONDITIONS VALUE UNIT
VDD1 = VDD2 = 5.5 V 98
PD Maximum power dissipation (both sides) mW
VDD1 = VDD2 = 3.6V, AMC1311B only 56
VDD1 = 5.5 V 53
PD1 Maximum power dissipation (high-side) mW
VDD1 = 3.6 V, AMC1311B only 30
VDD2 = 5.5 V 45
PD2 Maximum power dissipation (low-side) mW
VDD2 = 3.6 V, AMC1311B only 26

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 7


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

7.6 Insulation Specifications


over operating ambient temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VALUE UNIT
GENERAL
CLR External clearance(1) Shortest pin-to-pin distance through air ≥ 8.5 mm
CPG External creepage(1) Shortest pin-to-pin distance across the package surface ≥ 8.5 mm
Minimum internal gap (internal clearance) of the double
DTI Distance through insulation ≥ 0.021 mm
insulation
CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 ≥ 600 V
Material group According to IEC 60664-1 I

Overvoltage category Rated mains voltage ≤ 600 VRMS I-IV


per IEC 60664-1 Rated mains voltage ≤ 1000 VRMS I-III
DIN EN IEC 60747-17 (VDE 0884-17)(2)
Maximum repetitive peak
VIORM At AC voltage 2120 VPK
isolation voltage

Maximum-rated isolation At AC voltage (sine wave) 1500 VRMS


VIOWM
working voltage At DC voltage 2120 VDC

Maximum transient VTEST = VIOTM, t = 60 s (qualification test) 7000


VIOTM VPK
isolation voltage VTEST = 1.2 × VIOTM, t = 1 s (100% production test) 8400
VIMP Maximum impulse voltage(3) Tested in air, 1.2/50-µs waveform per IEC 62368-1 9800 VPK
Maximum surge Tested in oil (qualification test),
VIOSM 12800 VPK
isolation voltage(4) 1.2/50-µs waveform per IEC 62368-1
Method a, after input/output safety test subgroups 2 and 3,
≤5
Vini = VIOTM, tini = 60 s, Vpd(m) = 1.2 × VIORM, tm = 10 s
Method a, after environmental tests subgroup 1,
≤5
qpd Apparent charge(5) Vini = VIOTM, tini = 60 s, Vpd(m) = 1.6 × VIORM, tm = 10 s pC
Method b1, at routine test (100% production) and
preconditioning (type test), Vini = VIOTM, tini = 1 s, Vpd(m) = 1.875 ≤5
× VIORM, tm = 1 s
Barrier capacitance,
CIO VIO = 0.5 VPP at 1 MHz ~1.5 pF
input to output(6)
VIO = 500 V at TA = 25°C > 1012
Insulation resistance,
RIO VIO = 500 V at 100°C ≤ TA ≤ 125°C > 1011 Ω
input to output(6)
VIO = 500 V at TS = 150°C > 109
Pollution degree 2
Climatic category 55/125/21
UL1577
VTEST = VISO = 5000 VRMS, t = 60 s (qualification),
VISO Withstand isolation voltage 5000 VRMS
VTEST = 1.2 × VISO = 6000 VRMS, t = 1 s (100% production test)

(1) Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Care must be
taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the
printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal in certain cases. Techniques
such as inserting grooves, ribs, or both on a PCB are used to help increase these specifications.
(2) This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured
by means of suitable protective circuits.
(3) Testing is carried out in air to determine the surge immunity of the package.
(4) Testing is carried in oil to determine the intrinsic surge immunity of the isolation barrier.
(5) Apparent charge is electrical discharge caused by a partial discharge (pd).
(6) All pins on each side of the barrier are tied together, creating a two-pin device.

8 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

7.7 Safety-Related Certifications


VDE UL
DIN EN IEC 60747-17 (VDE 0884-17),
EN IEC 60747-17,
DIN EN IEC 62368-1 (VDE 0868-1), Recognized under 1577 component recognition
EN IEC 62368-1,
IEC 62368-1 Clause : 5.4.3 ; 5.4.4.4 ; 5.4.9
Reinforced insulation Single protection
Certificate number: 40040142 File number: E181974

7.8 Safety Limiting Values


Safety limiting(1) intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry. A
failure of the I/O can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to
over-heat the die and damage the isolation barrier potentially leading to secondary system failures.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RθJA = 84.6°C/W, VDDx = 5.5 V,
268
TJ = 150°C, TA = 25°C
IS Safety input, output, or supply current mA
RθJA = 84.6°C/W, VDDx = 3.6 V,
410
TJ = 150°C, TA = 25°C, AMC1311B only
PS Safety input, output, or total power RθJA = 84.6°C/W, TJ = 150°C, TA = 25°C 1477 mW
TS Maximum safety temperature 150 °C

(1) The maximum safety temperature, TS, has the same value as the maximum junction temperature, TJ, specified for the device. The IS
and PS parameters represent the safety current and safety power, respectively. Do not exceed the maximum limits of IS and PS. These
limits vary with the ambient temperature, TA.
The junction-to-air thermal resistance, RθJA, in the Thermal Information table is that of a device installed on a high-K test board for
leaded surface-mount packages. Use these equations to calculate the value for each parameter:
TJ = TA + RθJA × P, where P is the power dissipated in the device.
TJ(max) = TS = TA + RθJA × PS, where TJ(max) is the maximum junction temperature.
PS = IS × VDDmax, where VDDmax is the maximum supply voltage for high-side and low-side.

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 9


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

7.9 Electrical Characteristics


minimum and maximum specifications of the AMC1311 apply from TA = –40°C to +125°C, VDD1 = 4.5 V to 5.5 V, VDD2 =
3.0 V to 5.5 V, VIN = –0.1 V to 2 V, and SHTDN = GND1 = 0 V; minimum and maximum specifications of the AMC1311B
apply from TA = –55°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, VIN = –0.1 V to 2 V, and SHTDN = GND1 =
0 V (unless otherwise noted); typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
TA = 25°C, 4.5 V ≤ VDD1 ≤ 5.5 V,
–9.9 ±0.4 9.9
VOS Input offset voltage(1) (2) AMC1311 mV
TA = 25°C, AMC1311B(3) –1.5 ±0.4 1.5
AMC1311 ±20
TCVOS Input offset thermal drift(1) (2) (5) µV/°C
AMC1311B –10 ±3 10
RIN Input resistance TA = 25℃ 1 GΩ
IIB Input bias current IN = GND1, TA = 25℃ –15 3.5 15 nA
CIN Input capacitance fIN = 275 kHz 7 pF
ANALOG OUTPUT
Nominal gain 1 V/V
TA = 25℃, AMC1311 –1% 0.4% 1%
EG Gain error(1)
TA = 25℃, AMC1311B –0.2% ±0.05% 0.2%
AMC1311 ±30
TCEG Gain error drift(1) (6) ppm/°C
AMC1311B –40 ±5 40
Nonlineartity(1) –0.04% ±0.01% 0.04%
VIN = 2 VPP, VIN > 0 V,
THD Total harmonic distortion(4) –87 dB
fIN = 10 kHz, BW = 10 kHz
VIN = 2 VPP, fIN = 1 kHz, BW = 10 kHz 79 82.6
SNR Signal-to-noise ratio dB
VIN = 2 VPP, fIN = 10 kHz, BW = 100 kHz 70.9
Output noise VIN = GND1, BW = 100 kHz 220 µVrms
vs VDD1, at DC –80
vs VDD2, at DC –85
PSRR Power-supply rejection ratio(2) dB
vs VDD1, 10 kHz / 100-mV ripple –65
vs VDD2, 10 kHz / 100-mV ripple –70
VCMout Output common-mode voltage 1.39 1.44 1.49 V
VOUT = (VOUTP – VOUTN);
VCLIPout Clipping differential output voltage 2.49 V
VIN > VClipping
SHTDN = high, or VDD1 undervoltage,
VFAILSAFE Failsafe differential output voltage –2.6 –2.5 V
or VDD1 missing
AMC1311 100 220
BW Output bandwidth kHz
AMC1311B 220 275
ROUT Output resistance On OUTP or OUTN <0.2 Ω
On OUTP or OUTN, sourcing or sinking,
Output short-circuit current IN = GND1, outputs shorted to 14 mA
either GND or VDD2
AMC1311 15 30
CMTI Common-mode transient immunity kV/µs
AMC1311B 100 150

10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

7.9 Electrical Characteristics (continued)


minimum and maximum specifications of the AMC1311 apply from TA = –40°C to +125°C, VDD1 = 4.5 V to 5.5 V, VDD2 =
3.0 V to 5.5 V, VIN = –0.1 V to 2 V, and SHTDN = GND1 = 0 V; minimum and maximum specifications of the AMC1311B
apply from TA = –55°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, VIN = –0.1 V to 2 V, and SHTDN = GND1 =
0 V (unless otherwise noted); typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DIGITAL INPUT
IIN Input current SHTDN pin, GND1 ≤ SHTDN ≤ VDD1 –70 1 µA
CIN Input capacitance SHTDN pin 5 pF
0.7 ×
VIH High-level input voltage V
VDD1
0.3 ×
VIL Low-level input voltage V
VDD1
POWER SUPPLY

VDD1 undervoltage detection VDD1 rising 2.5 2.7 2.9


VDD1UV V
threshold VDD1 falling 2.4 2.6 2.8

VDD2 undervoltage detection VDD2 rising 2.2 2.45 2.65


VDD2UV V
threshold VDD2 falling 1.85 2.0 2.2
3.0 V < VDD1 < 3.6 V, SHTDN = low,
6.0 8.4
AMC1311B only mA
IDD1 High-side supply current
4.5 V < VDD1 < 5.5 V, SHTDN = low 7.1 9.7
SHTDN = VDD1 1.3 µA
3.0 V < VDD2 < 3.6 V 5.3 7.2
IDD2 Low-side supply current mA
4.5 V < VDD2 < 5.5 V 5.9 8.1

(1) The typical value includes one standard deviation (sigma) at nominal operating conditions.
(2) This parameter is input referred.
(3) The typical value is at VDD1 = 3.3 V.
(4) THD is the ratio of the rms sum of the amplitudes of first five higher harmonics to the amplitude of the fundamental.
(5) Offset error temperature drift is calculated using the box method, as described by the following equation:
TCVOS = (ValueMAX - ValueMIN) / TempRange
(6) Gain error temperature drift is calculated using the box method, as described by the following equation:
TCEG (ppm) = (ValueMAX - ValueMIN) / (Value(T=25℃) x TempRange) x 106

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 11


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

7.10 Switching Characteristics


over operating ambient temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tr Output signal rise time 1.3 µs
tf Output signal fall time 1.3 µs
Unfiltered output, AMC1311 1.5 2.5
IN to OUTx signal delay (50% – 10%) µs
Unfiltered output, AMC1311B 1.0 1.5
Unfiltered output, AMC1311 2.1 3.1
IN to OUTx signal delay (50% – 50%) µs
Unfiltered output, AMC1311B 1.6 2.1
Unfiltered output, AMC1311 3.0 4.0
IN to OUTx signal delay (50% – 90%) µs
Unfiltered output, AMC1311B 2.5 3.0
VDD1 step to 3.0 V with VDD2 ≥ 3.0 V, to
tAS Analog settling time 50 100 µs
VOUTP, VOUTN valid, 0.1% settling
tEN Device enable time SHTDN high to low 50 100 µs
tSHTDN Device shutdown time SHTDN low to high 3 10 µs

7.11 Timing Diagram


2V

IN

0V

tf tr

OUTN

VCMout

OUTP

50% - 10%

50% - 50%

50% - 90%

Figure 7-1. Rise, Fall, and Delay Time Definition

12 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

7.12 Insulation Characteristics Curves

500 1600
AVDD = DVDD = 3.6 V, AMC1311B
AVDD = DVDD = 5.5 V 1400
400
1200

300 1000

PS (mW)
IS (mA)

800
200 600

400
100
200

0 0
0 50 100 150 200 0 50 100 150 200
TA (°C) D001
TA (qC) D002

Figure 7-2. Thermal Derating Curve for Safety- Figure 7-3. Thermal Derating Curve for Safety-
Limiting Current per VDE Limiting Power per VDE
1.E+11 Safety Margin Zone: 1800 VRMS, 254 Years
Operating Zone: 1500 VRMS, 135 Years
1.E+10 TDDB Line (<1 PPM Fail Rate)
87.5%

1.E+9

1.E+8
Time to Fail (s)

1.E+7

1.E+6

1.E+5

1.E+4

1.E+3
20%
1.E+2

1.E+1
500 1500 2500 3500 4500 5500 6500 7500 8500 9500
Stress Voltage (VRMS)

TA up to 150°C, stress-voltage frequency = 60 Hz, isolation working voltage = 1500 VRMS, operating lifetime = 135 years

Figure 7-4. Reinforced Isolation Capacitor Lifetime Projection

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 13


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

7.13 Typical Characteristics


at VDD1 = 5 V, VDD2 = 3.3 V, SHTDN = 0 V, fIN = 10 kHz, and BW = 100 kHz (unless otherwise noted)

2.5 10
vs VDD1
2 vs VDD2 8
1.5 6
1 4
0.5 2
VOS (mV)

VOS (mV)
0 0
-0.5 -2
-1 -4
-1.5 -6 Device 1
-2 -8 Device 2
Device 3
-2.5 -10
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 -40 -25 -10 5 20 35 50 65 80 95 110 125
VDDx (V) D005 Temperature (°C) D019
3.0 V ≤ VDD1 < 4.5 V for the AMC1311B only AMC1311
Figure 7-5. Input Offset Voltage vs Supply Voltage Figure 7-6. Input Offset Voltage vs Temperature
1.5 2.5
Device 1
2 Device 2
1 Device 3
1.5
1
0.5
0.5
VOS (mV)

VOS (mV)

0 0
-0.5
-0.5
-1

Device 1 -1.5
-1
Device 2 -2
Device 3
-1.5 -2.5
-55 -40 -25 -10 5 20 35 50 65 80 95 110 125 -55 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C) D006
Temperature (°C) D007

VDD1 = 5 V, AMC1311B VDD1 = 3.3 V, AMC1311B


Figure 7-7. Input Offset Voltage vs Temperature Figure 7-8. Input Offset Voltage vs Temperature
14 15
12
12
9
10 6
3
CIN (pF)

8
IIB (nA)

0
6 -3

4 -6
-9
2
-12

0 -15
100 1000 10000 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
fIN (kHz) VDD1 (V) D010
D009

3.0 V ≤ VDD1 < 4.5 V for the AMC1311B only


Figure 7-9. Input Capacitance vs Input Signal Frequency Figure 7-10. Input Bias Current vs High-Side Supply Voltage

14 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

7.13 Typical Characteristics (continued)


at VDD1 = 5 V, VDD2 = 3.3 V, SHTDN = 0 V, fIN = 10 kHz, and BW = 100 kHz (unless otherwise noted)

15 1

12 0.8

9 0.6

6 0.4

3 0.2

EG (%)
IIB (nA)

0 0

-3 -0.2

-6 -0.4
AMC1311 vs VDD1
-9 -0.6 AMC1311 vs VDD2
-0.8 AMC1311B vs VDD1
-12 AMC1311B vs VDD2
-1
-15
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
-55 -40 -25 -10 5 20 35 50 65 80 95 110 125
VDDx (V)
Temperature (°C) D011
D014

3.0 V ≤ VDD1 < 4.5 V for the AMC1311B only


–55°C ≤ TA < –40°C for the AMC1311B only
Figure 7-12. Gain Error vs Supply Voltage
Figure 7-11. Input Bias Current vs Temperature
1 0.3
Device 1
0.8 Device 2
0.2 Device 3
0.6
0.4
0.1
0.2
EG (%)

EG (%)

0 0
-0.2
-0.1
-0.4
-0.6 Device 1 -0.2
-0.8 Device 2
Device 3
-1 -0.3
-40 -25 -10 5 20 35 50 65 80 95 110 125 -55 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C) D015
Temperature (°C) D016

AMC1311 AMC1311B
Figure 7-13. Gain Error vs Temperature Figure 7-14. Gain Error vs Temperature
5 50

0 0

-5 -50
Normalized Gain (dB)

-10 -100
Output Phase

-15 -150

-20 -200

-25 -250

-30 -300

-35 AMC1311B -350 AMC1311B


AMC1311 AMC1311
-40 -400
1 10 100 1000 0.01 0.1 1 10 100 1000
fIN (kHz) D043
D004
fIN (kHz) D044

Figure 7-15. Normalized Gain vs Input Frequency Figure 7-16. Output Phase vs Input Frequency

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 15


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

7.13 Typical Characteristics (continued)


at VDD1 = 5 V, VDD2 = 3.3 V, SHTDN = 0 V, fIN = 10 kHz, and BW = 100 kHz (unless otherwise noted)

5 0.04
VOUTP
4.5 VOUTN 0.03
4
0.02
3.5

Nonlinearity (%)
0.01
VOUTx (V)

3
2.5 0

2 -0.01
1.5
-0.02
1
-0.03
0.5
-0.04
0 -0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
-0.1 0.3 0.7 1.1 1.5 1.9 2.3 2.7 VIN (V)
VIN (V) D020
D018

Figure 7-18. Nonlinearity vs Input Voltage


Figure 7-17. Output Voltage vs Input Voltage
0.04 0.04
vs VDD1
0.03 vs VDD2 0.03

0.02 0.02
Nonlinearity (%)
Nonlinearity (%)

0.01 0.01

0 0

-0.01 -0.01

-0.02 -0.02
Device 1
-0.03 -0.03 Device 2
Device 3
-0.04 -0.04
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 -55 -40 -25 -10 5 20 35 50 65 80 95 110 125
VDDx (V) Temperature (°C) D022
D021

3.0 V ≤ VDD1 < 4.5 V for the AMC1311B only –55°C ≤ TA < –40°C for the AMC1311B only

Figure 7-19. Nonlinearity vs Supply Voltage Figure 7-20. Nonlinearity vs Temperature

-70 -70
vs VDD1
vs VDD2
-75 -75

-80 -80
THD (dB)
THD (dB)

-85 -85

-90 -90

-95 -95 Device 1


Device 2
Device 3
-100 -100
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 -55 -40 -25 -10 5 20 35 50 65 80 95 110 125
VDDx (V) D023
Temperature (°C) D024

3.0 V ≤ VDD1 < 4.5 V for the AMC1311B only –55°C ≤ TA < –40°C for the AMC1311B only
Figure 7-21. Total Harmonic Distortion vs Supply Voltage Figure 7-22. Total Harmonic Distortion vs Temperature

16 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

7.13 Typical Characteristics (continued)


at VDD1 = 5 V, VDD2 = 3.3 V, SHTDN = 0 V, fIN = 10 kHz, and BW = 100 kHz (unless otherwise noted)

1000 72.5
70
67.5
100
Noise Density (PV/—Hz)

65
62.5

SNR (dB)
60
10 57.5
55
52.5
1 50
47.5
45
0.1 42.5
0.1 1 10 100 1000 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Frequency (kHz) D025 VIN (V) D026

Figure 7-23. Input-Referred Noise Density vs Frequency Figure 7-24. Signal-to-Noise Ratio vs Input Voltage
80 80
vs VDD1
77.5 vs VDD2 77.5

75 75

72.5 72.5
SNR (dB)
SNR (dB)

70 70

67.5 67.5

65 65
Device 1
62.5 Device 2
62.5
Device 3
60
60
-40 -25 -10 5 20 35 50 65 80 95 110 125
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 Temperature (°C)
VDDx (V) D028
D027
–55°C ≤ TA < –40°C for the AMC1311B only
3.0 V ≤ VDD1 < 4.5 V for the AMC1311B only
Figure 7-26. Signal-to-Noise Ratio vs Temperature
Figure 7-25. Signal-to-Noise Ratio vs Supply Voltage
0 1.49
1.48
-20
1.47

-40 1.46
PSRR (dB)

1.45
VCMout (V)

-60
1.44
1.43
-80
1.42
-100 1.41
VDD1
VDD2 1.4
-120
0.1 1 10 100 1000 1.39
Ripple Frequency (kHz) D029
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
VDD2 (V) D031
100-mV ripple
Figure 7-27. Power-Supply Rejection Ratio vs Ripple Frequency
Figure 7-28. Output Common-Mode Voltage vs Low-Side Supply
Voltage

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 17


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

7.13 Typical Characteristics (continued)


at VDD1 = 5 V, VDD2 = 3.3 V, SHTDN = 0 V, fIN = 10 kHz, and BW = 100 kHz (unless otherwise noted)

1.49 300
AMC1311B
1.48 290 AMC1311
1.47 280

1.46 270
260

BW (kHz)
1.45
VCMout (V)

1.44 250
240
1.43
230
1.42
220
1.41
210
1.4
200
1.39 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
-55 -40 -25 -10 5 20 35 50 65 80 95 110 125 VDD2 (V) D033
Temperature (°C) D032

–55°C ≤ TA < –40°C for the AMC1311B only


Figure 7-30. Output Bandwidth vs Low-Side Supply Voltage
Figure 7-29. Output Common-Mode Voltage vs Temperature
300 8.5
AMC1311B
290 AMC1311 8
280 7.5
270 7
260
BW (kHz)

IDDx (mA)

6.5
250
6
240
5.5
230
5
220
4.5
210
4 IDD1 vs VDD1
200 IDD2 vs VDD2
-55 -40 -25 -10 5 20 35 50 65 80 95 110 125 3.5
Temperature (°C) D034 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
VDDx (V) D035

3.0 V ≤ VDD1 < 4.5 V for the AMC1311B only


Figure 7-31. Output Bandwidth vs Temperature
Figure 7-32. Supply Current vs Supply Voltage
8.5 4
8 3.5
7.5
3
7
6.5 2.5
IDDx (mA)

tr / tf (Ps)

6 2
5.5 1.5
5
1
4.5
4 IDD1 0.5
IDD2
3.5 0
-55 -40 -25 -10 5 20 35 50 65 80 95 110 125 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
Temperature (°C) D036
VDD2 (V) D037

–55°C ≤ TA < –40°C for the AMC1311B only


Figure 7-33. Supply Current vs Temperature Figure 7-34. Output Rise and Fall Time vs Low-Side Supply
Voltage

18 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

7.13 Typical Characteristics (continued)


at VDD1 = 5 V, VDD2 = 3.3 V, SHTDN = 0 V, fIN = 10 kHz, and BW = 100 kHz (unless otherwise noted)

4 3.8

3.5 3.4

3
3

Signal Delay (Ps)


2.6
2.5
tr/tf (Ps)

2.2
2
1.8
1.5
1.4
1
1
50% - 90%
0.5 0.6 50% - 50%
50% - 10%
0 0.2
-55 -40 -25 -10 5 20 35 50 65 80 95 110 125 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
Temperature (°C) D038
VDD2 (V) D039

–55°C ≤ TA < –40°C for the AMC1311B only AMC1311


Figure 7-35. Output Rise and Fall Time vs Temperature Figure 7-36. IN to OUTP, OUTN Signal Delay vs Low-Side
Supply Voltage
3.8 3.8
50% - 90%
3.4 50% - 50% 3.4
50% - 10%
3 3
Signal Delay (Ps)

Signal Delay (Ps)

2.6 2.6

2.2 2.2

1.8 1.8

1.4 1.4

1 1
50% - 90%
0.6 0.6 50% - 50%
50% - 10%
0.2 0.2
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 -40 -25 -10 5 20 35 50 65 80 95 110 125
VDD2 (V) D040
Temperature (°C) D041

AMC1311B AMC1311
Figure 7-37. IN to OUTP, OUTN Signal Delay vs Low-Side Figure 7-38. IN to OUTP, OUTN Signal Delay vs Temperature
Supply Voltage
3.8
50% - 90%
3.4 50% - 50%
50% - 10%
3
Signal Delay (Ps)

2.6

2.2

1.8

1.4

0.6

0.2
-55 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C) D042

AMC1311B
Figure 7-39. IN to OUTP, OUTN Signal Delay vs Temperature

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 19


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

8 Detailed Description
8.1 Overview
The AMC1311 is a precision, single-ended input, isolated amplifier with a high input impedance and wide input
voltage range. The input stage of the device drives a second-order, delta-sigma (ΔΣ) modulator. The modulator
converts the analog input signal into a digital bitstream that is transferred across the isolation barrier and
separates the high-side from the low-side. On the low-side, the received bitstream is processed by a fourth-order
analog filter that outputs a differential signal at the OUTP and OUTN pins proportional to the input signal.
The SiO2-based, capacitive isolation barrier supports a high level of magnetic field immunity, as described in the
ISO72x Digital Isolator Magnetic-Field Immunity application report. The digital modulation used in the AMC1311
to transmit data across the isolation barrier, and the isolation barrier characteristics itself, result in high reliability
and high common-mode transient immunity.
8.2 Functional Block Diagram

VDD1 VDD2

Barrier
AMC1311B
Analog Filter
IN OUTP

TX / RX
RX / TX

ΔΣ Modulator
SHTDN Isolation OUTN

GND1 GND2

8.3 Feature Description


8.3.1 Analog Input
The single-ended, high-impedance input stage of the AMC1311 feeds a second-order, switched-capacitor, feed-
forward ΔΣ modulator. The modulator converts the analog signal into a bitstream that is transferred across the
isolation barrier, as described in the Isolation Channel Signal Transmission section.
There are two restrictions on the analog input signal IN. First, if the input voltage VIN exceeds the range
specified in the Absolute Maximum Ratings table, the input current must be limited to the absolute maximum
value because the electrostatic discharge (ESD) protection turns on. Secondly, the linearity and parametric
performance of the device is ensured only when the analog input voltage remains within the linear full-scale
range (VFSR) as specified in the Recommended Operating Conditions table.

20 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

8.3.2 Isolation Channel Signal Transmission


The AMC1311 uses an on-off keying (OOK) modulation scheme, as shown in Figure 8-1, to transmit the
modulator output bitstream across the SiO2-based isolation barrier. The transmit driver (TX) shown in the
Functional Block Diagram transmits an internally-generated, high-frequency carrier across the isolation barrier
to represent a digital one and does not send a signal to represent a digital zero. The nominal frequency of the
carrier used inside the AMC1311 is 480 MHz.
The receiver (RX) on the other side of the isolation barrier recovers and demodulates the signal and provides
the input to the fourth-order analog filter. The AMC1311 transmission channel is optimized to achieve the
highest level of common-mode transient immunity (CMTI) and lowest level of radiated emissions caused by the
high-frequency carrier and RX/TX buffer switching.

Internal Clock

Modulator Bitstream
on High-side

Signal Across Isolation Barrier

Recovered Sigal
on Low-side

Figure 8-1. OOK-Based Modulation Scheme

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 21


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

8.3.3 Analog Output


The AMC1311 provides a differential analog output on the OUTP and OUTN pins. For input voltages of VIN in the
range from –0.1 V to +2 V, the device provides a linear response with a nominal gain of 1. For example, for an
input voltage of 2 V, the differential output voltage (VOUTP – VOUTN) is 2 V. At zero input (IN shorted to GND1),
both pins output the same common-mode output voltage VCMout, as specified in the Electrical Characteristics
table. For input voltages greater than 2 V but less than approximately 2.5 V, the differential output voltage
continues to increase but with reduced linearity performance. The outputs saturate at a differential output voltage
of VCLIPout, as shown in Figure 8-2, if the input voltage exceeds the VClipping value.
Maximum input range before clipping (VClipping)

Linear input range (VFSR)

VOUTN VFail-safe
VCLIPout

VOUTP VCMout

0 2.516 V
Input Voltage (VIN)
2V

Figure 8-2. Output Behavior of the AMC1311

The AMC1311 output offers a fail-safe feature that simplifies diagnostics on a system level. Figure 8-2 shows the
fail-safe mode, in which the AMC1311 outputs a negative differential output voltage that does not occur under
normal operating conditions. The fail-safe output is active in three cases:
• When the high-side supply VDD1 of the AMC1311 device is missing
• When the high-side supply VDD1 falls below the undervoltage threshold VDD1UV
• When the SHTDN pin is pulled high
Use the maximum VFail-safe voltage specified in the Electrical Characteristics table as a reference value for
fail-safe detection on a system level.
8.4 Device Functional Modes
The AMC1311 is operational when the power supplies VDD1 and VDD2 are applied, as specified in the
Recommended Operating Conditions table.

22 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

9 Application and Implementation


Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.

9.1 Application Information


The high input impedance, low input bias current, low AC and DC errors, and low temperature drift make the
AMC1311 a high-performance solution for industrial applications where voltage sensing in the presence of high
common-mode voltage levels is required.
9.2 Typical Application
Figure 9-1 shows the AMC1311 in a typical application. The DC bus voltage is divided down to an approximate
2-V level across the bottom resistor (RSNS) of a high-impedance resistive divider that is sensed by the
AMC1311. The AMC1311 digitizes the analog input signal on the high-side, transfers the data across the
isolation barrier to the low-side, reconstructs the analog signal, and presents this signal as a differential voltage
signal on the output pins.
The high-impedance input and the high common-mode transient immunity (CMTI) of the AMC1311 ensure
reliable and accurate operation even in high-noise environments.
+ DC Bus

Number of unit resistors depends


on design requirements.
See design examples for details.

RX1
High-side supply Low-side supply
(3.3 V or 5 V) (3.3 V or 5 V)

100 nF 1 uF
RX2 AMC1311B
Load
VDD1 VDD2
10  10 nF
ICROSS IN OUTP
ADC
RSNS SHTDN OUTN
10
GND1 GND2
1 uF 100 nF 100 pF
IGBT module
 DC Bus

Figure 9-1. Using the AMC1311 for DC Link Voltage Sensing in Frequency Inverters

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 23


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

9.2.1 Design Requirements


Table 9-1 lists the parameters for this typical application.
Table 9-1. Design Requirements
PARAMETER VALUE
System input voltage Single phase, 230 V, 50 Hz
Maximum DC link voltage 400 V
High-side supply voltage 3.3 V or 5 V
Low-side supply voltage 3.3 V or 5 V
Maximum resistor operating voltage 75 V
Voltage drop across the sense resistor (RSNS) for a linear response 2 V (maximum)
Current through the resistive divider, ICROSS 100 μA (maximum)

9.2.2 Detailed Design Procedure


The 100-μA, cross-current requirement at the maximum DC link voltage (400 V) determines that the total
impedance of the resistive divider is 4 MΩ. The impedance of the resistive divider is dominated by the top
portion (shown exemplary as RX1 and RX2 in Figure 9-1) and the voltage drop across RSNS can be neglected
for a moment. The maximum allowed voltage drop per unit resistor is specified as 75 V; therefore, the minimum
number of unit resistors in the top portion of the resistive divider is 400 V / 75 V = 6. The calculated unit value is
4 MΩ / 6 = 666 kΩ and the next closest value from the E96 series is 665 kΩ.
RSNS is sized such that the voltage drop across the resistor at the maximum DC link voltage (400 V) equals the
linear full-scale range input voltage (VFSR) of the AMC1311, which is 2 V. This voltage is calculated as RSNS =
VFSR / (VDC-link, max – VFSR) × RTOP, where RTOP is the total value of the top resistor string (6 × 665 kΩ = 3990
kΩ). RSNS is calculated as 20.05 kΩ and matches a value from the E96 series.
Table 9-2. Resistor Value Example
PARAMETER VALUE
Unit resistor RX 665 kΩ
Number of unit resistors 6
Sense resistor RSNS 20.05 kΩ
Resulting current through resistive divider ICROSS 99.7 μA
Resulting voltage drop across sense resistor 2.000 V
Power dissipated in unit resistor RX 6.6 mW
Total power dissipated in resistive divider 39.9 mW

24 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

9.2.2.1 Input Filter Design


Placing an RC filter in front of the isolated amplifier improves signal-to-noise performance of the signal path. In
practice, however, the impedance of the resistor divider is high and only a small-value filter capacitor can be
used to not limit the signal bandwidth to an unacceptable low value. Design the input filter such that:
• The cutoff frequency of the filter is at least one order of magnitude lower than the sampling frequency
(20 MHz) of the internal ΔΣ modulator
• The input bias current does not generate significant voltage drop across the DC impedance of the input filter
Most voltage-sensing applications use high-impedance resistor dividers in front of the isolated amplifier to scale
down the input voltage. In this case, a single capacitor (as shown in Figure 9-2) is sufficient to filter the input
signal.
VDC

R1

AMC1311B
R2 VDD1 VDD2
100 pF
IN OUTP

RSNS SHTDN OUTN

GND1 GND2

Figure 9-2. Input Filter

9.2.2.2 Differential to Single-Ended Output Conversion


Figure 9-3 shows an example of a TLV900x-based signal conversion and filter circuit for systems using single-
ended input ADCs to convert the analog output voltage into digital. With R1 = R2 = R3 = R4, the output voltage
equals (VOUTP – VOUTN) + VREF. Tailor the bandwidth of this filter stage to the bandwidth requirement of the
system and use NP0-type capacitors for best performance. For most applications, R1 = R2 = R3 = R4 = 3.3 kΩ
and C1 = C2 = 330 pF yields good performance.
C1
AMC1311B
VDD1 VDD2 R2

R1
IN OUTP –
R3 ADC To MCU
SHTDN OUTN +
TLV9001
GND1 GND2 C2 R4

VREF

Figure 9-3. Connecting the AMC1311 Output to a Single-Ended Input ADC

For more information on the general procedure to design the filtering and driving stages of SAR ADCs, see
the 18-Bit, 1MSPS Data Acquisition Block (DAQ) Optimized for Lowest Distortion and Noise and 18-Bit Data
Acquisition Block (DAQ) Optimized for Lowest Power reference guides, available for download at www.ti.com.

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 25


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

9.2.3 Application Curve


One important aspect of system design is the effective detection of an overvoltage condition to protect switching
devices and passive components from damage. To power off the system quickly in the event of an overvoltage
condition, a low delay caused by the isolated amplifier is required. Figure 9-4 shows the typical full-scale step
response of the AMC1311.

VOUTP

VOUTN

VIN

Figure 9-4. Step Response of the AMC1311

9.3 What To Do and What Not To Do


Do not leave the analog input (IN pin) of the AMC1311 unconnected (floating) when the device is powered up
on the high-side. If the device input is left floating, the bias current may generate a negative input voltage that
exceeds the specified input voltage range, causing the output of the device to be invalid.
Do not connect protection diodes to the input (IN pin) of the AMC1311. Diode leakage current can introduce
significant measurement error especially at high temperatures. The input pin is protected against high voltages
by its ESD protection circuit and the high impedance of the external restive divider.

26 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

10 Power Supply Recommendations


In a typical application, the high-side (VDD1) of the AMC1311 is powered from an already existing, high-
side, ground-referenced, 3.3-V or 5-V power supply in the system. Alternatively, the high-side supply can be
generated from the low-side supply (VDD2) by an isolated DC/DC converter. A low-cost solution is based on the
push-pull driver SN6501 and a transformer that supports the desired isolation voltage ratings.
The AMC1311 does not require any specific power-up sequencing. The high-side power supply (VDD1) is
decoupled with a low-ESR, 100-nF capacitor (C1) parallel to a low-ESR, 1-μF capacitor (C2). The low-side
power supply (VDD2) is equally decoupled with a low-ESR, 100-nF capacitor (C3) parallel to a low-ESR, 1-μF
capacitor (C4). Place all four capacitors (C1, C2, C3, and C4) as close to the device as possible. Figure 10-1
shows the proper decoupling layout for the AMC1311.
VDC

VDD1 VDD2
R1
C2 1 µF C4 1 µF
AMC1311B
C1 100 nF C3 100 nF
R2 VDD1 VDD2

IN OUTP to RC filter / ADC


C5 100 pF
RSNS SHTDN OUTN to RC filter / ADC

GND1 GND2

Figure 10-1. Decoupling of the AMC1311

Capacitors must provide adequate effective capacitance under the applicable DC bias conditions they
experience in the application. Multilayer ceramic capacitors (MLCC) typically exhibit only a fraction of their
nominal capacitance under real-world conditions and this factor must be taken into consideration when selecting
these capacitors. This problem is especially acute in low-profile capacitors, in which the dielectric field strength is
higher than in taller components. Reputable capacitor manufacturers provide capacitance versus DC bias curves
that greatly simplify component selection.

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 27


Product Folder Links: AMC1311
AMC1311
SBAS786C – DECEMBER 2017 – REVISED JUNE 2022 www.ti.com

11 Layout
11.1 Layout Guidelines
Figure 11-1 shows a layout recommendation with the critical placement of the decoupling capacitors (as close as
possible to the AMC1311 supply pins) and placement of the other components required by the device. For best
performance, place the sense resistor close to the device input pin (IN).
11.2 Layout Example VDC
R1

VDD2
Clearance area, to be

VDD1
kept free of any
conductive materials.

C2 C4
R2

C1 C3

INP OUTP to RC filter / ADC


AMC1311B
C5
RSNS

OUTN to RC filter / ADC


GND2
GND1

Top Metal
Inner or Bottom Layer Metal
Via

Figure 11-1. Recommended Layout of the AMC1311

28 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated

Product Folder Links: AMC1311


AMC1311
www.ti.com SBAS786C – DECEMBER 2017 – REVISED JUNE 2022

12 Device and Documentation Support


12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
• Texas Instruments, Isolation Glossary application report
• Texas Instruments, Semiconductor and IC Package Thermal Metrics application report
• Texas Instruments, ISO72x Digital Isolator Magnetic-Field Immunity application report
• Texas Instruments, TLV900x Low-Power, RRIO, 1-MHz Operational Amplifier for Cost-Sensitive Systems
data sheet
• Texas Instruments, SN6501 Transformer Driver for Isolated Power Supplies data sheet
• Texas Instruments, AMC1311EVM Users Guide
• Texas Instruments, 18-Bit, 1-MSPS Data Acquisition Block (DAQ) Optimized for Lowest Distortion and Noise
reference guide
• Texas Instruments, 18-Bit, 1-MSPS Data Acquisition Block (DAQ) Optimized for Lowest Power reference
guide
• Texas Instruments, Isolated Amplifier Voltage Sensing Excel Calculator design tool
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

12.6 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information


The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 29


Product Folder Links: AMC1311
PACKAGE OPTION ADDENDUM

www.ti.com 27-Jan-2021

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

AMC1311BDWV ACTIVE SOIC DWV 8 64 RoHS & Green NIPDAU Level-3-260C-168 HR -55 to 125 1311B

AMC1311BDWVR ACTIVE SOIC DWV 8 1000 RoHS & Green NIPDAU Level-3-260C-168 HR -55 to 125 1311B

AMC1311DWV ACTIVE SOIC DWV 8 64 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 125 1311

AMC1311DWVR ACTIVE SOIC DWV 8 1000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 125 1311

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

Addendum-Page 1
PACKAGE OPTION ADDENDUM

www.ti.com 27-Jan-2021

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF AMC1311 :

• Automotive: AMC1311-Q1

NOTE: Qualified Version Definitions:

• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

Addendum-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jun-2023

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS


K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)


QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal


Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
AMC1311BDWVR SOIC DWV 8 1000 330.0 16.4 12.15 6.2 3.05 16.0 16.0 Q1
AMC1311DWVR SOIC DWV 8 1000 330.0 16.4 12.15 6.2 3.05 16.0 16.0 Q1

Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jun-2023

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal


Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
AMC1311BDWVR SOIC DWV 8 1000 356.0 356.0 35.0
AMC1311DWVR SOIC DWV 8 1000 356.0 356.0 35.0

Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jun-2023

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal


Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
AMC1311BDWV DWV SOIC 8 64 505.46 13.94 4826 6.6
AMC1311DWV DWV SOIC 8 64 505.46 13.94 4826 6.6

Pack Materials-Page 3
PACKAGE OUTLINE

DWV0008A SCALE 2.000


SOIC - 2.8 mm max height
SOIC

SEATING PLANE
11.5 0.25
PIN 1 ID TYP 0.1 C
AREA
6X 1.27
8
1

5.95 2X
5.75 3.81
NOTE 3

4
5
0.51
8X
0.31
7.6 0.25 C A B
A B 2.8 MAX
7.4
NOTE 4

0.33
TYP
0.13

SEE DETAIL A

(2.286)
0.25
GAGE PLANE

0.46
0.36
0 -8
1.0
0.5 DETAIL A
(2) TYPICAL

4218796/A 09/2013

NOTES:

1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm, per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side.

www.ti.com
EXAMPLE BOARD LAYOUT

DWV0008A SOIC - 2.8 mm max height


SOIC

8X (1.8) SEE DETAILS


SYMM

8X (0.6) SYMM

6X (1.27)
(10.9)

LAND PATTERN EXAMPLE


9.1 mm NOMINAL CLEARANCE/CREEPAGE
SCALE:6X

SOLDER MASK SOLDER MASK METAL


METAL
OPENING OPENING

0.07 MAX 0.07 MIN


ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK


DEFINED DEFINED

SOLDER MASK DETAILS

4218796/A 09/2013

NOTES: (continued)

5. Publication IPC-7351 may have alternate designs.


6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
EXAMPLE STENCIL DESIGN

DWV0008A SOIC - 2.8 mm max height


SOIC

8X (1.8) SYMM

8X (0.6)
SYMM

6X (1.27)

(10.9)

SOLDER PASTE EXAMPLE


BASED ON 0.125 mm THICK STENCIL
SCALE:6X

4218796/A 09/2013

NOTES: (continued)

7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.

www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023, Texas Instruments Incorporated

You might also like