Lab 15 - DLD
Lab 15 - DLD
counters Asynchronous
Counters:
It is a type of counter in which the output of one flip flop become the input for the next flip
flop. The number of flip flops used in the ripple counter depends upon the number of states
of counter. The maximum number of states that a counter can have is 2n where n represents
the number of flip flops used in counter.
Truth Table
clock Qc Qb Qa Decimal
Initially 0 0 0 0
1st 0 0 1 1
2nd 0 1 0 2
3rd 0 1 1 3
4th 1 0 0 4
5th 1 0 1 5
6th 1 1 0 6
7th 1 1 1 7
SYNCHRONOUS UP-COUNTER
A synchronous counter is one whose output bits change state simultaneously. In synchronous
counters, the flip flops are clocked at the same time by a common clock. Thus, all the flip
flops change state simultaneously.
3-BIT SYNCHRONOUS UP-COUNTER
To make a 3-bit synchronous up counter we need 3 T Flip Flops (other flip flops can also be
used).
Initially 0 0 0 0 1 1 1 7
1st 0 0 1 1 1 1 0 6
2nd 0 1 0 2 1 0 0 5
3rd 0 1 1 3 1 0 0 4
4th 1 0 0 4 0 1 1 3
5th 1 0 1 5 0 1 0 2
6th 1 1 0 6 0 0 1 1
7th 1 1 1 7 0 0 0 0